iommu/vt-d: Remove virtual command interface

Virtual command interface was introduced to allow using host PASIDs
inside VMs. It is unused and abandoned due to architectural change.

With this patch, we can safely remove this feature and the related helpers.

Link: https://lore.kernel.org/r/20230210230206.3160144-2-jacob.jun.pan@linux.intel.com
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20230322200803.869130-2-jacob.jun.pan@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Jacob Pan 2023-03-22 13:07:57 -07:00 коммит произвёл Joerg Roedel
Родитель c33fcc13ee
Коммит 760f41d182
4 изменённых файлов: 0 добавлений и 91 удалений

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@ -54,7 +54,6 @@ static inline void check_dmar_capabilities(struct intel_iommu *a,
CHECK_FEATURE_MISMATCH(a, b, ecap, slts, ECAP_SLTS_MASK); CHECK_FEATURE_MISMATCH(a, b, ecap, slts, ECAP_SLTS_MASK);
CHECK_FEATURE_MISMATCH(a, b, ecap, nwfs, ECAP_NWFS_MASK); CHECK_FEATURE_MISMATCH(a, b, ecap, nwfs, ECAP_NWFS_MASK);
CHECK_FEATURE_MISMATCH(a, b, ecap, slads, ECAP_SLADS_MASK); CHECK_FEATURE_MISMATCH(a, b, ecap, slads, ECAP_SLADS_MASK);
CHECK_FEATURE_MISMATCH(a, b, ecap, vcs, ECAP_VCS_MASK);
CHECK_FEATURE_MISMATCH(a, b, ecap, smts, ECAP_SMTS_MASK); CHECK_FEATURE_MISMATCH(a, b, ecap, smts, ECAP_SMTS_MASK);
CHECK_FEATURE_MISMATCH(a, b, ecap, pds, ECAP_PDS_MASK); CHECK_FEATURE_MISMATCH(a, b, ecap, pds, ECAP_PDS_MASK);
CHECK_FEATURE_MISMATCH(a, b, ecap, dit, ECAP_DIT_MASK); CHECK_FEATURE_MISMATCH(a, b, ecap, dit, ECAP_DIT_MASK);
@ -101,7 +100,6 @@ static int cap_audit_hotplug(struct intel_iommu *iommu, enum cap_audit_type type
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, slts, ECAP_SLTS_MASK); CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, slts, ECAP_SLTS_MASK);
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, nwfs, ECAP_NWFS_MASK); CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, nwfs, ECAP_NWFS_MASK);
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, slads, ECAP_SLADS_MASK); CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, slads, ECAP_SLADS_MASK);
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, vcs, ECAP_VCS_MASK);
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, smts, ECAP_SMTS_MASK); CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, smts, ECAP_SMTS_MASK);
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, pds, ECAP_PDS_MASK); CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, pds, ECAP_PDS_MASK);
CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, dit, ECAP_DIT_MASK); CHECK_FEATURE_MISMATCH_HOTPLUG(iommu, ecap, dit, ECAP_DIT_MASK);

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@ -993,8 +993,6 @@ static int map_iommu(struct intel_iommu *iommu, struct dmar_drhd_unit *drhd)
warn_invalid_dmar(phys_addr, " returns all ones"); warn_invalid_dmar(phys_addr, " returns all ones");
goto unmap; goto unmap;
} }
if (ecap_vcs(iommu->ecap))
iommu->vccap = dmar_readq(iommu->reg + DMAR_VCCAP_REG);
/* the registers might be more than one page */ /* the registers might be more than one page */
map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap), map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),

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@ -1722,9 +1722,6 @@ static void free_dmar_iommu(struct intel_iommu *iommu)
if (ecap_prs(iommu->ecap)) if (ecap_prs(iommu->ecap))
intel_svm_finish_prq(iommu); intel_svm_finish_prq(iommu);
} }
if (vccap_pasid(iommu->vccap))
ioasid_unregister_allocator(&iommu->pasid_allocator);
#endif #endif
} }
@ -2797,85 +2794,6 @@ out_unmap:
return ret; return ret;
} }
#ifdef CONFIG_INTEL_IOMMU_SVM
static ioasid_t intel_vcmd_ioasid_alloc(ioasid_t min, ioasid_t max, void *data)
{
struct intel_iommu *iommu = data;
ioasid_t ioasid;
if (!iommu)
return INVALID_IOASID;
/*
* VT-d virtual command interface always uses the full 20 bit
* PASID range. Host can partition guest PASID range based on
* policies but it is out of guest's control.
*/
if (min < PASID_MIN || max > intel_pasid_max_id)
return INVALID_IOASID;
if (vcmd_alloc_pasid(iommu, &ioasid))
return INVALID_IOASID;
return ioasid;
}
static void intel_vcmd_ioasid_free(ioasid_t ioasid, void *data)
{
struct intel_iommu *iommu = data;
if (!iommu)
return;
/*
* Sanity check the ioasid owner is done at upper layer, e.g. VFIO
* We can only free the PASID when all the devices are unbound.
*/
if (ioasid_find(NULL, ioasid, NULL)) {
pr_alert("Cannot free active IOASID %d\n", ioasid);
return;
}
vcmd_free_pasid(iommu, ioasid);
}
static void register_pasid_allocator(struct intel_iommu *iommu)
{
/*
* If we are running in the host, no need for custom allocator
* in that PASIDs are allocated from the host system-wide.
*/
if (!cap_caching_mode(iommu->cap))
return;
if (!sm_supported(iommu)) {
pr_warn("VT-d Scalable Mode not enabled, no PASID allocation\n");
return;
}
/*
* Register a custom PASID allocator if we are running in a guest,
* guest PASID must be obtained via virtual command interface.
* There can be multiple vIOMMUs in each guest but only one allocator
* is active. All vIOMMU allocators will eventually be calling the same
* host allocator.
*/
if (!vccap_pasid(iommu->vccap))
return;
pr_info("Register custom PASID allocator\n");
iommu->pasid_allocator.alloc = intel_vcmd_ioasid_alloc;
iommu->pasid_allocator.free = intel_vcmd_ioasid_free;
iommu->pasid_allocator.pdata = (void *)iommu;
if (ioasid_register_allocator(&iommu->pasid_allocator)) {
pr_warn("Custom PASID allocator failed, scalable mode disabled\n");
/*
* Disable scalable mode on this IOMMU if there
* is no custom allocator. Mixing SM capable vIOMMU
* and non-SM vIOMMU are not supported.
*/
intel_iommu_sm = 0;
}
}
#endif
static int __init init_dmars(void) static int __init init_dmars(void)
{ {
struct dmar_drhd_unit *drhd; struct dmar_drhd_unit *drhd;
@ -2964,9 +2882,6 @@ static int __init init_dmars(void)
*/ */
for_each_active_iommu(iommu, drhd) { for_each_active_iommu(iommu, drhd) {
iommu_flush_write_buffer(iommu); iommu_flush_write_buffer(iommu);
#ifdef CONFIG_INTEL_IOMMU_SVM
register_pasid_allocator(iommu);
#endif
iommu_set_root_entry(iommu); iommu_set_root_entry(iommu);
} }

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@ -198,7 +198,6 @@
#define ecap_flts(e) (((e) >> 47) & 0x1) #define ecap_flts(e) (((e) >> 47) & 0x1)
#define ecap_slts(e) (((e) >> 46) & 0x1) #define ecap_slts(e) (((e) >> 46) & 0x1)
#define ecap_slads(e) (((e) >> 45) & 0x1) #define ecap_slads(e) (((e) >> 45) & 0x1)
#define ecap_vcs(e) (((e) >> 44) & 0x1)
#define ecap_smts(e) (((e) >> 43) & 0x1) #define ecap_smts(e) (((e) >> 43) & 0x1)
#define ecap_dit(e) (((e) >> 41) & 0x1) #define ecap_dit(e) (((e) >> 41) & 0x1)
#define ecap_pds(e) (((e) >> 42) & 0x1) #define ecap_pds(e) (((e) >> 42) & 0x1)
@ -676,7 +675,6 @@ struct intel_iommu {
unsigned char prq_name[16]; /* Name for PRQ interrupt */ unsigned char prq_name[16]; /* Name for PRQ interrupt */
unsigned long prq_seq_number; unsigned long prq_seq_number;
struct completion prq_complete; struct completion prq_complete;
struct ioasid_allocator_ops pasid_allocator; /* Custom allocator for PASIDs */
#endif #endif
struct iopf_queue *iopf_queue; struct iopf_queue *iopf_queue;
unsigned char iopfq_name[16]; unsigned char iopfq_name[16];