KVM: x86 emulator: simplify emulate_2op_cl()
emulate_2op_cl() is always called with the same parameters. Simplify by passing just the emulation context. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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a31b9ceadb
Коммит
761441b9f4
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@ -263,40 +263,37 @@ struct gprefix {
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__emulate_2op_nobyte(ctxt, _op, "w", "r", _LO32, "r", "", "r")
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__emulate_2op_nobyte(ctxt, _op, "w", "r", _LO32, "r", "", "r")
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/* Instruction has three operands and one operand is stored in ECX register */
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/* Instruction has three operands and one operand is stored in ECX register */
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#define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type) \
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#define __emulate_2op_cl(_op, ctxt, _suffix, _type) \
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do { \
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do { \
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unsigned long _tmp; \
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unsigned long _tmp; \
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_type _clv = (_cl).val; \
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_type _clv = (ctxt)->src2.val; \
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_type _srcv = (_src).val; \
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_type _srcv = (ctxt)->src.val; \
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_type _dstv = (_dst).val; \
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_type _dstv = (ctxt)->dst.val; \
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\
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\
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__asm__ __volatile__ ( \
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__asm__ __volatile__ ( \
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_PRE_EFLAGS("0", "5", "2") \
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_PRE_EFLAGS("0", "5", "2") \
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_op _suffix " %4,%1 \n" \
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_op _suffix " %4,%1 \n" \
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_POST_EFLAGS("0", "5", "2") \
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_POST_EFLAGS("0", "5", "2") \
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: "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp) \
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: "=m" ((ctxt)->eflags), "+r" (_dstv), "=&r" (_tmp) \
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: "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \
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: "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \
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); \
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); \
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\
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\
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(_cl).val = (unsigned long) _clv; \
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(ctxt)->src2.val = (unsigned long) _clv; \
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(_src).val = (unsigned long) _srcv; \
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(ctxt)->src2.val = (unsigned long) _srcv; \
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(_dst).val = (unsigned long) _dstv; \
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(ctxt)->dst.val = (unsigned long) _dstv; \
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} while (0)
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} while (0)
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#define emulate_2op_cl(_op, _cl, _src, _dst, _eflags) \
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#define emulate_2op_cl(ctxt, _op) \
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do { \
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do { \
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switch ((_dst).bytes) { \
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switch ((ctxt)->dst.bytes) { \
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case 2: \
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case 2: \
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__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \
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__emulate_2op_cl(_op, ctxt, "w", u16); \
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"w", unsigned short); \
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break; \
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break; \
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case 4: \
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case 4: \
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__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \
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__emulate_2op_cl(_op, ctxt, "l", u32); \
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"l", unsigned int); \
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break; \
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break; \
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case 8: \
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case 8: \
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ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \
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ON64(__emulate_2op_cl(_op, ctxt, "q", ulong)); \
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"q", unsigned long)); \
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break; \
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break; \
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} \
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} \
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} while (0)
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} while (0)
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@ -4123,7 +4120,7 @@ twobyte_insn:
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break;
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break;
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case 0xa4: /* shld imm8, r, r/m */
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case 0xa4: /* shld imm8, r, r/m */
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case 0xa5: /* shld cl, r, r/m */
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case 0xa5: /* shld cl, r, r/m */
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emulate_2op_cl("shld", ctxt->src2, ctxt->src, ctxt->dst, ctxt->eflags);
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emulate_2op_cl(ctxt, "shld");
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break;
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break;
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case 0xa8: /* push gs */
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case 0xa8: /* push gs */
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rc = emulate_push_sreg(ctxt, VCPU_SREG_GS);
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rc = emulate_push_sreg(ctxt, VCPU_SREG_GS);
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@ -4137,7 +4134,7 @@ twobyte_insn:
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break;
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break;
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case 0xac: /* shrd imm8, r, r/m */
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case 0xac: /* shrd imm8, r, r/m */
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case 0xad: /* shrd cl, r, r/m */
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case 0xad: /* shrd cl, r, r/m */
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emulate_2op_cl("shrd", ctxt->src2, ctxt->src, ctxt->dst, ctxt->eflags);
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emulate_2op_cl(ctxt, "shrd");
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break;
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break;
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case 0xae: /* clflush */
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case 0xae: /* clflush */
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break;
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break;
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