soc: tegra: Changes for v5.3-rc1
This contains a set of minor fixes and cleanups for core Tegra drivers. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl0M61oTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoYZAD/487VTni+jaefO8Vop87r1+nAbQNG9Y i+QGdZwBTggHhE7rPKHMPPgmTqjAcTLezyM1kUx7nUF5eK4R/Rz1ND1MzutYt6/v vS12SOfclPalZuO6DuR7vwCDeqpLy/WXFt4OZZzm/F/WxTBzc86BvOWSF7LvTXvl kAK7TmOSUrItzvfyi/GPfdQsSZLg+3FWOwKf13Fp99n+/4IUDm+hdOeNaBnkvJSp pLt0+bVctCp4i4VGwGzFw5kPVLLl/HotM8hEnAAlGr7bPXP+oEQAN0EYZIUirqM5 4HEYH2zkmK7ffy7FIARrvBKrE0krihtYFm931pCMzlQzzWGOfAOyoVwPCZq+Rg0R yXpk8QSObc2o8ywnihfDYstiMToU9c8Et3IjpQUJ1hzH2kMofcJJ9PclVjSv7GWw B9e6Fm14Za6Cp1Ec+X4VYJrWGI7dF8131Tsp0L7uVUk5ypqdV3rqv2hWnViZm72q BBaTldmA5NzmBmwRWzxmRkFrl/WxsQQ2DN0NLIOJ4dUWn1MtCwZxvFuec/X3g8/f dYwsKcFrG0oT+mYBBFZ7c7adpGTM2+hjuksolZPmRjGWRTPkjeISlbruG3UtWVuT OhyUJDFQLpdenOTJJ9ZfVY5tgsItwibbTlhgKC4WFw/zd32Qs8fjIuPXrqzPIQHQ jtbtAYYOp0r+cA== =bqwE -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc: tegra: Changes for v5.3-rc1 This contains a set of minor fixes and cleanups for core Tegra drivers. * tag 'tegra-for-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: Select pinctrl for Tegra194 soc/tegra: fuse: Do not log error message on deferred probe soc/tegra: pmc: Add comments clarifying wake events soc/tegra: pmc: Avoid crash for non-wake IRQs soc/tegra: pmc: Fail to allocate more than one wake IRQ Signed-off-by: Olof Johansson <olof@lixom.net>
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761d3d22fb
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@ -109,6 +109,7 @@ config ARCH_TEGRA_186_SOC
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config ARCH_TEGRA_194_SOC
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bool "NVIDIA Tegra194 SoC"
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select MAILBOX
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select PINCTRL_TEGRA194
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select TEGRA_BPMP
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select TEGRA_HSP_MBOX
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select TEGRA_IVC
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@ -133,8 +133,10 @@ static int tegra_fuse_probe(struct platform_device *pdev)
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fuse->clk = devm_clk_get(&pdev->dev, "fuse");
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if (IS_ERR(fuse->clk)) {
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dev_err(&pdev->dev, "failed to get FUSE clock: %ld",
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PTR_ERR(fuse->clk));
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if (PTR_ERR(fuse->clk) != -EPROBE_DEFER)
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dev_err(&pdev->dev, "failed to get FUSE clock: %ld",
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PTR_ERR(fuse->clk));
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fuse->base = base;
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return PTR_ERR(fuse->clk);
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}
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@ -232,6 +232,11 @@ struct tegra_pmc_soc {
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const char * const *reset_levels;
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unsigned int num_reset_levels;
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/*
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* These describe events that can wake the system from sleep (i.e.
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* LP0 or SC7). Wakeup from other sleep states (such as LP1 or LP2)
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* are dealt with in the LIC.
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*/
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const struct tegra_wake_event *wake_events;
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unsigned int num_wake_events;
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};
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@ -1854,6 +1859,9 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int i;
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int err = 0;
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if (WARN_ON(num_irqs > 1))
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return -EINVAL;
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for (i = 0; i < soc->num_wake_events; i++) {
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const struct tegra_wake_event *event = &soc->wake_events[i];
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@ -1894,6 +1902,11 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq,
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}
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}
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/*
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* For interrupts that don't have associated wake events, assign a
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* dummy hardware IRQ number. This is used in the ->irq_set_type()
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* and ->irq_set_wake() callbacks to return early for these IRQs.
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*/
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if (i == soc->num_wake_events)
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err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX,
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&pmc->irq, pmc);
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@ -1912,6 +1925,10 @@ static int tegra_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
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unsigned int offset, bit;
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u32 value;
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/* nothing to do if there's no associated wake event */
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if (WARN_ON(data->hwirq == ULONG_MAX))
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return 0;
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offset = data->hwirq / 32;
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bit = data->hwirq % 32;
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@ -1939,6 +1956,7 @@ static int tegra_pmc_irq_set_type(struct irq_data *data, unsigned int type)
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struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
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u32 value;
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/* nothing to do if there's no associated wake event */
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if (data->hwirq == ULONG_MAX)
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return 0;
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