drm/i915: extract intel_display_power.h/c from intel_runtime_pm.h/c
Keep all the device-level PM management in intel_runtime_pm.h/c and move all the display specific bits into their own file. Also add the new header to Makefile.header-test. Apart from the giant code move, the only difference is with the intel_runtime_<get/put>_raw() functions, which are now exposed in the header. The _put() version is also not conditionally compiled anymore since it is ok to always pass the wakeref taken from the _get() to __intel_runtime_pm_put (it is -1 if tracking is disabled). Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Imre Deak <imre.deak@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190531222409.9177-2-daniele.ceraolospurio@intel.com
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@ -159,6 +159,7 @@ i915-y += intel_audio.o \
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intel_combo_phy.o \
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intel_combo_phy.o \
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intel_connector.o \
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intel_connector.o \
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intel_display.o \
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intel_display.o \
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intel_display_power.o \
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intel_dpio_phy.o \
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intel_dpio_phy.o \
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intel_dpll_mgr.o \
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intel_dpll_mgr.o \
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intel_fbc.o \
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intel_fbc.o \
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@ -25,6 +25,7 @@ header_test := \
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intel_crt.h \
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intel_crt.h \
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intel_csr.h \
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intel_csr.h \
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intel_ddi.h \
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intel_ddi.h \
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intel_display_power.h \
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intel_dp.h \
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intel_dp.h \
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intel_dp_aux_backlight.h \
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intel_dp_aux_backlight.h \
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intel_dp_link_training.h \
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intel_dp_link_training.h \
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@ -70,6 +70,7 @@
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#include "intel_bios.h"
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#include "intel_bios.h"
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#include "intel_device_info.h"
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#include "intel_device_info.h"
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#include "intel_display.h"
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#include "intel_display.h"
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#include "intel_display_power.h"
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#include "intel_dpll_mgr.h"
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#include "intel_dpll_mgr.h"
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#include "intel_frontbuffer.h"
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#include "intel_frontbuffer.h"
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#include "intel_opregion.h"
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#include "intel_opregion.h"
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@ -0,0 +1,96 @@
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_DISPLAY_POWER_H__
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#define __INTEL_DISPLAY_POWER_H__
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#include "intel_display.h"
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#include "intel_runtime_pm.h"
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struct drm_i915_private;
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struct intel_encoder;
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void skl_enable_dc6(struct drm_i915_private *dev_priv);
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void gen9_sanitize_dc_state(struct drm_i915_private *dev_priv);
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void bxt_enable_dc9(struct drm_i915_private *dev_priv);
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void bxt_disable_dc9(struct drm_i915_private *dev_priv);
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void gen9_enable_dc5(struct drm_i915_private *dev_priv);
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int intel_power_domains_init(struct drm_i915_private *dev_priv);
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void intel_power_domains_cleanup(struct drm_i915_private *dev_priv);
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void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume);
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void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv);
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void icl_display_core_init(struct drm_i915_private *dev_priv, bool resume);
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void icl_display_core_uninit(struct drm_i915_private *dev_priv);
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void intel_power_domains_enable(struct drm_i915_private *dev_priv);
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void intel_power_domains_disable(struct drm_i915_private *dev_priv);
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void intel_power_domains_suspend(struct drm_i915_private *dev_priv,
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enum i915_drm_suspend_mode);
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void intel_power_domains_resume(struct drm_i915_private *dev_priv);
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void hsw_enable_pc8(struct drm_i915_private *dev_priv);
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void hsw_disable_pc8(struct drm_i915_private *dev_priv);
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void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume);
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void bxt_display_core_uninit(struct drm_i915_private *dev_priv);
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const char *
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intel_display_power_domain_str(enum intel_display_power_domain domain);
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bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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intel_wakeref_t
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intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void __intel_display_power_put_async(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref);
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void intel_display_power_flush_work(struct drm_i915_private *i915);
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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void intel_display_power_put(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref);
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static inline void
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intel_display_power_put_async(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref)
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{
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__intel_display_power_put_async(i915, domain, wakeref);
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}
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#else
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static inline void
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intel_display_power_put(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref)
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{
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intel_display_power_put_unchecked(i915, domain);
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}
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static inline void
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intel_display_power_put_async(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref)
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{
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__intel_display_power_put_async(i915, domain, -1);
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}
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#endif
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#define with_intel_display_power(i915, domain, wf) \
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for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
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intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
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void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
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u8 req_slices);
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void chv_phy_powergate_lanes(struct intel_encoder *encoder,
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bool override, unsigned int mask);
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bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
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enum dpio_channel ch, bool override);
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#endif /* __INTEL_DISPLAY_POWER_H__ */
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@ -13,7 +13,6 @@
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struct drm_i915_private;
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struct drm_i915_private;
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struct drm_printer;
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struct drm_printer;
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struct intel_encoder;
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enum i915_drm_suspend_mode {
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enum i915_drm_suspend_mode {
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I915_DRM_SUSPEND_IDLE,
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I915_DRM_SUSPEND_IDLE,
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@ -21,89 +20,15 @@ enum i915_drm_suspend_mode {
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I915_DRM_SUSPEND_HIBERNATE,
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I915_DRM_SUSPEND_HIBERNATE,
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};
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};
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void skl_enable_dc6(struct drm_i915_private *dev_priv);
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void gen9_sanitize_dc_state(struct drm_i915_private *dev_priv);
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void bxt_enable_dc9(struct drm_i915_private *dev_priv);
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void bxt_disable_dc9(struct drm_i915_private *dev_priv);
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void gen9_enable_dc5(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_init_early(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_init_early(struct drm_i915_private *dev_priv);
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int intel_power_domains_init(struct drm_i915_private *);
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void intel_power_domains_cleanup(struct drm_i915_private *dev_priv);
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void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume);
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void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv);
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void icl_display_core_init(struct drm_i915_private *dev_priv, bool resume);
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void icl_display_core_uninit(struct drm_i915_private *dev_priv);
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void intel_power_domains_enable(struct drm_i915_private *dev_priv);
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void intel_power_domains_disable(struct drm_i915_private *dev_priv);
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void intel_power_domains_suspend(struct drm_i915_private *dev_priv,
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enum i915_drm_suspend_mode);
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void intel_power_domains_resume(struct drm_i915_private *dev_priv);
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void hsw_enable_pc8(struct drm_i915_private *dev_priv);
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void hsw_disable_pc8(struct drm_i915_private *dev_priv);
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void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume);
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void bxt_display_core_uninit(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_disable(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_disable(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_cleanup(struct drm_i915_private *dev_priv);
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void intel_runtime_pm_cleanup(struct drm_i915_private *dev_priv);
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const char *
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intel_display_power_domain_str(enum intel_display_power_domain domain);
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bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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intel_wakeref_t
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intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain);
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void __intel_display_power_put_async(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref);
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void intel_display_power_flush_work(struct drm_i915_private *i915);
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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void intel_display_power_put(struct drm_i915_private *dev_priv,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref);
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static inline void
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intel_display_power_put_async(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref)
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{
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__intel_display_power_put_async(i915, domain, wakeref);
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}
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#else
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static inline void
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intel_display_power_put(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref)
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{
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intel_display_power_put_unchecked(i915, domain);
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}
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static inline void
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intel_display_power_put_async(struct drm_i915_private *i915,
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enum intel_display_power_domain domain,
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intel_wakeref_t wakeref)
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{
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__intel_display_power_put_async(i915, domain, -1);
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}
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#endif
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#define with_intel_display_power(i915, domain, wf) \
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for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
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intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
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void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
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u8 req_slices);
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intel_wakeref_t intel_runtime_pm_get(struct drm_i915_private *i915);
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intel_wakeref_t intel_runtime_pm_get(struct drm_i915_private *i915);
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intel_wakeref_t intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915);
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intel_wakeref_t intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915);
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intel_wakeref_t intel_runtime_pm_get_noresume(struct drm_i915_private *i915);
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intel_wakeref_t intel_runtime_pm_get_noresume(struct drm_i915_private *i915);
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intel_wakeref_t intel_runtime_pm_get_raw(struct drm_i915_private *i915);
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#define with_intel_runtime_pm(i915, wf) \
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#define with_intel_runtime_pm(i915, wf) \
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for ((wf) = intel_runtime_pm_get(i915); (wf); \
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for ((wf) = intel_runtime_pm_get(i915); (wf); \
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@ -123,6 +48,7 @@ intel_runtime_pm_put(struct drm_i915_private *i915, intel_wakeref_t wref)
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intel_runtime_pm_put_unchecked(i915);
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intel_runtime_pm_put_unchecked(i915);
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}
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}
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#endif
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#endif
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void intel_runtime_pm_put_raw(struct drm_i915_private *i915, intel_wakeref_t wref);
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
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void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
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@ -134,9 +60,4 @@ static inline void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915,
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}
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}
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#endif
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#endif
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void chv_phy_powergate_lanes(struct intel_encoder *encoder,
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bool override, unsigned int mask);
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bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
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enum dpio_channel ch, bool override);
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#endif /* __INTEL_RUNTIME_PM_H__ */
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#endif /* __INTEL_RUNTIME_PM_H__ */
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