One more fix for 4.18:
- Revert an errata workaround for the BCM5300X platform that was merged for v4.18-rc2 but has been found to cause hangs on at least systems using the BCM4718A1. -----BEGIN PGP SIGNATURE----- iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCW1zA0hUccGF1bC5idXJ0 b25AbWlwcy5jb20ACgkQPqefrLV1AN2QyAEAxicOismTbPgSI+2oiaOjJbF5KjXi cPNCtDkjwkUafU4A/1jvJlXpw6UHRwFAr6fcfnPMcK6QyYiQ9NnSWz46QYkI =X4uV -----END PGP SIGNATURE----- Merge tag 'mips_fixes_4.18_5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fix from Paul Burton: "Here's one more MIPS fix, reverting an errata workaround that was merged for v4.18-rc2 but has since been found to cause system hangs on some BCM4718A1-based systems by the OpenWRT project" * tag 'mips_fixes_4.18_5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"
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Коммит
7648c44680
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@ -212,12 +212,6 @@ static int __init bcm47xx_cpu_fixes(void)
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*/
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if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
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cpu_wait = NULL;
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/*
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* BCM47XX Erratum "R10: PCIe Transactions Periodically Fail"
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* Enable ExternalSync for sync instruction to take effect
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*/
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set_c0_config7(MIPS_CONF7_ES);
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break;
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#endif
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}
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@ -681,8 +681,6 @@
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#define MIPS_CONF7_WII (_ULCAST_(1) << 31)
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#define MIPS_CONF7_RPS (_ULCAST_(1) << 2)
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/* ExternalSync */
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#define MIPS_CONF7_ES (_ULCAST_(1) << 8)
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#define MIPS_CONF7_IAR (_ULCAST_(1) << 10)
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#define MIPS_CONF7_AR (_ULCAST_(1) << 16)
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@ -2767,7 +2765,6 @@ __BUILD_SET_C0(status)
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__BUILD_SET_C0(cause)
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__BUILD_SET_C0(config)
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__BUILD_SET_C0(config5)
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__BUILD_SET_C0(config7)
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__BUILD_SET_C0(intcontrol)
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__BUILD_SET_C0(intctl)
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__BUILD_SET_C0(srsmap)
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