gpu: ipu-v3: image-convert: move tile alignment helpers
Move tile_width_align and tile_height_align up so they can be used by the tile edge position calculation code. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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@ -432,6 +432,33 @@ static int calc_image_resize_coefficients(struct ipu_image_convert_ctx *ctx,
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return 0;
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}
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/*
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* We have to adjust the tile width such that the tile physaddrs and
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* U and V plane offsets are multiples of 8 bytes as required by
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* the IPU DMA Controller. For the planar formats, this corresponds
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* to a pixel alignment of 16 (but use a more formal equation since
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* the variables are available). For all the packed formats, 8 is
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* good enough.
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*/
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static inline u32 tile_width_align(const struct ipu_image_pixfmt *fmt)
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{
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return fmt->planar ? 8 * fmt->uv_width_dec : 8;
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}
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/*
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* For tile height alignment, we have to ensure that the output tile
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* heights are multiples of 8 lines if the IRT is required by the
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* given rotation mode (the IRT performs rotations on 8x8 blocks
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* at a time). If the IRT is not used, or for input image tiles,
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* 2 lines are good enough.
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*/
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static inline u32 tile_height_align(enum ipu_image_convert_type type,
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enum ipu_rotate_mode rot_mode)
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{
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return (type == IMAGE_CONVERT_OUT &&
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ipu_rot_mode_is_irt(rot_mode)) ? 8 : 2;
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}
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static void calc_tile_dimensions(struct ipu_image_convert_ctx *ctx,
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struct ipu_image_convert_image *image)
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{
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@ -1487,33 +1514,6 @@ static unsigned int clamp_align(unsigned int x, unsigned int min,
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return x;
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}
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/*
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* We have to adjust the tile width such that the tile physaddrs and
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* U and V plane offsets are multiples of 8 bytes as required by
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* the IPU DMA Controller. For the planar formats, this corresponds
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* to a pixel alignment of 16 (but use a more formal equation since
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* the variables are available). For all the packed formats, 8 is
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* good enough.
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*/
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static inline u32 tile_width_align(const struct ipu_image_pixfmt *fmt)
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{
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return fmt->planar ? 8 * fmt->uv_width_dec : 8;
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}
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/*
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* For tile height alignment, we have to ensure that the output tile
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* heights are multiples of 8 lines if the IRT is required by the
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* given rotation mode (the IRT performs rotations on 8x8 blocks
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* at a time). If the IRT is not used, or for input image tiles,
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* 2 lines are good enough.
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*/
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static inline u32 tile_height_align(enum ipu_image_convert_type type,
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enum ipu_rotate_mode rot_mode)
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{
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return (type == IMAGE_CONVERT_OUT &&
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ipu_rot_mode_is_irt(rot_mode)) ? 8 : 2;
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}
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/* Adjusts input/output images to IPU restrictions */
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void ipu_image_convert_adjust(struct ipu_image *in, struct ipu_image *out,
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enum ipu_rotate_mode rot_mode)
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