IB/mlx5: Add support for DC target QP
A DC Target (DCT) QP is represented in the hardware as a unique object. This object is created by CREATE_DCT command and destroyed by DESTROY_DCT command. However, in the driver we describe it as a QP. The hardware command that creates a DCT needs parameters that the verb create_qp() does not provide. Those remaining parameters are provided with the call to the verb modify_qp(). Therefore we delay the actual creation of a DCT in the hardware until the stage of modify_qp() to RTR. A support for query_qp() was added as well. It uses QUERY_DCT command to retrieve the applicable fields. Signed-off-by: Moni Shoua <monis@mellanox.com> Reviewed-by: Yishai Hadas <yishaih@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Moni Shoua
Jason Gunthorpe
Родитель
c32a4f296e
Коммит
776a3906b6
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@ -436,11 +436,11 @@ static int mlx5_get_vport_access_method(struct ib_device *ibdev)
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}
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static void get_atomic_caps(struct mlx5_ib_dev *dev,
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u8 atomic_size_qp,
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struct ib_device_attr *props)
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{
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u8 tmp;
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u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
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u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
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u8 atomic_req_8B_endianness_mode =
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MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianness_mode);
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@ -457,6 +457,29 @@ static void get_atomic_caps(struct mlx5_ib_dev *dev,
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}
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}
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static void get_atomic_caps_qp(struct mlx5_ib_dev *dev,
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struct ib_device_attr *props)
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{
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u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
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get_atomic_caps(dev, atomic_size_qp, props);
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}
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static void get_atomic_caps_dc(struct mlx5_ib_dev *dev,
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struct ib_device_attr *props)
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{
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u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc);
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get_atomic_caps(dev, atomic_size_qp, props);
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}
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bool mlx5_ib_dc_atomic_is_supported(struct mlx5_ib_dev *dev)
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{
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struct ib_device_attr props = {};
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get_atomic_caps_dc(dev, &props);
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return (props.atomic_cap == IB_ATOMIC_HCA) ? true : false;
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}
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static int mlx5_query_system_image_guid(struct ib_device *ibdev,
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__be64 *sys_image_guid)
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{
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@ -745,7 +768,7 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
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props->max_srq_sge = max_rq_sg - 1;
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props->max_fast_reg_page_list_len =
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1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size);
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get_atomic_caps(dev, props);
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get_atomic_caps_qp(dev, props);
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props->masked_atomic_cap = IB_ATOMIC_NONE;
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props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg);
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props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg);
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@ -1002,6 +1002,8 @@ struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device,
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struct ib_rwq_ind_table_init_attr *init_attr,
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struct ib_udata *udata);
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int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table);
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bool mlx5_ib_dc_atomic_is_supported(struct mlx5_ib_dev *dev);
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#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
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void mlx5_ib_internal_fill_odp_caps(struct mlx5_ib_dev *dev);
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@ -2156,7 +2156,7 @@ static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd,
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}
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dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
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qp->driver_qp_type = MLX5_IB_QPT_DCT;
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qp->qp_sub_type = MLX5_IB_QPT_DCT;
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MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn);
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MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn);
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MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn);
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@ -2258,6 +2258,8 @@ struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd,
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mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n");
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return ERR_PTR(-EINVAL);
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}
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} else {
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return mlx5_ib_create_dct(pd, init_attr, &ucmd);
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}
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}
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@ -2329,6 +2331,25 @@ struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd,
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return &qp->ibqp;
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}
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static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp)
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{
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struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device);
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if (mqp->state == IB_QPS_RTR) {
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int err;
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err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct);
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if (err) {
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mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err);
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return err;
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}
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}
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kfree(mqp->dct.in);
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kfree(mqp);
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return 0;
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}
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int mlx5_ib_destroy_qp(struct ib_qp *qp)
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{
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struct mlx5_ib_dev *dev = to_mdev(qp->device);
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@ -2337,6 +2358,9 @@ int mlx5_ib_destroy_qp(struct ib_qp *qp)
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if (unlikely(qp->qp_type == IB_QPT_GSI))
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return mlx5_ib_gsi_destroy_qp(qp);
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if (mqp->qp_sub_type == MLX5_IB_QPT_DCT)
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return mlx5_ib_destroy_dct(mqp);
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destroy_qp_common(dev, mqp);
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kfree(mqp);
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@ -3181,6 +3205,95 @@ static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new
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return false;
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}
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/* mlx5_ib_modify_dct: modify a DCT QP
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* valid transitions are:
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* RESET to INIT: must set access_flags, pkey_index and port
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* INIT to RTR : must set min_rnr_timer, tclass, flow_label,
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* mtu, gid_index and hop_limit
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* Other transitions and attributes are illegal
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*/
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static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata)
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{
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struct mlx5_ib_qp *qp = to_mqp(ibqp);
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struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
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enum ib_qp_state cur_state, new_state;
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int err = 0;
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int required = IB_QP_STATE;
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void *dctc;
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if (!(attr_mask & IB_QP_STATE))
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return -EINVAL;
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cur_state = qp->state;
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new_state = attr->qp_state;
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dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
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if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
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required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT;
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if (!is_valid_mask(attr_mask, required, 0))
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return -EINVAL;
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if (attr->port_num == 0 ||
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attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) {
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mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
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attr->port_num, dev->num_ports);
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return -EINVAL;
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}
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if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
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MLX5_SET(dctc, dctc, rre, 1);
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if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
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MLX5_SET(dctc, dctc, rwe, 1);
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if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) {
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if (!mlx5_ib_dc_atomic_is_supported(dev))
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return -EOPNOTSUPP;
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MLX5_SET(dctc, dctc, rae, 1);
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MLX5_SET(dctc, dctc, atomic_mode, MLX5_ATOMIC_MODE_DCT_CX);
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}
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MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index);
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MLX5_SET(dctc, dctc, port, attr->port_num);
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MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id);
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} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
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struct mlx5_ib_modify_qp_resp resp = {};
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u32 min_resp_len = offsetof(typeof(resp), dctn) +
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sizeof(resp.dctn);
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if (udata->outlen < min_resp_len)
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return -EINVAL;
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resp.response_length = min_resp_len;
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required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU;
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if (!is_valid_mask(attr_mask, required, 0))
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return -EINVAL;
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MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer);
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MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class);
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MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label);
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MLX5_SET(dctc, dctc, mtu, attr->path_mtu);
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MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);
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MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
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err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in,
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MLX5_ST_SZ_BYTES(create_dct_in));
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if (err)
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return err;
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resp.dctn = qp->dct.mdct.mqp.qpn;
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err = ib_copy_to_udata(udata, &resp, resp.response_length);
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if (err) {
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mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct);
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return err;
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}
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} else {
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mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state);
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return -EINVAL;
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}
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if (err)
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qp->state = IB_QPS_ERR;
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else
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qp->state = new_state;
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return err;
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}
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int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata)
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{
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@ -3204,6 +3317,8 @@ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ?
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IB_QPT_GSI : ibqp->qp_type;
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if (qp_type == MLX5_IB_QPT_DCT)
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return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata);
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mutex_lock(&qp->mutex);
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@ -4775,6 +4890,71 @@ out:
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return err;
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}
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static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp,
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struct ib_qp_attr *qp_attr, int qp_attr_mask,
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struct ib_qp_init_attr *qp_init_attr)
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{
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struct mlx5_core_dct *dct = &mqp->dct.mdct;
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u32 *out;
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u32 access_flags = 0;
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int outlen = MLX5_ST_SZ_BYTES(query_dct_out);
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void *dctc;
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int err;
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int supported_mask = IB_QP_STATE |
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IB_QP_ACCESS_FLAGS |
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IB_QP_PORT |
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IB_QP_MIN_RNR_TIMER |
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IB_QP_AV |
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IB_QP_PATH_MTU |
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IB_QP_PKEY_INDEX;
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if (qp_attr_mask & ~supported_mask)
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return -EINVAL;
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if (mqp->state != IB_QPS_RTR)
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return -EINVAL;
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out = kzalloc(outlen, GFP_KERNEL);
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if (!out)
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return -ENOMEM;
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err = mlx5_core_dct_query(dev->mdev, dct, out, outlen);
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if (err)
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goto out;
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dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry);
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if (qp_attr_mask & IB_QP_STATE)
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qp_attr->qp_state = IB_QPS_RTR;
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if (qp_attr_mask & IB_QP_ACCESS_FLAGS) {
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if (MLX5_GET(dctc, dctc, rre))
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access_flags |= IB_ACCESS_REMOTE_READ;
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if (MLX5_GET(dctc, dctc, rwe))
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access_flags |= IB_ACCESS_REMOTE_WRITE;
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if (MLX5_GET(dctc, dctc, rae))
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access_flags |= IB_ACCESS_REMOTE_ATOMIC;
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qp_attr->qp_access_flags = access_flags;
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}
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if (qp_attr_mask & IB_QP_PORT)
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qp_attr->port_num = MLX5_GET(dctc, dctc, port);
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if (qp_attr_mask & IB_QP_MIN_RNR_TIMER)
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qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak);
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if (qp_attr_mask & IB_QP_AV) {
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qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass);
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qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label);
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qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index);
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qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit);
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}
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if (qp_attr_mask & IB_QP_PATH_MTU)
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qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu);
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if (qp_attr_mask & IB_QP_PKEY_INDEX)
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qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index);
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out:
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kfree(out);
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return err;
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}
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int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
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int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
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{
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@ -4794,6 +4974,10 @@ int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
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memset(qp_init_attr, 0, sizeof(*qp_init_attr));
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memset(qp_attr, 0, sizeof(*qp_attr));
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if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT))
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return mlx5_ib_dct_query_qp(dev, qp, qp_attr,
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qp_attr_mask, qp_init_attr);
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mutex_lock(&qp->mutex);
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if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
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@ -362,6 +362,11 @@ struct mlx5_ib_create_ah_resp {
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__u8 reserved[6];
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};
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struct mlx5_ib_modify_qp_resp {
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__u32 response_length;
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__u32 dctn;
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};
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struct mlx5_ib_create_wq_resp {
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__u32 response_length;
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__u32 reserved;
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