staging: dgnc: Fix lines longer than 80 characters
All the chunks of the patch apply to comments save the first one. Signed-off-by: Fernando Apesteguia <fernando.apesteguia@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Fernando Apesteguia
Greg Kroah-Hartman
Родитель
7b346dac73
Коммит
777c5e94c1
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@ -449,7 +449,8 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port)
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flags);
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}
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} else if (cause == UART_17158_XOFF_DETECT) {
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if (!(brd->channels[port]->ch_flags & CH_STOP)) {
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if (!(brd->channels[port]->ch_flags &
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CH_STOP)) {
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spin_lock_irqsave(&ch->ch_lock,
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flags);
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ch->ch_flags |= CH_STOP;
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@ -554,7 +555,8 @@ static inline void neo_parse_lsr(struct dgnc_board *brd, uint port)
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* Rx Oruns. Exar says that an orun will NOT corrupt
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* the FIFO. It will just replace the holding register
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* with this new data byte. So basically just ignore this.
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* Probably we should eventually have an orun stat in our driver...
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* Probably we should eventually have an orun stat in our
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* driver...
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*/
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ch->ch_err_overrun++;
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}
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@ -949,14 +951,18 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
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/*
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* If 0, no interrupts pending.
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* This can happen if the IRQ is shared among a couple Neo/Classic boards.
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* This can happen if the IRQ is shared among a couple Neo/Classic
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* boards.
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*/
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if (!uart_poll) {
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spin_unlock_irqrestore(&brd->bd_intr_lock, flags);
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return IRQ_NONE;
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}
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/* At this point, we have at least SOMETHING to service, dig further... */
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/*
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* At this point, we have at least SOMETHING to service, dig
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* further...
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*/
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/* Loop on each port */
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while ((uart_poll & 0xff) != 0) {
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@ -980,7 +986,10 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
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ch = brd->channels[port];
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neo_copy_data_from_uart_to_queue(ch);
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/* Call our tty layer to enforce queue flow control if needed. */
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/*
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* Call our tty layer to enforce queue flow control if
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* needed.
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*/
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spin_lock_irqsave(&ch->ch_lock, flags2);
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dgnc_check_queue_flow_control(ch);
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spin_unlock_irqrestore(&ch->ch_lock, flags2);
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@ -996,16 +1005,18 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
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case UART_17158_TXRDY:
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/*
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* TXRDY interrupt clears after reading ISR register for the UART channel.
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* TXRDY interrupt clears after reading ISR register
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* for the UART channel.
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*/
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/*
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* Yes, this is odd...
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* Why would I check EVERY possibility of type of
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* interrupt, when we know its TXRDY???
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* Becuz for some reason, even tho we got triggered for TXRDY,
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* it seems to be occasionally wrong. Instead of TX, which
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* it should be, I was getting things like RXDY too. Weird.
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* Becuz for some reason, even tho we got triggered for
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* TXRDY, it seems to be occasionally wrong. Instead of
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* TX, which it should be, I was getting things like
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* RXDY too. Weird.
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*/
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neo_parse_isr(brd, port);
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break;
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@ -1020,8 +1031,8 @@ static irqreturn_t neo_intr(int irq, void *voidbrd)
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default:
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/*
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* The UART triggered us with a bogus interrupt type.
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* It appears the Exar chip, when REALLY bogged down, will throw
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* these once and awhile.
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* It appears the Exar chip, when REALLY bogged down,
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* will throw these once and awhile.
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* Its harmless, just ignore it and move on.
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*/
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break;
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@ -1239,7 +1250,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch)
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}
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/*
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* If our queue is full, we have no choice but to drop some data.
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* If our queue is full, we have no choice but to drop some
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* data.
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* The assumption is that HWFLOW or SWFLOW should have stopped
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* things way way before we got to this point.
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*
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@ -1332,7 +1344,10 @@ static void neo_flush_uart_write(struct channel_t *ch)
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neo_pci_posting_flush(ch->ch_bd);
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for (i = 0; i < 10; i++) {
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/* Check to see if the UART feels it completely flushed the FIFO. */
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/*
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* Check to see if the UART feels it completely flushed the
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* FIFO.
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*/
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tmp = readb(&ch->ch_neo_uart->isr_fcr);
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if (tmp & 4)
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udelay(10);
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@ -1361,7 +1376,10 @@ static void neo_flush_uart_read(struct channel_t *ch)
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neo_pci_posting_flush(ch->ch_bd);
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for (i = 0; i < 10; i++) {
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/* Check to see if the UART feels it completely flushed the FIFO. */
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/*
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* Check to see if the UART feels it completely flushed the
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* FIFO.
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*/
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tmp = readb(&ch->ch_neo_uart->isr_fcr);
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if (tmp & 2)
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udelay(10);
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@ -1406,8 +1424,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch)
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ch->ch_cached_lsr &= ~(UART_LSR_THRE);
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/*
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* If RTS Toggle mode is on, turn on RTS now if not already set,
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* and make sure we get an event when the data transfer has completed.
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* If RTS Toggle mode is on, turn on RTS now if not
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* already set, and make sure we get an event when the
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* data transfer has completed.
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*/
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if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) {
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if (!(ch->ch_mostat & UART_MCR_RTS)) {
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@ -1417,8 +1436,9 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch)
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ch->ch_tun.un_flags |= (UN_EMPTY);
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}
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/*
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* If DTR Toggle mode is on, turn on DTR now if not already set,
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* and make sure we get an event when the data transfer has completed.
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* If DTR Toggle mode is on, turn on DTR now if not
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* already set, and make sure we get an event when the
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* data transfer has completed.
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*/
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if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) {
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if (!(ch->ch_mostat & UART_MCR_DTR)) {
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@ -1474,7 +1494,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch)
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/*
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* If RTS Toggle mode is on, turn on RTS now if not already set,
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* and make sure we get an event when the data transfer has completed.
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* and make sure we get an event when the data transfer has
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* completed.
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*/
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if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) {
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if (!(ch->ch_mostat & UART_MCR_RTS)) {
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@ -1486,7 +1507,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch)
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/*
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* If DTR Toggle mode is on, turn on DTR now if not already set,
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* and make sure we get an event when the data transfer has completed.
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* and make sure we get an event when the data transfer has
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* completed.
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*/
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if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) {
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if (!(ch->ch_mostat & UART_MCR_DTR)) {
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@ -1550,7 +1572,10 @@ static void neo_parse_modem(struct channel_t *ch, unsigned char signals)
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}
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}
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/* Scrub off lower bits. They signify delta's, which I don't care about */
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/*
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* Scrub off lower bits. They signify delta's, which I don't care
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* about
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*/
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msignals &= 0xf0;
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if (msignals & UART_MSR_DCD)
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