drm/i915: Drop fake breadcrumb irq
Missed breadcrumb detection is defunct due to the tight coupling with dma_fence signaling and the myriad ways we may signal fences from everywhere but from an interrupt, i.e. we frequently signal a fence before we even see its interrupt. This means that even if we miss an interrupt for a fence, it still is signaled before our breadcrumb hangcheck fires, so simplify the breadcrumb hangchecking by moving it into the GPU hangcheck and forgo fake interrupts. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190129205230.19056-3-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
Родитель
52c0fdb25c
Коммит
789659f430
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@ -1321,9 +1321,6 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused)
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intel_engine_last_submit(engine),
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jiffies_to_msecs(jiffies -
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engine->hangcheck.action_timestamp));
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seq_printf(m, "\tfake irq active? %s\n",
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yesno(test_bit(engine->id,
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&dev_priv->gpu_error.missed_irq_rings)));
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seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n",
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(long long)engine->hangcheck.acthd,
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@ -3899,94 +3896,6 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
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i915_wedged_get, i915_wedged_set,
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"%llu\n");
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static int
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fault_irq_set(struct drm_i915_private *i915,
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unsigned long *irq,
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unsigned long val)
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{
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int err;
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err = mutex_lock_interruptible(&i915->drm.struct_mutex);
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if (err)
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return err;
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err = i915_gem_wait_for_idle(i915,
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I915_WAIT_LOCKED |
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I915_WAIT_INTERRUPTIBLE,
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MAX_SCHEDULE_TIMEOUT);
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if (err)
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goto err_unlock;
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*irq = val;
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mutex_unlock(&i915->drm.struct_mutex);
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/* Flush idle worker to disarm irq */
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drain_delayed_work(&i915->gt.idle_work);
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return 0;
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err_unlock:
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mutex_unlock(&i915->drm.struct_mutex);
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return err;
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}
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static int
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i915_ring_missed_irq_get(void *data, u64 *val)
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{
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struct drm_i915_private *dev_priv = data;
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*val = dev_priv->gpu_error.missed_irq_rings;
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return 0;
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}
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static int
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i915_ring_missed_irq_set(void *data, u64 val)
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{
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struct drm_i915_private *i915 = data;
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return fault_irq_set(i915, &i915->gpu_error.missed_irq_rings, val);
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}
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DEFINE_SIMPLE_ATTRIBUTE(i915_ring_missed_irq_fops,
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i915_ring_missed_irq_get, i915_ring_missed_irq_set,
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"0x%08llx\n");
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static int
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i915_ring_test_irq_get(void *data, u64 *val)
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{
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struct drm_i915_private *dev_priv = data;
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*val = dev_priv->gpu_error.test_irq_rings;
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return 0;
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}
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static int
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i915_ring_test_irq_set(void *data, u64 val)
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{
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struct drm_i915_private *i915 = data;
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/* GuC keeps the user interrupt permanently enabled for submission */
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if (USES_GUC_SUBMISSION(i915))
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return -ENODEV;
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/*
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* From icl, we can no longer individually mask interrupt generation
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* from each engine.
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*/
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if (INTEL_GEN(i915) >= 11)
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return -ENODEV;
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val &= INTEL_INFO(i915)->ring_mask;
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DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val);
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return fault_irq_set(i915, &i915->gpu_error.test_irq_rings, val);
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}
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DEFINE_SIMPLE_ATTRIBUTE(i915_ring_test_irq_fops,
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i915_ring_test_irq_get, i915_ring_test_irq_set,
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"0x%08llx\n");
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#define DROP_UNBOUND BIT(0)
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#define DROP_BOUND BIT(1)
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#define DROP_RETIRE BIT(2)
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@ -4750,8 +4659,6 @@ static const struct i915_debugfs_files {
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} i915_debugfs_files[] = {
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{"i915_wedged", &i915_wedged_fops},
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{"i915_cache_sharing", &i915_cache_sharing_fops},
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{"i915_ring_missed_irq", &i915_ring_missed_irq_fops},
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{"i915_ring_test_irq", &i915_ring_test_irq_fops},
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{"i915_gem_drop_caches", &i915_drop_caches_fops},
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#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
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{"i915_error_state", &i915_error_state_fops},
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@ -723,8 +723,6 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
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err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
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err_printf(m, "CCID: 0x%08x\n", error->ccid);
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err_printf(m, "Missed interrupts: 0x%08lx\n",
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m->i915->gpu_error.missed_irq_rings);
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for (i = 0; i < error->nfence; i++)
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err_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
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@ -204,8 +204,6 @@ struct i915_gpu_error {
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atomic_t pending_fb_pin;
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unsigned long missed_irq_rings;
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/**
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* State variable controlling the reset flow and count
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*
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@ -274,9 +272,6 @@ struct i915_gpu_error {
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*/
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wait_queue_head_t reset_queue;
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/* For missed irq/seqno simulation. */
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unsigned long test_irq_rings;
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struct i915_gpu_restart *restart;
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};
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@ -91,7 +91,6 @@ bool intel_engine_breadcrumbs_irq(struct intel_engine_cs *engine)
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spin_lock(&b->irq_lock);
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b->irq_fired = true;
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if (b->irq_armed && list_empty(&b->signalers))
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__intel_breadcrumbs_disarm_irq(b);
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@ -172,86 +171,6 @@ static void signal_irq_work(struct irq_work *work)
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intel_engine_breadcrumbs_irq(engine);
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}
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static unsigned long wait_timeout(void)
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{
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return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
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}
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static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
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{
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if (GEM_SHOW_DEBUG()) {
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struct drm_printer p = drm_debug_printer(__func__);
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intel_engine_dump(engine, &p,
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"%s missed breadcrumb at %pS\n",
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engine->name, __builtin_return_address(0));
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}
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set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
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}
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static void intel_breadcrumbs_hangcheck(struct timer_list *t)
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{
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struct intel_engine_cs *engine =
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from_timer(engine, t, breadcrumbs.hangcheck);
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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if (!b->irq_armed)
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return;
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if (b->irq_fired)
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goto rearm;
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/*
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* We keep the hangcheck timer alive until we disarm the irq, even
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* if there are no waiters at present.
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*
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* If the waiter was currently running, assume it hasn't had a chance
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* to process the pending interrupt (e.g, low priority task on a loaded
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* system) and wait until it sleeps before declaring a missed interrupt.
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*
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* If the waiter was asleep (and not even pending a wakeup), then we
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* must have missed an interrupt as the GPU has stopped advancing
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* but we still have a waiter. Assuming all batches complete within
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* DRM_I915_HANGCHECK_JIFFIES [1.5s]!
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*/
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synchronize_hardirq(engine->i915->drm.irq);
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if (intel_engine_signal_breadcrumbs(engine)) {
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missed_breadcrumb(engine);
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mod_timer(&b->fake_irq, jiffies + 1);
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} else {
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rearm:
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b->irq_fired = false;
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mod_timer(&b->hangcheck, wait_timeout());
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}
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}
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static void intel_breadcrumbs_fake_irq(struct timer_list *t)
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{
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struct intel_engine_cs *engine =
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from_timer(engine, t, breadcrumbs.fake_irq);
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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/*
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* The timer persists in case we cannot enable interrupts,
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* or if we have previously seen seqno/interrupt incoherency
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* ("missed interrupt" syndrome, better known as a "missed breadcrumb").
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* Here the worker will wake up every jiffie in order to kick the
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* oldest waiter to do the coherent seqno check.
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*/
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if (!intel_engine_signal_breadcrumbs(engine) && !b->irq_armed)
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return;
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/* If the user has disabled the fake-irq, restore the hangchecking */
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if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings)) {
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mod_timer(&b->hangcheck, wait_timeout());
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return;
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}
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mod_timer(&b->fake_irq, jiffies + 1);
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}
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void intel_engine_pin_breadcrumbs_irq(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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@ -274,43 +193,14 @@ void intel_engine_unpin_breadcrumbs_irq(struct intel_engine_cs *engine)
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spin_unlock_irq(&b->irq_lock);
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}
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static bool use_fake_irq(const struct intel_breadcrumbs *b)
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{
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const struct intel_engine_cs *engine =
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container_of(b, struct intel_engine_cs, breadcrumbs);
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if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
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return false;
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/*
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* Only start with the heavy weight fake irq timer if we have not
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* seen any interrupts since enabling it the first time. If the
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* interrupts are still arriving, it means we made a mistake in our
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* engine->seqno_barrier(), a timing error that should be transient
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* and unlikely to reoccur.
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*/
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return !b->irq_fired;
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}
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static void enable_fake_irq(struct intel_breadcrumbs *b)
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{
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/* Ensure we never sleep indefinitely */
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if (!b->irq_enabled || use_fake_irq(b))
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mod_timer(&b->fake_irq, jiffies + 1);
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else
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mod_timer(&b->hangcheck, wait_timeout());
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}
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static bool __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
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static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
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{
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struct intel_engine_cs *engine =
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container_of(b, struct intel_engine_cs, breadcrumbs);
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struct drm_i915_private *i915 = engine->i915;
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bool enabled;
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lockdep_assert_held(&b->irq_lock);
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if (b->irq_armed)
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return false;
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return;
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/*
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* The breadcrumb irq will be disarmed on the interrupt after the
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@ -328,16 +218,8 @@ static bool __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
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* the driver is idle) we disarm the breadcrumbs.
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*/
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/* No interrupts? Kick the waiter every jiffie! */
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enabled = false;
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if (!b->irq_enabled++ &&
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!test_bit(engine->id, &i915->gpu_error.test_irq_rings)) {
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if (!b->irq_enabled++)
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irq_enable(engine);
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enabled = true;
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}
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enable_fake_irq(b);
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return enabled;
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}
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void intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
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@ -348,18 +230,6 @@ void intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
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INIT_LIST_HEAD(&b->signalers);
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init_irq_work(&b->irq_work, signal_irq_work);
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timer_setup(&b->fake_irq, intel_breadcrumbs_fake_irq, 0);
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timer_setup(&b->hangcheck, intel_breadcrumbs_hangcheck, 0);
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}
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static void cancel_fake_irq(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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del_timer_sync(&b->fake_irq); /* may queue b->hangcheck */
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del_timer_sync(&b->hangcheck);
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clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
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}
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void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
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@ -369,13 +239,6 @@ void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
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spin_lock_irqsave(&b->irq_lock, flags);
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/*
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* Leave the fake_irq timer enabled (if it is running), but clear the
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* bit so that it turns itself off on its next wake up and goes back
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* to the long hangcheck interval if still required.
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*/
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clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
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if (b->irq_enabled)
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irq_enable(engine);
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else
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@ -386,7 +249,6 @@ void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
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void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
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{
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cancel_fake_irq(engine);
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}
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bool i915_request_enable_breadcrumb(struct i915_request *rq)
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@ -482,7 +344,4 @@ void intel_engine_print_breadcrumbs(struct intel_engine_cs *engine,
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}
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}
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spin_unlock_irq(&b->irq_lock);
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if (test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
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drm_printf(p, "Fake irq active\n");
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}
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@ -275,6 +275,8 @@ static void i915_hangcheck_elapsed(struct work_struct *work)
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for_each_engine(engine, dev_priv, id) {
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struct hangcheck hc;
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intel_engine_signal_breadcrumbs(engine);
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hangcheck_load_sample(engine, &hc);
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hangcheck_accumulate_sample(engine, &hc);
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hangcheck_store_sample(engine, &hc);
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@ -387,14 +387,9 @@ struct intel_engine_cs {
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struct irq_work irq_work; /* for use from inside irq_lock */
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struct timer_list fake_irq; /* used after a missed interrupt */
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struct timer_list hangcheck; /* detect missed interrupts */
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unsigned int hangcheck_interrupts;
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unsigned int irq_enabled;
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bool irq_armed;
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bool irq_fired;
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} breadcrumbs;
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struct {
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@ -35,7 +35,6 @@ int igt_live_test_begin(struct igt_live_test *t,
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return err;
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}
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i915->gpu_error.missed_irq_rings = 0;
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t->reset_global = i915_reset_count(&i915->gpu_error);
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for_each_engine(engine, i915, id)
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@ -75,11 +74,5 @@ int igt_live_test_end(struct igt_live_test *t)
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return -EIO;
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}
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if (i915->gpu_error.missed_irq_rings) {
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pr_err("%s(%s): Missed interrupts on engines %lx\n",
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t->func, t->name, i915->gpu_error.missed_irq_rings);
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return -EIO;
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}
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return 0;
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}
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