Merge branch 'pci/misc'
- Tidy setup-irq.c comments (Pranay Sanghai) - Fix misspellings (Krzysztof Wilczyński) - Fix sprintf(), sscanf() format mismatches (Krzysztof Wilczyński) - Tidy cpqphp code formatting (Krzysztof Wilczyński) - Remove unused pci_pool wrappers, which have been replaced by dma_pool (Cai Huoqing) - Remove a redundant initialization in __pci_reset_function_locked() (Colin Ian King) - Use 'unsigned int' instead of 'unsigned' (Krzysztof Wilczyński) - Update PCI subsystem information in MAINTAINERS (Krzysztof Wilczyński) - Include generic <linux/> headers instead of <asm/> for cpqphp and vmd (Krzysztof Wilczyński) * pci/misc: PCI: vmd: Drop redundant includes of <asm/device.h>, <asm/msi.h> PCI: cpqphp: Use <linux/io.h> instead of <asm/io.h> MAINTAINERS: Update PCI subsystem information PCI: Prefer 'unsigned int' over bare 'unsigned' PCI: Remove redundant 'rc' initialization PCI: Remove unused pci_pool wrappers PCI: cpqphp: Format if-statement code block correctly PCI: Use unsigned to match sscanf("%x") in pci_dev_str_match_path() PCI: hv: Remove unnecessary use of %hx PCI: Correct misspelled and remove duplicated words PCI: Tidy comments
This commit is contained in:
Коммит
78be29ab54
17
MAINTAINERS
17
MAINTAINERS
|
@ -14440,9 +14440,12 @@ M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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R: Krzysztof Wilczyński <kw@linux.com>
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L: linux-pci@vger.kernel.org
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S: Supported
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Q: https://patchwork.kernel.org/project/linux-pci/list/
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B: https://bugzilla.kernel.org
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C: irc://irc.oftc.net/linux-pci
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git
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F: Documentation/PCI/endpoint/*
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F: Documentation/misc-devices/pci-endpoint-test.rst
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git
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F: drivers/misc/pci_endpoint_test.c
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F: drivers/pci/endpoint/
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F: tools/pci/
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@ -14488,15 +14491,21 @@ R: Rob Herring <robh@kernel.org>
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R: Krzysztof Wilczyński <kw@linux.com>
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L: linux-pci@vger.kernel.org
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S: Supported
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Q: http://patchwork.ozlabs.org/project/linux-pci/list/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/
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Q: https://patchwork.kernel.org/project/linux-pci/list/
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B: https://bugzilla.kernel.org
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C: irc://irc.oftc.net/linux-pci
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git
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F: drivers/pci/controller/
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F: drivers/pci/pci-bridge-emul.c
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F: drivers/pci/pci-bridge-emul.h
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PCI SUBSYSTEM
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M: Bjorn Helgaas <bhelgaas@google.com>
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L: linux-pci@vger.kernel.org
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S: Supported
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Q: http://patchwork.ozlabs.org/project/linux-pci/list/
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Q: https://patchwork.kernel.org/project/linux-pci/list/
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B: https://bugzilla.kernel.org
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C: irc://irc.oftc.net/linux-pci
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
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F: Documentation/PCI/
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F: Documentation/devicetree/bindings/pci/
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@ -3126,14 +3126,14 @@ static int hv_pci_probe(struct hv_device *hdev,
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if (dom == HVPCI_DOM_INVALID) {
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dev_err(&hdev->device,
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"Unable to use dom# 0x%hx or other numbers", dom_req);
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"Unable to use dom# 0x%x or other numbers", dom_req);
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ret = -EINVAL;
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goto free_bus;
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}
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if (dom != dom_req)
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dev_info(&hdev->device,
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"PCI dom# 0x%hx has collision, using 0x%hx",
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"PCI dom# 0x%x has collision, using 0x%x",
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dom_req, dom);
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hbus->bridge->domain_nr = dom;
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@ -17,7 +17,7 @@ static void set_val(u32 v, int where, int size, u32 *val)
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{
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int shift = (where & 3) * 8;
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pr_debug("set_val %04x: %08x\n", (unsigned)(where & ~3), v);
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pr_debug("set_val %04x: %08x\n", (unsigned int)(where & ~3), v);
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v >>= shift;
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if (size == 1)
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v &= 0xff;
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|
@ -187,7 +187,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
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pr_debug("%04x:%04x - Fix pass#: %08x, where: %03x, devfn: %03x\n",
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vendor_device & 0xffff, vendor_device >> 16, class_rev,
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(unsigned) where, devfn);
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(unsigned int)where, devfn);
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/* Check for non type-00 header */
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if (cfg_type == 0) {
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|
|
|
@ -302,7 +302,7 @@ static void xgene_msi_isr(struct irq_desc *desc)
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/*
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* MSIINTn (n is 0..F) indicates if there is a pending MSI interrupt
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* If bit x of this register is set (x is 0..7), one or more interupts
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* If bit x of this register is set (x is 0..7), one or more interrupts
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* corresponding to MSInIRx is set.
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*/
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grp_select = xgene_msi_int_read(xgene_msi, msi_grp);
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|
|
|
@ -145,7 +145,7 @@
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#define BRCM_INT_PCI_MSI_LEGACY_NR 8
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#define BRCM_INT_PCI_MSI_SHIFT 0
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/* MSI target adresses */
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/* MSI target addresses */
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#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL
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#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL
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|
|
|
@ -249,7 +249,7 @@ enum iproc_pcie_reg {
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/*
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* To hold the address of the register where the MSI writes are
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* programed. When ARM GICv3 ITS is used, this should be programmed
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* programmed. When ARM GICv3 ITS is used, this should be programmed
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* with the address of the GITS_TRANSLATER register.
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*/
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IPROC_PCIE_MSI_ADDR_LO,
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|
|
|
@ -18,8 +18,6 @@
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#include <linux/rcupdate.h>
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#include <asm/irqdomain.h>
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#include <asm/device.h>
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#include <asm/msi.h>
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#define VMD_CFGBAR 0
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#define VMD_MEMBAR1 2
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|
|
|
@ -700,7 +700,7 @@ EXPORT_SYMBOL_GPL(pci_epc_linkup);
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/**
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* pci_epc_init_notify() - Notify the EPF device that EPC device's core
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* initialization is completed.
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* @epc: the EPC device whose core initialization is completeds
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* @epc: the EPC device whose core initialization is completed
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*
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* Invoke to Notify the EPF device that the EPC device's initialization
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* is completed.
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|
|
|
@ -224,7 +224,7 @@ EXPORT_SYMBOL_GPL(pci_epf_add_vepf);
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* be removed
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* @epf_vf: the virtual EP function to be removed
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*
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* Invoke to remove a virtual endpoint function from the physcial endpoint
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* Invoke to remove a virtual endpoint function from the physical endpoint
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* function.
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*/
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void pci_epf_remove_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf)
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|
@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_epf_destroy);
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/**
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* pci_epf_create() - create a new PCI EPF device
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* @name: the name of the PCI EPF device. This name will be used to bind the
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* the EPF device to a EPF driver
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* EPF device to a EPF driver
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*
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* Invoke to create a new PCI EPF device by providing the name of the function
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* device.
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|
|
|
@ -22,7 +22,7 @@
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* when the bridge is scanned and it loses a refcount when the bridge
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* is removed.
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* - When a P2P bridge is present, we elevate the refcount on the subordinate
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* bus. It loses the refcount when the the driver unloads.
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* bus. It loses the refcount when the driver unloads.
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*/
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#define pr_fmt(fmt) "acpiphp_glue: " fmt
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|
|
|
@ -15,7 +15,7 @@
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#define _CPQPHP_H
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#include <linux/interrupt.h>
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#include <asm/io.h> /* for read? and write? functions */
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#include <linux/io.h> /* for read? and write? functions */
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#include <linux/delay.h> /* for delays */
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#include <linux/mutex.h>
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#include <linux/sched/signal.h> /* for signal_pending() */
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|
|
|
@ -519,7 +519,7 @@ error:
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* @head: list to search
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* @size: size of node to find, must be a power of two.
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*
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* Description: This function sorts the resource list by size and then returns
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* Description: This function sorts the resource list by size and then
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* returns the first node of "size" length that is not in the ISA aliasing
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* window. If it finds a node larger than "size" it will split it up.
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*/
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|
@ -1202,7 +1202,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
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mdelay(5);
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/* Reenable interrupts */
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/* Re-enable interrupts */
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writel(0, ctrl->hpc_reg + INT_MASK);
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pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
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|
|
|
@ -189,8 +189,10 @@ int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
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/* This should only be for x86 as it sets the Edge Level
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* Control Register
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*/
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outb((u8) (temp_word & 0xFF), 0x4d0); outb((u8) ((temp_word &
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0xFF00) >> 8), 0x4d1); rc = 0; }
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outb((u8)(temp_word & 0xFF), 0x4d0);
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outb((u8)((temp_word & 0xFF00) >> 8), 0x4d1);
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rc = 0;
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}
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return rc;
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}
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|
|
|
@ -352,7 +352,7 @@ struct resource_node {
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u32 len;
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int type; /* MEM, IO, PFMEM */
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u8 fromMem; /* this is to indicate that the range is from
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* from the Memory bucket rather than from PFMem */
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* the Memory bucket rather than from PFMem */
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struct resource_node *next;
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struct resource_node *nextRange; /* for the other mem range on bus */
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};
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|
@ -736,7 +736,7 @@ struct controller {
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int ibmphp_init_devno(struct slot **); /* This function is called from EBDA, so we need it not be static */
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int ibmphp_do_disable_slot(struct slot *slot_cur);
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int ibmphp_update_slot_info(struct slot *); /* This function is called from HPC, so we need it to not be be static */
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int ibmphp_update_slot_info(struct slot *); /* This function is called from HPC, so we need it to not be static */
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int ibmphp_configure_card(struct pci_func *, u8);
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int ibmphp_unconfigure_card(struct slot **, int);
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extern const struct hotplug_slot_ops ibmphp_hotplug_slot_ops;
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|
|
|
@ -295,7 +295,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
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mutex_lock(&slot->ctrl->cmd_lock);
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|
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if (!shpc_poll_ctrl_busy(ctrl)) {
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/* After 1 sec and and the controller is still busy */
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/* After 1 sec and the controller is still busy */
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ctrl_err(ctrl, "Controller is still busy after 1 sec\n");
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retval = -EBUSY;
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goto out;
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|
|
|
@ -579,7 +579,8 @@ err:
|
|||
return ret;
|
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}
|
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|
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static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
|
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static void __iomem *msix_map_region(struct pci_dev *dev,
|
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unsigned int nr_entries)
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{
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resource_size_t phys_addr;
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u32 table_offset;
|
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|
|
|
@ -570,7 +570,7 @@ static int pci_pm_reenable_device(struct pci_dev *pci_dev)
|
|||
{
|
||||
int retval;
|
||||
|
||||
/* if the device was enabled before suspend, reenable */
|
||||
/* if the device was enabled before suspend, re-enable */
|
||||
retval = pci_reenable_device(pci_dev);
|
||||
/*
|
||||
* if the device was busmaster before the suspend, make it busmaster
|
||||
|
|
|
@ -269,7 +269,7 @@ static int pci_dev_str_match_path(struct pci_dev *dev, const char *path,
|
|||
const char **endptr)
|
||||
{
|
||||
int ret;
|
||||
int seg, bus, slot, func;
|
||||
unsigned int seg, bus, slot, func;
|
||||
char *wpath, *p;
|
||||
char end;
|
||||
|
||||
|
@ -5324,7 +5324,7 @@ const struct attribute_group pci_dev_reset_method_attr_group = {
|
|||
*/
|
||||
int __pci_reset_function_locked(struct pci_dev *dev)
|
||||
{
|
||||
int i, m, rc = -ENOTTY;
|
||||
int i, m, rc;
|
||||
|
||||
might_sleep();
|
||||
|
||||
|
@ -6360,11 +6360,12 @@ EXPORT_SYMBOL_GPL(pci_pr3_present);
|
|||
* cannot be left as a userspace activity). DMA aliases should therefore
|
||||
* be configured via quirks, such as the PCI fixup header quirk.
|
||||
*/
|
||||
void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from, unsigned nr_devfns)
|
||||
void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from,
|
||||
unsigned int nr_devfns)
|
||||
{
|
||||
int devfn_to;
|
||||
|
||||
nr_devfns = min(nr_devfns, (unsigned) MAX_NR_DEVFNS - devfn_from);
|
||||
nr_devfns = min(nr_devfns, (unsigned int)MAX_NR_DEVFNS - devfn_from);
|
||||
devfn_to = devfn_from + nr_devfns - 1;
|
||||
|
||||
if (!dev->dma_alias_mask)
|
||||
|
|
|
@ -57,7 +57,7 @@ struct aer_stats {
|
|||
* "as seen by this device". Note that this may mean that if an
|
||||
* end point is causing problems, the AER counters may increment
|
||||
* at its link partner (e.g. root port) because the errors will be
|
||||
* "seen" by the link partner and not the the problematic end point
|
||||
* "seen" by the link partner and not the problematic end point
|
||||
* itself (which may report all counters as 0 as it never saw any
|
||||
* problems).
|
||||
*/
|
||||
|
|
|
@ -2585,11 +2585,12 @@ struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn)
|
|||
}
|
||||
EXPORT_SYMBOL(pci_scan_single_device);
|
||||
|
||||
static unsigned next_fn(struct pci_bus *bus, struct pci_dev *dev, unsigned fn)
|
||||
static unsigned int next_fn(struct pci_bus *bus, struct pci_dev *dev,
|
||||
unsigned int fn)
|
||||
{
|
||||
int pos;
|
||||
u16 cap = 0;
|
||||
unsigned next_fn;
|
||||
unsigned int next_fn;
|
||||
|
||||
if (pci_ari_enabled(bus)) {
|
||||
if (!dev)
|
||||
|
@ -2648,7 +2649,7 @@ static int only_one_child(struct pci_bus *bus)
|
|||
*/
|
||||
int pci_scan_slot(struct pci_bus *bus, int devfn)
|
||||
{
|
||||
unsigned fn, nr = 0;
|
||||
unsigned int fn, nr = 0;
|
||||
struct pci_dev *dev;
|
||||
|
||||
if (only_one_child(bus) && (devfn > 0))
|
||||
|
|
|
@ -501,7 +501,7 @@ static void quirk_s3_64M(struct pci_dev *dev)
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M);
|
||||
|
||||
static void quirk_io(struct pci_dev *dev, int pos, unsigned size,
|
||||
static void quirk_io(struct pci_dev *dev, int pos, unsigned int size,
|
||||
const char *name)
|
||||
{
|
||||
u32 region;
|
||||
|
@ -552,7 +552,7 @@ static void quirk_cs5536_vsa(struct pci_dev *dev)
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
|
||||
|
||||
static void quirk_io_region(struct pci_dev *dev, int port,
|
||||
unsigned size, int nr, const char *name)
|
||||
unsigned int size, int nr, const char *name)
|
||||
{
|
||||
u16 region;
|
||||
struct pci_bus_region bus_region;
|
||||
|
@ -666,7 +666,7 @@ static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int p
|
|||
base = devres & 0xffff;
|
||||
size = 16;
|
||||
for (;;) {
|
||||
unsigned bit = size >> 1;
|
||||
unsigned int bit = size >> 1;
|
||||
if ((bit & mask) == bit)
|
||||
break;
|
||||
size = bit;
|
||||
|
@ -692,7 +692,7 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
|
|||
mask = (devres & 0x3f) << 16;
|
||||
size = 128 << 16;
|
||||
for (;;) {
|
||||
unsigned bit = size >> 1;
|
||||
unsigned int bit = size >> 1;
|
||||
if ((bit & mask) == bit)
|
||||
break;
|
||||
size = bit;
|
||||
|
@ -806,7 +806,7 @@ static void ich6_lpc_acpi_gpio(struct pci_dev *dev)
|
|||
"ICH6 GPIO");
|
||||
}
|
||||
|
||||
static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg,
|
||||
static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned int reg,
|
||||
const char *name, int dynsize)
|
||||
{
|
||||
u32 val;
|
||||
|
@ -850,7 +850,7 @@ static void quirk_ich6_lpc(struct pci_dev *dev)
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, quirk_ich6_lpc);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, quirk_ich6_lpc);
|
||||
|
||||
static void ich7_lpc_generic_decode(struct pci_dev *dev, unsigned reg,
|
||||
static void ich7_lpc_generic_decode(struct pci_dev *dev, unsigned int reg,
|
||||
const char *name)
|
||||
{
|
||||
u32 val;
|
||||
|
@ -2700,7 +2700,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
|
|||
* then the device can't use INTx interrupts. Tegra's PCIe root ports don't
|
||||
* generate MSI interrupts for PME and AER events instead only INTx interrupts
|
||||
* are generated. Though Tegra's PCIe root ports can generate MSI interrupts
|
||||
* for other events, since PCIe specificiation doesn't support using a mix of
|
||||
* for other events, since PCIe specification doesn't support using a mix of
|
||||
* INTx and MSI/MSI-X, it is required to disable MSI interrupts to avoid port
|
||||
* service drivers registering their respective ISRs for MSIs.
|
||||
*/
|
||||
|
|
|
@ -85,7 +85,7 @@ static size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom,
|
|||
{
|
||||
void __iomem *image;
|
||||
int last_image;
|
||||
unsigned length;
|
||||
unsigned int length;
|
||||
|
||||
image = rom;
|
||||
do {
|
||||
|
|
|
@ -1525,7 +1525,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus,
|
|||
{
|
||||
struct pci_dev *dev = bus->self;
|
||||
struct resource *r;
|
||||
unsigned old_flags = 0;
|
||||
unsigned int old_flags = 0;
|
||||
struct resource *b_res;
|
||||
int idx = 1;
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
* David Miller (davem@redhat.com)
|
||||
*/
|
||||
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/errno.h>
|
||||
|
@ -28,25 +27,26 @@ void pci_assign_irq(struct pci_dev *dev)
|
|||
return;
|
||||
}
|
||||
|
||||
/* If this device is not on the primary bus, we need to figure out
|
||||
which interrupt pin it will come in on. We know which slot it
|
||||
will come in on 'cos that slot is where the bridge is. Each
|
||||
time the interrupt line passes through a PCI-PCI bridge we must
|
||||
apply the swizzle function. */
|
||||
|
||||
/*
|
||||
* If this device is not on the primary bus, we need to figure out
|
||||
* which interrupt pin it will come in on. We know which slot it
|
||||
* will come in on because that slot is where the bridge is. Each
|
||||
* time the interrupt line passes through a PCI-PCI bridge we must
|
||||
* apply the swizzle function.
|
||||
*/
|
||||
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
|
||||
/* Cope with illegal. */
|
||||
if (pin > 4)
|
||||
pin = 1;
|
||||
|
||||
if (pin) {
|
||||
/* Follow the chain of bridges, swizzling as we go. */
|
||||
/* Follow the chain of bridges, swizzling as we go. */
|
||||
if (hbrg->swizzle_irq)
|
||||
slot = (*(hbrg->swizzle_irq))(dev, &pin);
|
||||
|
||||
/*
|
||||
* If a swizzling function is not used map_irq must
|
||||
* ignore slot
|
||||
* If a swizzling function is not used, map_irq() must
|
||||
* ignore slot.
|
||||
*/
|
||||
irq = (*(hbrg->map_irq))(dev, slot, pin);
|
||||
if (irq == -1)
|
||||
|
@ -56,7 +56,9 @@ void pci_assign_irq(struct pci_dev *dev)
|
|||
|
||||
pci_dbg(dev, "assign IRQ: got %d\n", dev->irq);
|
||||
|
||||
/* Always tell the device, so the driver knows what is
|
||||
the real IRQ to use; the device does not use it. */
|
||||
/*
|
||||
* Always tell the device, so the driver knows what is the real IRQ
|
||||
* to use; the device does not use it.
|
||||
*/
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
|
||||
}
|
||||
|
|
|
@ -1502,19 +1502,8 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
|
|||
#define PCI_IRQ_ALL_TYPES \
|
||||
(PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX)
|
||||
|
||||
/* kmem_cache style wrapper around pci_alloc_consistent() */
|
||||
|
||||
#include <linux/dmapool.h>
|
||||
|
||||
#define pci_pool dma_pool
|
||||
#define pci_pool_create(name, pdev, size, align, allocation) \
|
||||
dma_pool_create(name, &pdev->dev, size, align, allocation)
|
||||
#define pci_pool_destroy(pool) dma_pool_destroy(pool)
|
||||
#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
|
||||
#define pci_pool_zalloc(pool, flags, handle) \
|
||||
dma_pool_zalloc(pool, flags, handle)
|
||||
#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
|
||||
|
||||
struct msix_entry {
|
||||
u32 vector; /* Kernel uses to write allocated vector */
|
||||
u16 entry; /* Driver uses to specify entry, OS writes */
|
||||
|
|
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