arm64: Xilinx ZynqMP dt patches for v4.9
- Fix gic ranges property - Use 64bit size cells format - Add PCIe node - Correct pmu and watchdog nodes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAle24TYACgkQykllyylKDCHRQQCbBd1XdhPR6lxk4AxPLbbfEvaQ rHQAnjM3n2yuyc0Mlqsva7/VaWHtSsZ5 =eOIL -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx into next/dt64 Pull "arm64: Xilinx ZynqMP dt patches for v4.9" from Michal Simek: - Fix gic ranges property - Use 64bit size cells format - Add PCIe node - Correct pmu and watchdog nodes * tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx: ARM64: zynqmp: Correct the watchdog timer interrupt number ARM64: zynqmp: Add missing interrupt-parent to PMU node ARM64: zynqmp: Add PCIe node ARM64: zynqmp: Use 64bit size cell format ARM64: zynqmp: Align gic ranges for 64k in device tree
This commit is contained in:
Arnd Bergmann
Коммит
78dc6663a8
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@ -29,7 +29,7 @@
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memory {
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device_type = "memory";
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reg = <0x0 0x0 0x40000000>;
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reg = <0x0 0x0 0x0 0x40000000>;
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};
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};
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@ -14,7 +14,7 @@
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/ {
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compatible = "xlnx,zynqmp";
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#address-cells = <2>;
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#size-cells = <1>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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@ -51,6 +51,7 @@
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupt-parent = <&gic>;
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interrupts = <0 143 4>,
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<0 144 4>,
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<0 145 4>,
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@ -75,15 +76,15 @@
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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ranges = <0 0 0 0 0xffffffff>;
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gic: interrupt-controller@f9010000 {
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compatible = "arm,gic-400", "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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reg = <0x0 0xf9010000 0x10000>,
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<0x0 0xf902f000 0x2000>,
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<0x0 0xf9020000 0x20000>,
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<0x0 0xf9040000 0x20000>,
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<0x0 0xf906f000 0x2000>;
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<0x0 0xf9060000 0x20000>;
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupts = <1 9 0xf04>;
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@ -93,14 +94,14 @@
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amba: amba {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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#size-cells = <2>;
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ranges;
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can0: can@ff060000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clock-names = "can_clk", "pclk";
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reg = <0x0 0xff060000 0x1000>;
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reg = <0x0 0xff060000 0x0 0x1000>;
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interrupts = <0 23 4>;
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interrupt-parent = <&gic>;
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tx-fifo-depth = <0x40>;
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@ -111,7 +112,7 @@
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clock-names = "can_clk", "pclk";
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reg = <0x0 0xff070000 0x1000>;
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reg = <0x0 0xff070000 0x0 0x1000>;
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interrupts = <0 24 4>;
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interrupt-parent = <&gic>;
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tx-fifo-depth = <0x40>;
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@ -123,7 +124,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 57 4>, <0 57 4>;
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reg = <0x0 0xff0b0000 0x1000>;
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reg = <0x0 0xff0b0000 0x0 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -134,7 +135,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 59 4>, <0 59 4>;
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reg = <0x0 0xff0c0000 0x1000>;
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reg = <0x0 0xff0c0000 0x0 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -145,7 +146,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 61 4>, <0 61 4>;
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reg = <0x0 0xff0d0000 0x1000>;
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reg = <0x0 0xff0d0000 0x0 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -156,7 +157,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 63 4>, <0 63 4>;
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reg = <0x0 0xff0e0000 0x1000>;
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reg = <0x0 0xff0e0000 0x0 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -170,7 +171,7 @@
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interrupts = <0 16 4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x0 0xff0a0000 0x1000>;
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reg = <0x0 0xff0a0000 0x0 0x1000>;
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};
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i2c0: i2c@ff020000 {
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@ -178,7 +179,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 17 4>;
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reg = <0x0 0xff020000 0x1000>;
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reg = <0x0 0xff020000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -188,15 +189,54 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 18 4>;
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reg = <0x0 0xff030000 0x1000>;
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reg = <0x0 0xff030000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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pcie: pcie@fd0e0000 {
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compatible = "xlnx,nwl-pcie-2.11";
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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msi-controller;
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device_type = "pci";
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interrupt-parent = <&gic>;
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interrupts = <0 118 4>,
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<0 117 4>,
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<0 116 4>,
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<0 115 4>, /* MSI_1 [63...32] */
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<0 114 4>; /* MSI_0 [31...0] */
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interrupt-names = "misc", "dummy", "intx",
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"msi1", "msi0";
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msi-parent = <&pcie>;
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reg = <0x0 0xfd0e0000 0x0 0x1000>,
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<0x0 0xfd480000 0x0 0x1000>,
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<0x80 0x00000000 0x0 0x1000000>;
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reg-names = "breg", "pcireg", "cfg";
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ranges = <0x02000000 0x00000000 0xe0000000 0x00000000
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0xe0000000 0x00000000 0x10000000
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/* non-prefetchable memory */
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0x43000000 0x00000006 0x00000000 0x00000006
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0x00000000 0x00000002 0x00000000>;
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/* prefetchable memory */
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
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<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
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<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
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<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
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pcie_intc: legacy-interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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};
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sata: ahci@fd0c0000 {
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compatible = "ceva,ahci-1v84";
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status = "disabled";
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reg = <0x0 0xfd0c0000 0x2000>;
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reg = <0x0 0xfd0c0000 0x0 0x2000>;
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interrupt-parent = <&gic>;
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interrupts = <0 133 4>;
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};
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@ -206,7 +246,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 48 4>;
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reg = <0x0 0xff160000 0x1000>;
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reg = <0x0 0xff160000 0x0 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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};
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@ -215,13 +255,13 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 49 4>;
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reg = <0x0 0xff170000 0x1000>;
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reg = <0x0 0xff170000 0x0 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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};
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smmu: smmu@fd800000 {
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compatible = "arm,mmu-500";
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reg = <0x0 0xfd800000 0x20000>;
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reg = <0x0 0xfd800000 0x0 0x20000>;
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#global-interrupts = <1>;
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interrupt-parent = <&gic>;
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interrupts = <0 157 4>,
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@ -236,7 +276,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 19 4>;
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reg = <0x0 0xff040000 0x1000>;
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reg = <0x0 0xff040000 0x0 0x1000>;
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clock-names = "ref_clk", "pclk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -247,7 +287,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 20 4>;
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reg = <0x0 0xff050000 0x1000>;
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reg = <0x0 0xff050000 0x0 0x1000>;
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clock-names = "ref_clk", "pclk";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -258,7 +298,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
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reg = <0x0 0xff110000 0x1000>;
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reg = <0x0 0xff110000 0x0 0x1000>;
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timer-width = <32>;
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};
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@ -267,7 +307,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
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reg = <0x0 0xff120000 0x1000>;
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reg = <0x0 0xff120000 0x0 0x1000>;
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timer-width = <32>;
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};
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@ -276,7 +316,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
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reg = <0x0 0xff130000 0x1000>;
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reg = <0x0 0xff130000 0x0 0x1000>;
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timer-width = <32>;
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};
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@ -285,7 +325,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
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reg = <0x0 0xff140000 0x1000>;
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reg = <0x0 0xff140000 0x0 0x1000>;
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timer-width = <32>;
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};
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@ -294,7 +334,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 21 4>;
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reg = <0x0 0xff000000 0x1000>;
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reg = <0x0 0xff000000 0x0 0x1000>;
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clock-names = "uart_clk", "pclk";
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};
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@ -303,7 +343,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 22 4>;
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reg = <0x0 0xff010000 0x1000>;
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reg = <0x0 0xff010000 0x0 0x1000>;
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clock-names = "uart_clk", "pclk";
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};
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@ -312,7 +352,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 65 4>;
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reg = <0x0 0xfe200000 0x40000>;
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reg = <0x0 0xfe200000 0x0 0x40000>;
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clock-names = "clk_xin", "clk_ahb";
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};
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@ -321,7 +361,7 @@
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 70 4>;
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reg = <0x0 0xfe300000 0x40000>;
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reg = <0x0 0xfe300000 0x0 0x40000>;
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clock-names = "clk_xin", "clk_ahb";
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};
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@ -329,8 +369,8 @@
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compatible = "cdns,wdt-r1p2";
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status = "disabled";
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interrupt-parent = <&gic>;
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interrupts = <0 52 1>;
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reg = <0x0 0xfd4d0000 0x1000>;
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interrupts = <0 113 1>;
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reg = <0x0 0xfd4d0000 0x0 0x1000>;
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timeout-sec = <10>;
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};
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};
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