mlxsw: reg: Add Port Module To local DataBase Register
The PMTDB register allows to query the possible module<->local port mapping than can be used in PMLP. It does not represent the actual/current mapping of the local to module. Actual mapping is only defined by PMLP. Signed-off-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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drivers/net/ethernet/mellanox/mlxsw
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@ -5766,6 +5766,69 @@ static inline void mlxsw_reg_pplr_pack(char *payload, u8 local_port,
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MLXSW_REG_PPLR_LB_TYPE_BIT_PHY_LOCAL : 0);
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}
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/* PMTDB - Port Module To local DataBase Register
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* ----------------------------------------------
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* The PMTDB register allows to query the possible module<->local port
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* mapping than can be used in PMLP. It does not represent the actual/current
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* mapping of the local to module. Actual mapping is only defined by PMLP.
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*/
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#define MLXSW_REG_PMTDB_ID 0x501A
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#define MLXSW_REG_PMTDB_LEN 0x40
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MLXSW_REG_DEFINE(pmtdb, MLXSW_REG_PMTDB_ID, MLXSW_REG_PMTDB_LEN);
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/* reg_pmtdb_slot_index
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* Slot index (0: Main board).
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pmtdb, slot_index, 0x00, 24, 4);
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/* reg_pmtdb_module
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* Module number.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pmtdb, module, 0x00, 16, 8);
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/* reg_pmtdb_ports_width
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* Port's width
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pmtdb, ports_width, 0x00, 12, 4);
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/* reg_pmtdb_num_ports
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* Number of ports in a single module (split/breakout)
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* Access: Index
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*/
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MLXSW_ITEM32(reg, pmtdb, num_ports, 0x00, 8, 4);
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enum mlxsw_reg_pmtdb_status {
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MLXSW_REG_PMTDB_STATUS_SUCCESS,
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};
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/* reg_pmtdb_status
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* Status
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* Access: RO
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*/
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MLXSW_ITEM32(reg, pmtdb, status, 0x00, 0, 4);
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/* reg_pmtdb_port_num
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* The local_port value which can be assigned to the module.
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* In case of more than one port, port<x> represent the /<x> port of
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* the module.
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* Access: RO
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*/
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MLXSW_ITEM16_INDEXED(reg, pmtdb, port_num, 0x04, 0, 8, 0x02, 0x00, false);
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static inline void mlxsw_reg_pmtdb_pack(char *payload, u8 slot_index, u8 module,
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u8 ports_width, u8 num_ports)
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{
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MLXSW_REG_ZERO(pmtdb, payload);
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mlxsw_reg_pmtdb_slot_index_set(payload, slot_index);
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mlxsw_reg_pmtdb_module_set(payload, module);
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mlxsw_reg_pmtdb_ports_width_set(payload, ports_width);
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mlxsw_reg_pmtdb_num_ports_set(payload, num_ports);
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}
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/* PMPE - Port Module Plug/Unplug Event Register
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* ---------------------------------------------
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* This register reports any operational status change of a module.
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@ -12247,6 +12310,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(pspa),
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MLXSW_REG(pmaos),
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MLXSW_REG(pplr),
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MLXSW_REG(pmtdb),
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MLXSW_REG(pmpe),
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MLXSW_REG(pddr),
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MLXSW_REG(pllp),
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