igb: Refactoring of i210 file.
This patch refactors the functions in e1000_i210.c in order to remove need for prototypes. Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Carolyn Wyborny
Jeff Kirsher
Родитель
23e0f1488f
Коммит
7916a53d20
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@ -35,11 +35,42 @@
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#include "e1000_hw.h"
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#include "e1000_i210.h"
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static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw);
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static void igb_put_hw_semaphore_i210(struct e1000_hw *hw);
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static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data);
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static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw);
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/**
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* igb_get_hw_semaphore_i210 - Acquire hardware semaphore
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* @hw: pointer to the HW structure
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*
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* Acquire the HW semaphore to access the PHY or NVM
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*/
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static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw)
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{
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u32 swsm;
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s32 ret_val = E1000_SUCCESS;
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s32 timeout = hw->nvm.word_size + 1;
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s32 i = 0;
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/* Get the FW semaphore. */
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for (i = 0; i < timeout; i++) {
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swsm = rd32(E1000_SWSM);
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wr32(E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
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/* Semaphore acquired if bit latched */
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if (rd32(E1000_SWSM) & E1000_SWSM_SWESMBI)
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break;
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udelay(50);
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}
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if (i == timeout) {
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/* Release semaphores */
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igb_put_hw_semaphore(hw);
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hw_dbg("Driver can't access the NVM\n");
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ret_val = -E1000_ERR_NVM;
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goto out;
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}
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out:
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return ret_val;
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}
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/**
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* igb_acquire_nvm_i210 - Request for access to EEPROM
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@ -67,6 +98,23 @@ void igb_release_nvm_i210(struct e1000_hw *hw)
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igb_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
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}
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/**
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* igb_put_hw_semaphore_i210 - Release hardware semaphore
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* @hw: pointer to the HW structure
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*
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* Release hardware semaphore used to access the PHY or NVM
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*/
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static void igb_put_hw_semaphore_i210(struct e1000_hw *hw)
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{
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u32 swsm;
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swsm = rd32(E1000_SWSM);
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swsm &= ~E1000_SWSM_SWESMBI;
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wr32(E1000_SWSM, swsm);
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}
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/**
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* igb_acquire_swfw_sync_i210 - Acquire SW/FW semaphore
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* @hw: pointer to the HW structure
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@ -137,60 +185,6 @@ void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
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igb_put_hw_semaphore_i210(hw);
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}
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/**
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* igb_get_hw_semaphore_i210 - Acquire hardware semaphore
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* @hw: pointer to the HW structure
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*
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* Acquire the HW semaphore to access the PHY or NVM
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**/
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static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw)
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{
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u32 swsm;
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s32 ret_val = E1000_SUCCESS;
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s32 timeout = hw->nvm.word_size + 1;
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s32 i = 0;
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/* Get the FW semaphore. */
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for (i = 0; i < timeout; i++) {
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swsm = rd32(E1000_SWSM);
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wr32(E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
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/* Semaphore acquired if bit latched */
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if (rd32(E1000_SWSM) & E1000_SWSM_SWESMBI)
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break;
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udelay(50);
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}
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if (i == timeout) {
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/* Release semaphores */
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igb_put_hw_semaphore(hw);
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hw_dbg("Driver can't access the NVM\n");
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ret_val = -E1000_ERR_NVM;
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goto out;
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}
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out:
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return ret_val;
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}
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/**
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* igb_put_hw_semaphore_i210 - Release hardware semaphore
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* @hw: pointer to the HW structure
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*
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* Release hardware semaphore used to access the PHY or NVM
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**/
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static void igb_put_hw_semaphore_i210(struct e1000_hw *hw)
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{
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u32 swsm;
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swsm = rd32(E1000_SWSM);
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swsm &= ~E1000_SWSM_SWESMBI;
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wr32(E1000_SWSM, swsm);
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}
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/**
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* igb_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register
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* @hw: pointer to the HW structure
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@ -228,49 +222,6 @@ s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,
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return status;
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}
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/**
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* igb_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
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* @hw: pointer to the HW structure
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* @offset: offset within the Shadow RAM to be written to
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* @words: number of words to write
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* @data: 16 bit word(s) to be written to the Shadow RAM
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*
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* Writes data to Shadow RAM at offset using EEWR register.
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*
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* If e1000_update_nvm_checksum is not called after this function , the
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* data will not be committed to FLASH and also Shadow RAM will most likely
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* contain an invalid checksum.
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*
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* If error code is returned, data and Shadow RAM may be inconsistent - buffer
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* partially written.
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**/
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s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data)
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{
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s32 status = E1000_SUCCESS;
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u16 i, count;
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/* We cannot hold synchronization semaphores for too long,
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* because of forceful takeover procedure. However it is more efficient
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* to write in bursts than synchronizing access for each word. */
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for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
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count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
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E1000_EERD_EEWR_MAX_COUNT : (words - i);
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if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
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status = igb_write_nvm_srwr(hw, offset, count,
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data + i);
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hw->nvm.ops.release(hw);
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} else {
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status = E1000_ERR_SWFW_SYNC;
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}
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if (status != E1000_SUCCESS)
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break;
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}
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return status;
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}
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/**
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* igb_write_nvm_srwr - Write to Shadow Ram using EEWR
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* @hw: pointer to the HW structure
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@ -328,6 +279,50 @@ out:
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return ret_val;
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}
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/**
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* igb_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
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* @hw: pointer to the HW structure
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* @offset: offset within the Shadow RAM to be written to
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* @words: number of words to write
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* @data: 16 bit word(s) to be written to the Shadow RAM
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*
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* Writes data to Shadow RAM at offset using EEWR register.
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*
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* If e1000_update_nvm_checksum is not called after this function , the
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* data will not be committed to FLASH and also Shadow RAM will most likely
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* contain an invalid checksum.
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*
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* If error code is returned, data and Shadow RAM may be inconsistent - buffer
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* partially written.
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*/
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s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data)
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{
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s32 status = E1000_SUCCESS;
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u16 i, count;
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/* We cannot hold synchronization semaphores for too long,
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* because of forceful takeover procedure. However it is more efficient
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* to write in bursts than synchronizing access for each word.
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*/
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for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
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count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
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E1000_EERD_EEWR_MAX_COUNT : (words - i);
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if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
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status = igb_write_nvm_srwr(hw, offset, count,
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data + i);
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hw->nvm.ops.release(hw);
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} else {
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status = E1000_ERR_SWFW_SYNC;
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}
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if (status != E1000_SUCCESS)
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break;
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}
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return status;
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}
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/**
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* igb_read_nvm_i211 - Read NVM wrapper function for I211
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* @hw: pointer to the HW structure
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@ -636,6 +631,28 @@ out:
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return ret_val;
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}
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/**
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* igb_pool_flash_update_done_i210 - Pool FLUDONE status.
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* @hw: pointer to the HW structure
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*
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*/
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static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)
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{
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s32 ret_val = -E1000_ERR_NVM;
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u32 i, reg;
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for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
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reg = rd32(E1000_EECD);
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if (reg & E1000_EECD_FLUDONE_I210) {
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ret_val = E1000_SUCCESS;
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break;
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}
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udelay(5);
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}
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return ret_val;
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}
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/**
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* igb_update_flash_i210 - Commit EEPROM to the flash
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* @hw: pointer to the HW structure
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@ -665,28 +682,6 @@ out:
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return ret_val;
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}
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/**
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* igb_pool_flash_update_done_i210 - Pool FLUDONE status.
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* @hw: pointer to the HW structure
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*
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**/
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s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)
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{
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s32 ret_val = -E1000_ERR_NVM;
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u32 i, reg;
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for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
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reg = rd32(E1000_EECD);
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if (reg & E1000_EECD_FLUDONE_I210) {
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ret_val = E1000_SUCCESS;
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break;
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}
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udelay(5);
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}
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return ret_val;
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}
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/**
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* igb_valid_led_default_i210 - Verify a valid default LED config
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* @hw: pointer to the HW structure
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