staging: rtl8723bs: remove obsolete commented out code
There is a bunch of messy, commented out code. Just delete it. Suggested-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: karthik alapati <mail@karthek.com> Link: https://lore.kernel.org/r/485415dbafc32710f1a8e3f7c951868f7738efe9.1613048573.git.mail@karthek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
karthik alapati
Greg Kroah-Hartman
Родитель
697805c7b3
Коммит
79795c6cf8
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@ -57,8 +57,6 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
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return 0;
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#endif
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/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); */
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OriginalValue = rtw_read32(Adapter, RegAddr);
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BitShift = phy_CalculateBitShift(BitMask);
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@ -94,8 +92,6 @@ void PHY_SetBBReg_8723B(
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return;
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#endif
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/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
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if (BitMask != bMaskDWord) { /* if not "double word" write */
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OriginalValue = rtw_read32(Adapter, RegAddr);
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BitShift = phy_CalculateBitShift(BitMask);
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@ -159,13 +155,9 @@ static u32 phy_RFSerialRead_8723B(
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if (RfPiEnable) {
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/* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */
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retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData);
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/* RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); */
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} else {
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/* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */
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retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData);
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/* RT_DISP(FINIT, INIT_RF, ("Readback from RF-SI : 0x%x\n", retValue)); */
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}
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return retValue;
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@ -230,15 +222,11 @@ static void phy_RFSerialWrite_8723B(
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/* */
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/* Put write addr in [5:0] and write data in [31:16] */
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/* */
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/* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */
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DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */
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/* */
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/* Write Operation */
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/* */
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PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
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/* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */
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}
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@ -473,7 +461,6 @@ int PHY_RFConfig8723B(struct adapter *Adapter)
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rtStatus = PHY_RF6052_Config8723B(Adapter);
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phy_LCK_8723B(Adapter);
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/* PHY_BB8723B_Config_1T(Adapter); */
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return rtStatus;
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}
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@ -580,8 +567,6 @@ u8 PHY_GetTxPowerIndex(
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s8 txPower = 0, powerDiffByRate = 0, limit = 0;
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bool bIn24G = false;
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/* DBG_871X("===>%s\n", __func__); */
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txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel, &bIn24G);
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powerDiffByRate = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, Rate);
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@ -603,7 +588,6 @@ u8 PHY_GetTxPowerIndex(
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if (txPower > MAX_POWER_INDEX)
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txPower = MAX_POWER_INDEX;
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/* DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath == 0)?'A':'B'), Channel, txPower, txPower)); */
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return (u8) txPower;
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}
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@ -750,8 +734,6 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
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PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
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/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); */
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PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0);
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break;
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@ -766,15 +748,9 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
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PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
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/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); */
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PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
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break;
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default:
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/*RT_TRACE(COMP_DBG, DBG_LOUD, ("phy_SetBWMode8723B(): unknown Bandwidth: %#X\n"\
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, pHalData->CurrentChannelBW));*/
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break;
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}
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@ -787,10 +763,8 @@ static void phy_SwChnl8723B(struct adapter *padapter)
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struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
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u8 channelToSW = pHalData->CurrentChannel;
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if (pHalData->rf_chip == RF_PSEUDO_11N) {
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/* RT_TRACE(COMP_MLME, DBG_LOUD, ("phy_SwChnl8723B: return for PSEUDO\n")); */
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if (pHalData->rf_chip == RF_PSEUDO_11N)
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return;
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}
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pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW);
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PHY_SetRFReg(padapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
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PHY_SetRFReg(padapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
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@ -802,7 +776,6 @@ static void phy_SwChnlAndSetBwMode8723B(struct adapter *Adapter)
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{
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struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
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/* RT_TRACE(COMP_SCAN, DBG_LOUD, ("phy_SwChnlAndSetBwMode8723B(): bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW)); */
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if (Adapter->bNotifyChannelChange) {
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DBG_871X("[%s] bSwChnl =%d, ch =%d, bSetChnlBW =%d, bw =%d\n",
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__func__,
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@ -847,8 +820,6 @@ static void PHY_HandleSwChnlAndSetBW8723B(
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u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC;
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u8 tmpCenterFrequencyIndex1 = pHalData->CurrentCenterFrequencyIndex1;
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/* DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d\n", bSwitchChannel, bSetBandWidth); */
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/* check is swchnl or setbw */
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if (!bSwitchChannel && !bSetBandWidth) {
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DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth\n");
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@ -857,7 +828,6 @@ static void PHY_HandleSwChnlAndSetBW8723B(
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/* skip change for channel or bandwidth is the same */
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if (bSwitchChannel) {
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/* if (pHalData->CurrentChannel != ChannelNum) */
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{
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if (HAL_IsLegalChannel(Adapter, ChannelNum))
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pHalData->bSwChnl = true;
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@ -867,10 +837,8 @@ static void PHY_HandleSwChnlAndSetBW8723B(
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if (bSetBandWidth)
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pHalData->bSetChnlBW = true;
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if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) {
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/* DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW); */
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if (!pHalData->bSetChnlBW && !pHalData->bSwChnl)
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return;
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}
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if (pHalData->bSwChnl) {
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@ -929,9 +897,5 @@ void PHY_SetSwChnlBWMode8723B(
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u8 Offset80
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)
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{
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/* DBG_871X("%s() ===>\n", __func__); */
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PHY_HandleSwChnlAndSetBW8723B(Adapter, true, true, channel, Bandwidth, Offset40, Offset80, channel);
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/* DBG_871X("<==%s()\n", __func__); */
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}
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