OMAPDSS: DISPC: remove OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES
DISPC can drive data lines either on rising or falling pixel clock edge, which can be configured by the user. Sync lines can also be driven on rising or falling pixel clock edge, but additionally the HW can be configured to drive the sync lines on opposite clock edge from the data lines. This opposite edge setting does not make any sense, as the same effect can be achieved by just setting the sync lines to be driven on the other edge compared to the data lines. It feels like some kind of backward compatibility option, even if all DSS versions seem to have the same implementation. To simplify the code and configuration of the signals, and to make the dispc timings more compatible with what is used on other platforms, let's just remove the whole opposite-edge support. The drivers that used OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES setting are changed so that they use the opposite setting from the data edge. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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6246c8b57c
Коммит
7a16360d56
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@ -102,7 +102,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
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timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
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timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
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timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
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}
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static enum drm_connector_status omap_connector_detect(
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@ -37,7 +37,7 @@ static const struct omap_video_timings dvic_default_timings = {
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.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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};
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struct panel_drv_data {
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@ -37,7 +37,7 @@ static struct omap_video_timings lb035q02_timings = {
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.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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};
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struct panel_drv_data {
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@ -54,7 +54,7 @@ static const struct omap_video_timings sharp_ls_timings = {
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.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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};
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#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
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@ -108,7 +108,7 @@ static const struct omap_video_timings acx565akm_panel_timings = {
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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};
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#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
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@ -58,7 +58,7 @@ static struct omap_video_timings td028ttec1_panel_timings = {
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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};
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#define JBT_COMMAND 0x000
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@ -91,7 +91,7 @@ static const struct omap_video_timings tpo_td043_timings = {
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.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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};
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#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
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@ -2934,22 +2934,18 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
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case OMAPDSS_DRIVE_SIG_FALLING_EDGE:
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ipc = true;
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break;
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case OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES:
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default:
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BUG();
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}
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/* always use the 'rf' setting */
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onoff = true;
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switch (sync_pclk_edge) {
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case OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES:
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onoff = false;
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rf = false;
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break;
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case OMAPDSS_DRIVE_SIG_FALLING_EDGE:
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onoff = true;
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rf = false;
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break;
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case OMAPDSS_DRIVE_SIG_RISING_EDGE:
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onoff = true;
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rf = true;
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break;
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default:
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@ -295,7 +295,9 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
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OMAPDSS_DRIVE_SIG_RISING_EDGE :
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OMAPDSS_DRIVE_SIG_FALLING_EDGE;
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ovt->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
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ovt->sync_pclk_edge = vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE ?
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OMAPDSS_DRIVE_SIG_FALLING_EDGE :
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OMAPDSS_DRIVE_SIG_RISING_EDGE;
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}
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EXPORT_SYMBOL(videomode_to_omap_video_timings);
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@ -4137,7 +4137,7 @@ static int dsi_display_init_dispc(struct platform_device *dsidev,
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dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
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dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
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dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
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dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
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dss_mgr_set_timings(mgr, &dsi->timings);
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@ -869,7 +869,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
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rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
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rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
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rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
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rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
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dss_mgr_set_timings(mgr, &rfbi.timings);
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}
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@ -2073,7 +2073,7 @@ static int omapfb_mode_to_timings(const char *mode_str,
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} else {
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timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
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timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
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timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
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}
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timings->pixelclock = PICOS2KHZ(var->pixclock) * 1000;
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@ -2223,7 +2223,7 @@ static void fb_videomode_to_omap_timings(struct fb_videomode *m,
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} else {
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t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
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t->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
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t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
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t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
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}
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t->x_res = m->xres;
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@ -134,7 +134,6 @@ enum omap_dss_signal_level {
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};
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enum omap_dss_signal_edge {
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OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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OMAPDSS_DRIVE_SIG_RISING_EDGE,
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OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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};
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