[TG3]: Add tg3_poll_fw().
Put the firmware polling logic into a separate function. This makes the code cleaner. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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7a6f436944
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@ -4662,6 +4662,35 @@ static void tg3_write_sig_legacy(struct tg3 *tp, int kind)
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}
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}
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static int tg3_poll_fw(struct tg3 *tp)
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{
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int i;
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u32 val;
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/* Wait for firmware initialization to complete. */
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for (i = 0; i < 100000; i++) {
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tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val);
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if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
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break;
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udelay(10);
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}
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/* Chip might not be fitted with firmware. Some Sun onboard
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* parts are configured like that. So don't signal the timeout
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* of the above loop as an error, but do report the lack of
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* running firmware once.
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*/
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if (i >= 100000 &&
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!(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) {
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tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED;
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printk(KERN_INFO PFX "%s: No firmware running.\n",
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tp->dev->name);
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}
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return 0;
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}
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static void tg3_stop_fw(struct tg3 *);
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/* tp->lock is held. */
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@ -4669,7 +4698,7 @@ static int tg3_chip_reset(struct tg3 *tp)
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{
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u32 val;
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void (*write_op)(struct tg3 *, u32, u32);
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int i;
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int err;
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tg3_nvram_lock(tp);
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@ -4829,26 +4858,9 @@ static int tg3_chip_reset(struct tg3 *tp)
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tw32_f(MAC_MODE, 0);
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udelay(40);
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/* Wait for firmware initialization to complete. */
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for (i = 0; i < 100000; i++) {
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tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val);
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if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
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break;
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udelay(10);
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}
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/* Chip might not be fitted with firmare. Some Sun onboard
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* parts are configured like that. So don't signal the timeout
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* of the above loop as an error, but do report the lack of
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* running firmware once.
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*/
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if (i >= 100000 &&
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!(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) {
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tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED;
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printk(KERN_INFO PFX "%s: No firmware running.\n",
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tp->dev->name);
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}
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err = tg3_poll_fw(tp);
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if (err)
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return err;
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if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
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tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
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