[POWERPC] bestcomm: GenBD task support
This is the microcode for the GenBD task and the associated support code. This is a generic task that copy data to/from a hardware FIFO. This is currently locked to 32bits wide access but could be extended as needed. The microcode itself comes directly from the offical API (v2.2) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Sylvain Munaut
Grant Likely
Родитель
ba11c79aba
Коммит
7acb939130
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@ -30,3 +30,10 @@ config PPC_BESTCOMM_FEC
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help
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This option enables the support for the FEC tasks.
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config PPC_BESTCOMM_GEN_BD
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tristate "Bestcomm GenBD tasks support"
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depends on PPC_BESTCOMM
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default n
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help
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This option enables the support for the GenBD tasks.
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@ -5,8 +5,10 @@
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bestcomm-core-objs := bestcomm.o sram.o
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bestcomm-ata-objs := ata.o bcom_ata_task.o
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bestcomm-fec-objs := fec.o bcom_fec_rx_task.o bcom_fec_tx_task.o
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bestcomm-gen-bd-objs := gen_bd.o bcom_gen_bd_rx_task.o bcom_gen_bd_tx_task.o
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obj-$(CONFIG_PPC_BESTCOMM) += bestcomm-core.o
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obj-$(CONFIG_PPC_BESTCOMM_ATA) += bestcomm-ata.o
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obj-$(CONFIG_PPC_BESTCOMM_FEC) += bestcomm-fec.o
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obj-$(CONFIG_PPC_BESTCOMM_GEN_BD) += bestcomm-gen-bd.o
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@ -0,0 +1,63 @@
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/*
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* Bestcomm GenBD RX task microcode
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*
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* Copyright (C) 2006 AppSpec Computer Technologies Corp.
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* Jeff Gibbons <jeff.gibbons@appspec.com>
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
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* on Tue Mar 4 10:14:12 2006 GMT
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*
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*/
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#include <asm/types.h>
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/*
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* The header consists of the following fields:
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* u32 magic;
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* u8 desc_size;
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* u8 var_size;
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* u8 inc_size;
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* u8 first_var;
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* u8 reserved[8];
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*
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* The size fields contain the number of 32-bit words.
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*/
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u32 bcom_gen_bd_rx_task[] = {
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/* header */
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0x4243544b,
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0x0d020409,
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0x00000000,
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0x00000000,
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/* Task descriptors */
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0x808220da, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc3, idx1 += inc2 */
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0x13e01010, /* DRD1A: var4 = var2; FN=0 MORE init=31 WS=0 RS=0 */
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0xb880025b, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc3, idx3 += inc3 */
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0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
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0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
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0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */
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0xd9190240, /* LCDEXT: idx2 = idx2; idx2 > var9; idx2 += inc0 */
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0xb8c5e009, /* LCD: idx3 = *(idx1 + var00000015); ; idx3 += inc1 */
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0x07fecf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=31 WS=3 RS=3 */
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0x99190024, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc4 */
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0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
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0x0c4cf889, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var9) */
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0x000001f8, /* NOP */
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/* VAR[9]-VAR[10] */
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0x40000000,
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0x7fff7fff,
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/* INC[0]-INC[3] */
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0x40000000,
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0xe0000000,
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0xa0000008,
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0x20000000,
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};
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@ -0,0 +1,69 @@
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/*
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* Bestcomm GenBD TX task microcode
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*
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* Copyright (C) 2006 AppSpec Computer Technologies Corp.
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* Jeff Gibbons <jeff.gibbons@appspec.com>
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
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* on Tue Mar 4 10:14:12 2006 GMT
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*
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*/
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#include <asm/types.h>
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/*
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* The header consists of the following fields:
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* u32 magic;
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* u8 desc_size;
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* u8 var_size;
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* u8 inc_size;
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* u8 first_var;
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* u8 reserved[8];
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*
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* The size fields contain the number of 32-bit words.
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*/
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u32 bcom_gen_bd_tx_task[] = {
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/* header */
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0x4243544b,
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0x0f040609,
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0x00000000,
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0x00000000,
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/* Task descriptors */
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0x800220e3, /* LCD: idx0 = var0, idx1 = var4; idx1 <= var3; idx0 += inc4, idx1 += inc3 */
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0x13e01010, /* DRD1A: var4 = var2; FN=0 MORE init=31 WS=0 RS=0 */
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0xb8808264, /* LCD: idx2 = *idx1, idx3 = var1; idx2 < var9; idx2 += inc4, idx3 += inc4 */
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0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
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0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
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0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */
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0xd9190300, /* LCDEXT: idx2 = idx2; idx2 > var12; idx2 += inc0 */
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0xb8c5e009, /* LCD: idx3 = *(idx1 + var00000015); ; idx3 += inc1 */
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0x03fec398, /* DRD1A: *idx0 = *idx3; FN=0 init=31 WS=3 RS=3 */
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0x9919826a, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var9; idx2 += inc5, idx3 += inc2 */
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0x0feac398, /* DRD1A: *idx0 = *idx3; FN=0 TFD INT init=31 WS=1 RS=1 */
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0x99190036, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc6 */
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0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
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0x0c4cf889, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var9) */
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0x000001f8, /* NOP */
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/* VAR[9]-VAR[12] */
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0x40000000,
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0x7fff7fff,
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0x00000000,
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0x40000004,
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/* INC[0]-INC[5] */
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0x40000000,
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0xe0000000,
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0xe0000000,
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0xa0000008,
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0x20000000,
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0x4000ffff,
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};
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@ -0,0 +1,260 @@
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/*
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* Driver for MPC52xx processor BestComm General Buffer Descriptor
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*
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* Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2006 AppSpec Computer Technologies Corp.
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* Jeff Gibbons <jeff.gibbons@appspec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/mpc52xx.h>
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#include "bestcomm.h"
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#include "bestcomm_priv.h"
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#include "gen_bd.h"
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/* ======================================================================== */
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/* Task image/var/inc */
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/* ======================================================================== */
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/* gen_bd tasks images */
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extern u32 bcom_gen_bd_rx_task[];
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extern u32 bcom_gen_bd_tx_task[];
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/* rx task vars that need to be set before enabling the task */
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struct bcom_gen_bd_rx_var {
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u32 enable; /* (u16*) address of task's control register */
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u32 fifo; /* (u32*) address of gen_bd's fifo */
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u32 bd_base; /* (struct bcom_bd*) beginning of ring buffer */
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u32 bd_last; /* (struct bcom_bd*) end of ring buffer */
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u32 bd_start; /* (struct bcom_bd*) current bd */
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u32 buffer_size; /* size of receive buffer */
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};
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/* rx task incs that need to be set before enabling the task */
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struct bcom_gen_bd_rx_inc {
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u16 pad0;
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s16 incr_bytes;
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u16 pad1;
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s16 incr_dst;
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};
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/* tx task vars that need to be set before enabling the task */
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struct bcom_gen_bd_tx_var {
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u32 fifo; /* (u32*) address of gen_bd's fifo */
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u32 enable; /* (u16*) address of task's control register */
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u32 bd_base; /* (struct bcom_bd*) beginning of ring buffer */
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u32 bd_last; /* (struct bcom_bd*) end of ring buffer */
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u32 bd_start; /* (struct bcom_bd*) current bd */
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u32 buffer_size; /* set by uCode for each packet */
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};
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/* tx task incs that need to be set before enabling the task */
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struct bcom_gen_bd_tx_inc {
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u16 pad0;
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s16 incr_bytes;
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u16 pad1;
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s16 incr_src;
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u16 pad2;
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s16 incr_src_ma;
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};
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/* private structure */
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struct bcom_gen_bd_priv {
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phys_addr_t fifo;
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int initiator;
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int ipr;
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int maxbufsize;
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};
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/* ======================================================================== */
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/* Task support code */
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/* ======================================================================== */
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struct bcom_task *
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bcom_gen_bd_rx_init(int queue_len, phys_addr_t fifo,
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int initiator, int ipr, int maxbufsize)
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{
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struct bcom_task *tsk;
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struct bcom_gen_bd_priv *priv;
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tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_gen_bd),
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sizeof(struct bcom_gen_bd_priv));
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if (!tsk)
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return NULL;
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tsk->flags = BCOM_FLAGS_NONE;
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priv = tsk->priv;
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priv->fifo = fifo;
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priv->initiator = initiator;
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priv->ipr = ipr;
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priv->maxbufsize = maxbufsize;
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if (bcom_gen_bd_rx_reset(tsk)) {
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bcom_task_free(tsk);
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return NULL;
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}
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return tsk;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_rx_init);
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int
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bcom_gen_bd_rx_reset(struct bcom_task *tsk)
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{
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struct bcom_gen_bd_priv *priv = tsk->priv;
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struct bcom_gen_bd_rx_var *var;
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struct bcom_gen_bd_rx_inc *inc;
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/* Shutdown the task */
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bcom_disable_task(tsk->tasknum);
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/* Reset the microcode */
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var = (struct bcom_gen_bd_rx_var *) bcom_task_var(tsk->tasknum);
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inc = (struct bcom_gen_bd_rx_inc *) bcom_task_inc(tsk->tasknum);
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if (bcom_load_image(tsk->tasknum, bcom_gen_bd_rx_task))
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return -1;
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var->enable = bcom_eng->regs_base +
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offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
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var->fifo = (u32) priv->fifo;
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var->bd_base = tsk->bd_pa;
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var->bd_last = tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
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var->bd_start = tsk->bd_pa;
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var->buffer_size = priv->maxbufsize;
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inc->incr_bytes = -(s16)sizeof(u32);
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inc->incr_dst = sizeof(u32);
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/* Reset the BDs */
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tsk->index = 0;
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tsk->outdex = 0;
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memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
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/* Configure some stuff */
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bcom_set_task_pragma(tsk->tasknum, BCOM_GEN_RX_BD_PRAGMA);
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bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
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out_8(&bcom_eng->regs->ipr[priv->initiator], priv->ipr);
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bcom_set_initiator(tsk->tasknum, priv->initiator);
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out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_rx_reset);
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void
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bcom_gen_bd_rx_release(struct bcom_task *tsk)
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{
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/* Nothing special for the GenBD tasks */
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bcom_task_free(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_rx_release);
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extern struct bcom_task *
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bcom_gen_bd_tx_init(int queue_len, phys_addr_t fifo,
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int initiator, int ipr)
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{
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struct bcom_task *tsk;
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struct bcom_gen_bd_priv *priv;
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tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_gen_bd),
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sizeof(struct bcom_gen_bd_priv));
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if (!tsk)
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return NULL;
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tsk->flags = BCOM_FLAGS_NONE;
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priv = tsk->priv;
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priv->fifo = fifo;
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priv->initiator = initiator;
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priv->ipr = ipr;
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if (bcom_gen_bd_tx_reset(tsk)) {
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bcom_task_free(tsk);
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return NULL;
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}
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return tsk;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_init);
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int
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bcom_gen_bd_tx_reset(struct bcom_task *tsk)
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{
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struct bcom_gen_bd_priv *priv = tsk->priv;
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struct bcom_gen_bd_tx_var *var;
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struct bcom_gen_bd_tx_inc *inc;
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/* Shutdown the task */
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bcom_disable_task(tsk->tasknum);
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/* Reset the microcode */
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var = (struct bcom_gen_bd_tx_var *) bcom_task_var(tsk->tasknum);
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inc = (struct bcom_gen_bd_tx_inc *) bcom_task_inc(tsk->tasknum);
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if (bcom_load_image(tsk->tasknum, bcom_gen_bd_tx_task))
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return -1;
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var->enable = bcom_eng->regs_base +
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offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
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var->fifo = (u32) priv->fifo;
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var->bd_base = tsk->bd_pa;
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var->bd_last = tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
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var->bd_start = tsk->bd_pa;
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inc->incr_bytes = -(s16)sizeof(u32);
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inc->incr_src = sizeof(u32);
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inc->incr_src_ma = sizeof(u8);
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/* Reset the BDs */
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tsk->index = 0;
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tsk->outdex = 0;
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memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
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/* Configure some stuff */
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bcom_set_task_pragma(tsk->tasknum, BCOM_GEN_TX_BD_PRAGMA);
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bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
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out_8(&bcom_eng->regs->ipr[priv->initiator], priv->ipr);
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bcom_set_initiator(tsk->tasknum, priv->initiator);
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out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_reset);
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void
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bcom_gen_bd_tx_release(struct bcom_task *tsk)
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{
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/* Nothing special for the GenBD tasks */
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bcom_task_free(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_release);
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MODULE_DESCRIPTION("BestComm General Buffer Descriptor tasks driver");
|
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MODULE_AUTHOR("Jeff Gibbons <jeff.gibbons@appspec.com>");
|
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,48 @@
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/*
|
||||
* Header for Bestcomm General Buffer Descriptor tasks driver
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
|
||||
* Copyright (C) 2006 AppSpec Computer Technologies Corp.
|
||||
* Jeff Gibbons <jeff.gibbons@appspec.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __BESTCOMM_GEN_BD_H__
|
||||
#define __BESTCOMM_GEN_BD_H__
|
||||
|
||||
struct bcom_gen_bd {
|
||||
u32 status;
|
||||
u32 buf_pa;
|
||||
};
|
||||
|
||||
|
||||
extern struct bcom_task *
|
||||
bcom_gen_bd_rx_init(int queue_len, phys_addr_t fifo,
|
||||
int initiator, int ipr, int maxbufsize);
|
||||
|
||||
extern int
|
||||
bcom_gen_bd_rx_reset(struct bcom_task *tsk);
|
||||
|
||||
extern void
|
||||
bcom_gen_bd_rx_release(struct bcom_task *tsk);
|
||||
|
||||
|
||||
extern struct bcom_task *
|
||||
bcom_gen_bd_tx_init(int queue_len, phys_addr_t fifo,
|
||||
int initiator, int ipr);
|
||||
|
||||
extern int
|
||||
bcom_gen_bd_tx_reset(struct bcom_task *tsk);
|
||||
|
||||
extern void
|
||||
bcom_gen_bd_tx_release(struct bcom_task *tsk);
|
||||
|
||||
|
||||
#endif /* __BESTCOMM_GEN_BD_H__ */
|
||||
|
||||
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