OMAP2xxx IO mapping: mark DSP mappings as being 2420-only
Out of the three major OMAP2 chip types, OMAP2420, OMAP2430, and OMAP3430, we only map the IVA on OMAP2420. The memory mapping is not shared between OMAP2420 and OMAP2430, so it is inappropriate to label those macros as '24XX'; this patch changes them to '2420'. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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98bb155130
Коммит
7adb998717
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@ -72,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
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#ifdef CONFIG_ARCH_OMAP2420
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static struct map_desc omap242x_io_desc[] __initdata = {
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{
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.virtual = DSP_MEM_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
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.length = DSP_MEM_24XX_SIZE,
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.virtual = DSP_MEM_2420_VIRT,
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.pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
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.length = DSP_MEM_2420_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = DSP_IPI_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS),
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.length = DSP_IPI_24XX_SIZE,
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.virtual = DSP_IPI_2420_VIRT,
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.pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
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.length = DSP_IPI_2420_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = DSP_MMU_24XX_VIRT,
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.pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS),
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.length = DSP_MMU_24XX_SIZE,
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.virtual = DSP_MMU_2420_VIRT,
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.pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
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.length = DSP_MMU_2420_SIZE,
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.type = MT_DEVICE
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},
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};
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@ -122,16 +122,18 @@
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#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP243X_SMS_SIZE SZ_1M
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/* DSP */
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#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
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#define DSP_MEM_24XX_VIRT 0xe0000000
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#define DSP_MEM_24XX_SIZE 0x28000
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#define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */
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#define DSP_IPI_24XX_VIRT 0xe1000000
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#define DSP_IPI_24XX_SIZE SZ_4K
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#define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */
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#define DSP_MMU_24XX_VIRT 0xe2000000
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#define DSP_MMU_24XX_SIZE SZ_4K
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/* 2420 IVA */
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#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
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#define DSP_MEM_2420_VIRT 0xe0000000
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#define DSP_MEM_2420_SIZE 0x28000
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#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */
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#define DSP_IPI_2420_VIRT 0xe1000000
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#define DSP_IPI_2420_SIZE SZ_4K
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#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */
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#define DSP_MMU_2420_VIRT 0xe2000000
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#define DSP_MMU_2420_SIZE SZ_4K
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/* 2430 IVA2.1 - currently unmapped */
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/*
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* ----------------------------------------------------------------------------
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@ -182,16 +184,7 @@
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#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP343X_SDRC_SIZE SZ_1M
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/* DSP */
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#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */
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#define DSP_MEM_34XX_VIRT 0xe0000000
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#define DSP_MEM_34XX_SIZE 0x28000
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#define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */
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#define DSP_IPI_34XX_VIRT 0xe1000000
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#define DSP_IPI_34XX_SIZE SZ_4K
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#define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */
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#define DSP_MMU_34XX_VIRT 0xe2000000
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#define DSP_MMU_34XX_SIZE SZ_4K
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/* 3430 IVA - currently unmapped */
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/*
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* ----------------------------------------------------------------------------
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@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
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return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
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}
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if (cpu_is_omap2420()) {
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if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE))
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return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT);
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if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE))
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return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE);
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if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE))
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return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT);
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if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
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return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
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if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
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return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
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if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
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return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
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}
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if (cpu_is_omap2430()) {
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if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
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