msm_serial: fix clock rate on DMA-based uarts
The driver explicitly requests a clock rate for the UART, but it is off by a factor of four from the dividers that it programs into the UART. Fix this by setting the rate to 1/4 of the current value. Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -896,7 +896,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
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return PTR_ERR(msm_port->clk);
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return PTR_ERR(msm_port->clk);
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if (msm_port->is_uartdm)
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if (msm_port->is_uartdm)
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clk_set_rate(msm_port->clk, 7372800);
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clk_set_rate(msm_port->clk, 1843200);
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port->uartclk = clk_get_rate(msm_port->clk);
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port->uartclk = clk_get_rate(msm_port->clk);
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printk(KERN_INFO "uartclk = %d\n", port->uartclk);
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printk(KERN_INFO "uartclk = %d\n", port->uartclk);
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