iio: adc: ad7124: allow more than 8 channels
Currently AD7124-8 driver cannot use more than 8 IIO channels because it was assigning the channel configurations bijectively to channels specified in the device-tree. This is not possible to do when using more than 8 channels as AD7124-8 has only 8 configuration registers. To allow the user to use all channels at once the driver will keep in memory configurations for all channels but will program only 8 of them at a time on the device. If multiple channels have the same configuration, only one configuration register will be used. If there are more configurations than available registers only the last 8 used configurations will be allowed to exist on the device in a LRU fashion. Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210311091154.47785-2-alexandru.tachici@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Alexandru Tachici
Jonathan Cameron
Родитель
941f66765a
Коммит
7b8d045e49
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@ -5,12 +5,14 @@
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* Copyright 2018 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/kfifo.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regulator/consumer.h>
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@ -86,6 +88,10 @@
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#define AD7124_SINC3_FILTER 2
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#define AD7124_SINC4_FILTER 0
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#define AD7124_CONF_ADDR_OFFSET 20
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#define AD7124_MAX_CONFIGS 8
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#define AD7124_MAX_CHANNELS 16
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enum ad7124_ids {
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ID_AD7124_4,
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ID_AD7124_8,
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@ -136,25 +142,37 @@ struct ad7124_chip_info {
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};
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struct ad7124_channel_config {
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bool live;
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unsigned int cfg_slot;
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enum ad7124_ref_sel refsel;
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bool bipolar;
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bool buf_positive;
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bool buf_negative;
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unsigned int ain;
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unsigned int vref_mv;
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unsigned int pga_bits;
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unsigned int odr;
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unsigned int odr_sel_bits;
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unsigned int filter_type;
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};
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struct ad7124_channel {
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unsigned int nr;
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struct ad7124_channel_config cfg;
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unsigned int ain;
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unsigned int slot;
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};
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struct ad7124_state {
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const struct ad7124_chip_info *chip_info;
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struct ad_sigma_delta sd;
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struct ad7124_channel_config *channel_config;
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struct ad7124_channel *channels;
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struct regulator *vref[4];
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struct clk *mclk;
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unsigned int adc_control;
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unsigned int num_channels;
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struct mutex cfgs_lock; /* lock for configs access */
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unsigned long cfg_slots_status; /* bitmap with slot status (1 means it is used) */
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DECLARE_KFIFO(live_cfgs_fifo, struct ad7124_channel_config *, AD7124_MAX_CONFIGS);
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};
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static const struct iio_chan_spec ad7124_channel_template = {
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@ -238,33 +256,9 @@ static int ad7124_set_mode(struct ad_sigma_delta *sd,
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return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control);
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}
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static int ad7124_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
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{
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struct ad7124_state *st = container_of(sd, struct ad7124_state, sd);
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unsigned int val;
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val = st->channel_config[channel].ain | AD7124_CHANNEL_EN(1) |
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AD7124_CHANNEL_SETUP(channel);
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return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(channel), 2, val);
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}
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static const struct ad_sigma_delta_info ad7124_sigma_delta_info = {
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.set_channel = ad7124_set_channel,
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.set_mode = ad7124_set_mode,
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.has_registers = true,
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.addr_shift = 0,
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.read_mask = BIT(6),
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.data_reg = AD7124_DATA,
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.irq_flags = IRQF_TRIGGER_FALLING,
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};
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static int ad7124_set_channel_odr(struct ad7124_state *st,
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unsigned int channel,
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unsigned int odr)
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static void ad7124_set_channel_odr(struct ad7124_state *st, unsigned int channel, unsigned int odr)
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{
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unsigned int fclk, odr_sel_bits;
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int ret;
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fclk = clk_get_rate(st->mclk);
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/*
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@ -280,36 +274,12 @@ static int ad7124_set_channel_odr(struct ad7124_state *st,
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else if (odr_sel_bits > 2047)
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odr_sel_bits = 2047;
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ret = ad7124_spi_write_mask(st, AD7124_FILTER(channel),
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AD7124_FILTER_FS_MSK,
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AD7124_FILTER_FS(odr_sel_bits), 3);
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if (ret < 0)
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return ret;
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if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits)
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st->channels[channel].cfg.live = false;
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/* fADC = fCLK / (FS[10:0] x 32) */
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st->channel_config[channel].odr =
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DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32);
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return 0;
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}
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static int ad7124_set_channel_gain(struct ad7124_state *st,
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unsigned int channel,
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unsigned int gain)
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{
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unsigned int res;
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int ret;
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res = ad7124_find_closest_match(ad7124_gain,
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ARRAY_SIZE(ad7124_gain), gain);
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ret = ad7124_spi_write_mask(st, AD7124_CONFIG(channel),
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AD7124_CONFIG_PGA_MSK,
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AD7124_CONFIG_PGA(res), 2);
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if (ret < 0)
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return ret;
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st->channel_config[channel].pga_bits = res;
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return 0;
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st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32);
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st->channels[channel].cfg.odr_sel_bits = odr_sel_bits;
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}
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static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
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@ -317,9 +287,9 @@ static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
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{
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unsigned int fadc;
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fadc = st->channel_config[channel].odr;
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fadc = st->channels[channel].cfg.odr;
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switch (st->channel_config[channel].filter_type) {
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switch (st->channels[channel].cfg.filter_type) {
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case AD7124_SINC3_FILTER:
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return DIV_ROUND_CLOSEST(fadc * 230, 1000);
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case AD7124_SINC4_FILTER:
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@ -329,9 +299,8 @@ static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
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}
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}
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static int ad7124_set_3db_filter_freq(struct ad7124_state *st,
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unsigned int channel,
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unsigned int freq)
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static void ad7124_set_3db_filter_freq(struct ad7124_state *st, unsigned int channel,
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unsigned int freq)
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{
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unsigned int sinc4_3db_odr;
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unsigned int sinc3_3db_odr;
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@ -349,21 +318,211 @@ static int ad7124_set_3db_filter_freq(struct ad7124_state *st,
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new_odr = sinc3_3db_odr;
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}
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if (st->channel_config[channel].filter_type != new_filter) {
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int ret;
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if (new_odr != st->channels[channel].cfg.odr)
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st->channels[channel].cfg.live = false;
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st->channel_config[channel].filter_type = new_filter;
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ret = ad7124_spi_write_mask(st, AD7124_FILTER(channel),
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AD7124_FILTER_TYPE_MSK,
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AD7124_FILTER_TYPE_SEL(new_filter),
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3);
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if (ret < 0)
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return ret;
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st->channels[channel].cfg.filter_type = new_filter;
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st->channels[channel].cfg.odr = new_odr;
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}
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static struct ad7124_channel_config *ad7124_find_similar_live_cfg(struct ad7124_state *st,
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struct ad7124_channel_config *cfg)
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{
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struct ad7124_channel_config *cfg_aux;
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ptrdiff_t cmp_size;
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int i;
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cmp_size = (u8 *)&cfg->live - (u8 *)cfg;
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for (i = 0; i < st->num_channels; i++) {
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cfg_aux = &st->channels[i].cfg;
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if (cfg_aux->live && !memcmp(cfg, cfg_aux, cmp_size))
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return cfg_aux;
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}
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return ad7124_set_channel_odr(st, channel, new_odr);
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return NULL;
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}
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static int ad7124_find_free_config_slot(struct ad7124_state *st)
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{
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unsigned int free_cfg_slot;
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free_cfg_slot = find_next_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS, 0);
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if (free_cfg_slot == AD7124_MAX_CONFIGS)
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return -1;
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return free_cfg_slot;
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}
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static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channel_config *cfg)
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{
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unsigned int refsel = cfg->refsel;
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switch (refsel) {
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case AD7124_REFIN1:
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case AD7124_REFIN2:
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case AD7124_AVDD_REF:
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if (IS_ERR(st->vref[refsel])) {
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dev_err(&st->sd.spi->dev,
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"Error, trying to use external voltage reference without a %s regulator.\n",
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ad7124_ref_names[refsel]);
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return PTR_ERR(st->vref[refsel]);
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}
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cfg->vref_mv = regulator_get_voltage(st->vref[refsel]);
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/* Conversion from uV to mV */
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cfg->vref_mv /= 1000;
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return 0;
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case AD7124_INT_REF:
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cfg->vref_mv = 2500;
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st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK;
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st->adc_control |= AD7124_ADC_CTRL_REF_EN(1);
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return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL,
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2, st->adc_control);
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default:
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dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel);
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return -EINVAL;
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}
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}
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static int ad7124_write_config(struct ad7124_state *st, struct ad7124_channel_config *cfg,
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unsigned int cfg_slot)
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{
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unsigned int tmp;
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unsigned int val;
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int ret;
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cfg->cfg_slot = cfg_slot;
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tmp = (cfg->buf_positive << 1) + cfg->buf_negative;
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val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) |
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AD7124_CONFIG_IN_BUFF(tmp);
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ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val);
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if (ret < 0)
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return ret;
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tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type);
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ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_TYPE_MSK,
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tmp, 3);
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if (ret < 0)
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return ret;
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ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_FS_MSK,
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AD7124_FILTER_FS(cfg->odr_sel_bits), 3);
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if (ret < 0)
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return ret;
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return ad7124_spi_write_mask(st, AD7124_CONFIG(cfg->cfg_slot), AD7124_CONFIG_PGA_MSK,
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AD7124_CONFIG_PGA(cfg->pga_bits), 2);
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}
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static struct ad7124_channel_config *ad7124_pop_config(struct ad7124_state *st)
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{
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struct ad7124_channel_config *lru_cfg;
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struct ad7124_channel_config *cfg;
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int ret;
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int i;
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/*
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* Pop least recently used config from the fifo
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* in order to make room for the new one
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*/
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ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg);
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if (ret <= 0)
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return NULL;
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lru_cfg->live = false;
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/* mark slot as free */
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assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0);
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/* invalidate all other configs that pointed to this one */
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for (i = 0; i < st->num_channels; i++) {
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cfg = &st->channels[i].cfg;
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if (cfg->cfg_slot == lru_cfg->cfg_slot)
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cfg->live = false;
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}
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return lru_cfg;
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}
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static int ad7124_push_config(struct ad7124_state *st, struct ad7124_channel_config *cfg)
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{
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struct ad7124_channel_config *lru_cfg;
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int free_cfg_slot;
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free_cfg_slot = ad7124_find_free_config_slot(st);
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if (free_cfg_slot >= 0) {
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/* push the new config in configs queue */
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kfifo_put(&st->live_cfgs_fifo, cfg);
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} else {
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/* pop one config to make room for the new one */
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lru_cfg = ad7124_pop_config(st);
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if (!lru_cfg)
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return -EINVAL;
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/* push the new config in configs queue */
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free_cfg_slot = lru_cfg->cfg_slot;
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kfifo_put(&st->live_cfgs_fifo, cfg);
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}
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/* mark slot as used */
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assign_bit(free_cfg_slot, &st->cfg_slots_status, 1);
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return ad7124_write_config(st, cfg, free_cfg_slot);
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}
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static int ad7124_enable_channel(struct ad7124_state *st, struct ad7124_channel *ch)
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{
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ch->cfg.live = true;
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return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain |
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AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1));
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}
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static int ad7124_prepare_read(struct ad7124_state *st, int address)
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{
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struct ad7124_channel_config *cfg = &st->channels[address].cfg;
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struct ad7124_channel_config *live_cfg;
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/*
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* Before doing any reads assign the channel a configuration.
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* Check if channel's config is on the device
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*/
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if (!cfg->live) {
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/* check if config matches another one */
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live_cfg = ad7124_find_similar_live_cfg(st, cfg);
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if (!live_cfg)
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ad7124_push_config(st, cfg);
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else
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cfg->cfg_slot = live_cfg->cfg_slot;
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}
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/* point channel to the config slot and enable */
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return ad7124_enable_channel(st, &st->channels[address]);
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}
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static int ad7124_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
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{
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struct ad7124_state *st = container_of(sd, struct ad7124_state, sd);
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int ret;
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mutex_lock(&st->cfgs_lock);
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ret = ad7124_prepare_read(st, channel);
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mutex_unlock(&st->cfgs_lock);
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return ret;
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}
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static const struct ad_sigma_delta_info ad7124_sigma_delta_info = {
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.set_channel = ad7124_set_channel,
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.set_mode = ad7124_set_mode,
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.has_registers = true,
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.addr_shift = 0,
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.read_mask = BIT(6),
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.data_reg = AD7124_DATA,
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.irq_flags = IRQF_TRIGGER_FALLING
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};
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static int ad7124_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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@ -378,36 +537,44 @@ static int ad7124_read_raw(struct iio_dev *indio_dev,
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return ret;
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/* After the conversion is performed, disable the channel */
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ret = ad_sd_write_reg(&st->sd,
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AD7124_CHANNEL(chan->address), 2,
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st->channel_config[chan->address].ain |
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AD7124_CHANNEL_EN(0));
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ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan->address), 2,
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st->channels[chan->address].ain | AD7124_CHANNEL_EN(0));
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if (ret < 0)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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idx = st->channel_config[chan->address].pga_bits;
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*val = st->channel_config[chan->address].vref_mv;
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if (st->channel_config[chan->address].bipolar)
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mutex_lock(&st->cfgs_lock);
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idx = st->channels[chan->address].cfg.pga_bits;
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*val = st->channels[chan->address].cfg.vref_mv;
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if (st->channels[chan->address].cfg.bipolar)
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*val2 = chan->scan_type.realbits - 1 + idx;
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else
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*val2 = chan->scan_type.realbits + idx;
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mutex_unlock(&st->cfgs_lock);
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_OFFSET:
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if (st->channel_config[chan->address].bipolar)
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mutex_lock(&st->cfgs_lock);
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if (st->channels[chan->address].cfg.bipolar)
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*val = -(1 << (chan->scan_type.realbits - 1));
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else
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*val = 0;
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mutex_unlock(&st->cfgs_lock);
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
*val = st->channel_config[chan->address].odr;
|
||||
mutex_lock(&st->cfgs_lock);
|
||||
*val = st->channels[chan->address].cfg.odr;
|
||||
mutex_unlock(&st->cfgs_lock);
|
||||
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
||||
mutex_lock(&st->cfgs_lock);
|
||||
*val = ad7124_get_3db_filter_freq(st, chan->scan_index);
|
||||
mutex_unlock(&st->cfgs_lock);
|
||||
|
||||
return IIO_VAL_INT;
|
||||
default:
|
||||
return -EINVAL;
|
||||
|
|
@ -420,35 +587,54 @@ static int ad7124_write_raw(struct iio_dev *indio_dev,
|
|||
{
|
||||
struct ad7124_state *st = iio_priv(indio_dev);
|
||||
unsigned int res, gain, full_scale, vref;
|
||||
int ret = 0;
|
||||
|
||||
mutex_lock(&st->cfgs_lock);
|
||||
|
||||
switch (info) {
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
if (val2 != 0)
|
||||
return -EINVAL;
|
||||
if (val2 != 0) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return ad7124_set_channel_odr(st, chan->address, val);
|
||||
ad7124_set_channel_odr(st, chan->address, val);
|
||||
break;
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
if (val != 0)
|
||||
return -EINVAL;
|
||||
if (val != 0) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
if (st->channel_config[chan->address].bipolar)
|
||||
if (st->channels[chan->address].cfg.bipolar)
|
||||
full_scale = 1 << (chan->scan_type.realbits - 1);
|
||||
else
|
||||
full_scale = 1 << chan->scan_type.realbits;
|
||||
|
||||
vref = st->channel_config[chan->address].vref_mv * 1000000LL;
|
||||
vref = st->channels[chan->address].cfg.vref_mv * 1000000LL;
|
||||
res = DIV_ROUND_CLOSEST(vref, full_scale);
|
||||
gain = DIV_ROUND_CLOSEST(res, val2);
|
||||
res = ad7124_find_closest_match(ad7124_gain, ARRAY_SIZE(ad7124_gain), gain);
|
||||
|
||||
return ad7124_set_channel_gain(st, chan->address, gain);
|
||||
if (st->channels[chan->address].cfg.pga_bits != res)
|
||||
st->channels[chan->address].cfg.live = false;
|
||||
|
||||
st->channels[chan->address].cfg.pga_bits = res;
|
||||
break;
|
||||
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
|
||||
if (val2 != 0)
|
||||
return -EINVAL;
|
||||
if (val2 != 0) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return ad7124_set_3db_filter_freq(st, chan->address, val);
|
||||
ad7124_set_3db_filter_freq(st, chan->address, val);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
mutex_unlock(&st->cfgs_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ad7124_reg_access(struct iio_dev *indio_dev,
|
||||
|
|
@ -547,47 +733,14 @@ static int ad7124_check_chip_id(struct ad7124_state *st)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ad7124_init_channel_vref(struct ad7124_state *st,
|
||||
unsigned int channel_number)
|
||||
{
|
||||
unsigned int refsel = st->channel_config[channel_number].refsel;
|
||||
|
||||
switch (refsel) {
|
||||
case AD7124_REFIN1:
|
||||
case AD7124_REFIN2:
|
||||
case AD7124_AVDD_REF:
|
||||
if (IS_ERR(st->vref[refsel])) {
|
||||
dev_err(&st->sd.spi->dev,
|
||||
"Error, trying to use external voltage reference without a %s regulator.\n",
|
||||
ad7124_ref_names[refsel]);
|
||||
return PTR_ERR(st->vref[refsel]);
|
||||
}
|
||||
st->channel_config[channel_number].vref_mv =
|
||||
regulator_get_voltage(st->vref[refsel]);
|
||||
/* Conversion from uV to mV */
|
||||
st->channel_config[channel_number].vref_mv /= 1000;
|
||||
break;
|
||||
case AD7124_INT_REF:
|
||||
st->channel_config[channel_number].vref_mv = 2500;
|
||||
st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK;
|
||||
st->adc_control |= AD7124_ADC_CTRL_REF_EN(1);
|
||||
return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL,
|
||||
2, st->adc_control);
|
||||
default:
|
||||
dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev,
|
||||
struct device_node *np)
|
||||
{
|
||||
struct ad7124_state *st = iio_priv(indio_dev);
|
||||
struct ad7124_channel_config *cfg;
|
||||
struct ad7124_channel *channels;
|
||||
struct device_node *child;
|
||||
struct iio_chan_spec *chan;
|
||||
struct ad7124_channel_config *chan_config;
|
||||
unsigned int ain[2], channel = 0, tmp;
|
||||
int ret;
|
||||
|
||||
|
|
@ -602,16 +755,18 @@ static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev,
|
|||
if (!chan)
|
||||
return -ENOMEM;
|
||||
|
||||
chan_config = devm_kcalloc(indio_dev->dev.parent, st->num_channels,
|
||||
sizeof(*chan_config), GFP_KERNEL);
|
||||
if (!chan_config)
|
||||
channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels),
|
||||
GFP_KERNEL);
|
||||
if (!channels)
|
||||
return -ENOMEM;
|
||||
|
||||
indio_dev->channels = chan;
|
||||
indio_dev->num_channels = st->num_channels;
|
||||
st->channel_config = chan_config;
|
||||
st->channels = channels;
|
||||
|
||||
for_each_available_child_of_node(np, child) {
|
||||
cfg = &st->channels[channel].cfg;
|
||||
|
||||
ret = of_property_read_u32(child, "reg", &channel);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
|
@ -621,21 +776,20 @@ static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev,
|
|||
if (ret)
|
||||
goto err;
|
||||
|
||||
st->channel_config[channel].ain = AD7124_CHANNEL_AINP(ain[0]) |
|
||||
st->channels[channel].nr = channel;
|
||||
st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) |
|
||||
AD7124_CHANNEL_AINM(ain[1]);
|
||||
st->channel_config[channel].bipolar =
|
||||
of_property_read_bool(child, "bipolar");
|
||||
|
||||
cfg->bipolar = of_property_read_bool(child, "bipolar");
|
||||
|
||||
ret = of_property_read_u32(child, "adi,reference-select", &tmp);
|
||||
if (ret)
|
||||
st->channel_config[channel].refsel = AD7124_INT_REF;
|
||||
cfg->refsel = AD7124_INT_REF;
|
||||
else
|
||||
st->channel_config[channel].refsel = tmp;
|
||||
cfg->refsel = tmp;
|
||||
|
||||
st->channel_config[channel].buf_positive =
|
||||
of_property_read_bool(child, "adi,buffered-positive");
|
||||
st->channel_config[channel].buf_negative =
|
||||
of_property_read_bool(child, "adi,buffered-negative");
|
||||
cfg->buf_positive = of_property_read_bool(child, "adi,buffered-positive");
|
||||
cfg->buf_negative = of_property_read_bool(child, "adi,buffered-negative");
|
||||
|
||||
chan[channel] = ad7124_channel_template;
|
||||
chan[channel].address = channel;
|
||||
|
|
@ -653,8 +807,8 @@ err:
|
|||
|
||||
static int ad7124_setup(struct ad7124_state *st)
|
||||
{
|
||||
unsigned int val, fclk, power_mode;
|
||||
int i, ret, tmp;
|
||||
unsigned int fclk, power_mode;
|
||||
int i, ret;
|
||||
|
||||
fclk = clk_get_rate(st->mclk);
|
||||
if (!fclk)
|
||||
|
|
@ -677,31 +831,20 @@ static int ad7124_setup(struct ad7124_state *st)
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
mutex_init(&st->cfgs_lock);
|
||||
INIT_KFIFO(st->live_cfgs_fifo);
|
||||
for (i = 0; i < st->num_channels; i++) {
|
||||
val = st->channel_config[i].ain | AD7124_CHANNEL_SETUP(i);
|
||||
ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(i), 2, val);
|
||||
|
||||
ret = ad7124_init_config_vref(st, &st->channels[i].cfg);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = ad7124_init_channel_vref(st, i);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
tmp = (st->channel_config[i].buf_positive << 1) +
|
||||
st->channel_config[i].buf_negative;
|
||||
|
||||
val = AD7124_CONFIG_BIPOLAR(st->channel_config[i].bipolar) |
|
||||
AD7124_CONFIG_REF_SEL(st->channel_config[i].refsel) |
|
||||
AD7124_CONFIG_IN_BUFF(tmp);
|
||||
ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(i), 2, val);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
/*
|
||||
* 9.38 SPS is the minimum output data rate supported
|
||||
* regardless of the selected power mode. Round it up to 10 and
|
||||
* set all the enabled channels to this default value.
|
||||
* set all channels to this default value.
|
||||
*/
|
||||
ret = ad7124_set_channel_odr(st, i, 10);
|
||||
ad7124_set_channel_odr(st, i, 10);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
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