media: i2c: OV5647: ensure clock lane in LP-11 state before streaming on
When I was supporting Rpi Camera Module on the ASUS Tinker board, I found this driver have some issues with rockchip's mipi-csi driver. It didn't place clock lane in LP-11 state before performing D-PHY initialisation. >From our experience, on some OV sensors, LP-11 state is not achieved while BIT(5)-0x4800 is cleared. So let's set BIT(5) and BIT(0) both while not streaming, in order to coax the clock lane into LP-11 state. 0x4800 : MIPI CTRL 00 BIT(5) : clock lane gate enable 0: continuous 1: none-continuous BIT(0) : manually set clock lane 0: Not used 1: used Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Reviewed-by: Luis Oliveira <lolivei@synopsys.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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@ -253,6 +253,10 @@ static int ov5647_stream_on(struct v4l2_subdev *sd)
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{
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int ret;
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ret = ov5647_write(sd, 0x4800, 0x04);
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if (ret < 0)
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return ret;
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ret = ov5647_write(sd, 0x4202, 0x00);
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if (ret < 0)
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return ret;
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@ -264,6 +268,10 @@ static int ov5647_stream_off(struct v4l2_subdev *sd)
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{
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int ret;
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ret = ov5647_write(sd, 0x4800, 0x25);
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if (ret < 0)
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return ret;
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ret = ov5647_write(sd, 0x4202, 0x0f);
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if (ret < 0)
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return ret;
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@ -320,7 +328,10 @@ static int __sensor_init(struct v4l2_subdev *sd)
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return ret;
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}
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return ov5647_write(sd, 0x4800, 0x04);
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/*
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* stream off to make the clock lane into LP-11 state.
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*/
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return ov5647_stream_off(sd);
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}
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static int ov5647_sensor_power(struct v4l2_subdev *sd, int on)
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