drm/i915/gen10: Set value of Indirect Context Offset for gen10
Indirect Context Offset Pointer has changed for Cannonlake. INDIRECT_CTX_OFFSET[15:6] valid value for CNL is 19h per Spec. v2: rebased to intel_lr_indirect_ctx_offset v3: Commit message added per Tvrtko request. Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-9-git-send-email-rodrigo.vivi@intel.com
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@ -204,6 +204,7 @@
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#define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x17
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#define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x17
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#define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x26
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#define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x26
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#define GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0x19
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/* Typical size of the average request (2 pipecontrols and a MI_BB) */
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/* Typical size of the average request (2 pipecontrols and a MI_BB) */
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#define EXECLISTS_REQUEST_SIZE 64 /* bytes */
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#define EXECLISTS_REQUEST_SIZE 64 /* bytes */
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@ -1861,6 +1862,10 @@ static u32 intel_lr_indirect_ctx_offset(struct intel_engine_cs *engine)
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default:
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default:
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MISSING_CASE(INTEL_GEN(engine->i915));
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MISSING_CASE(INTEL_GEN(engine->i915));
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/* fall through */
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/* fall through */
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case 10:
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indirect_ctx_offset =
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GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
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break;
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case 9:
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case 9:
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indirect_ctx_offset =
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indirect_ctx_offset =
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GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
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GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT;
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