pinctrl: sx150x: various spelling fixes and some white-space cleanup
Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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4ecb65fb87
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7bd474963a
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@ -384,7 +384,7 @@ static int sx150x_gpio_oscio_set(struct sx150x_pinctrl *pctl,
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}
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static void sx150x_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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int value)
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{
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struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
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@ -396,7 +396,7 @@ static void sx150x_gpio_set(struct gpio_chip *chip, unsigned int offset,
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}
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static int sx150x_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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unsigned int offset)
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{
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struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
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@ -409,7 +409,7 @@ static int sx150x_gpio_direction_input(struct gpio_chip *chip,
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}
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static int sx150x_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset, int value)
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unsigned int offset, int value)
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{
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struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
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int ret;
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@ -880,7 +880,7 @@ static unsigned int sx150x_maybe_swizzle(struct sx150x_pinctrl *pctl,
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* reg + 3 [ 3 3 2 2 1 1 0 0 ]
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*
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* SX1503 and SX1506 deviate from that data layout, instead storing
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* thier contents as follows:
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* their contents as follows:
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*
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* reg [ f f e e d d c c ]
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* reg + 1 [ 7 7 6 6 5 5 4 4 ]
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@ -915,9 +915,8 @@ static unsigned int sx150x_maybe_swizzle(struct sx150x_pinctrl *pctl,
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*
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* This way the rest of the driver code, interfacing with the chip via
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* regmap API, can work assuming that each GPIO pin is represented by
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* a group of bits at an offset proportioan to GPIO number within a
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* a group of bits at an offset proportional to GPIO number within a
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* given register.
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*
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*/
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static int sx150x_regmap_reg_read(void *context, unsigned int reg,
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unsigned int *result)
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@ -929,7 +928,7 @@ static int sx150x_regmap_reg_read(void *context, unsigned int reg,
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unsigned int idx, val;
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/*
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* There are four potential cases coverd by this function:
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* There are four potential cases covered by this function:
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*
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* 1) 8-pin chip, single configuration bit register
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*
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