ARM64: DT: Hisilicon hi6220 soc and hikey board updates for 4.2
- Added the devicetree bindings document for hi6220 SoC - Added the devicetree bindings document for hi6220 clock - Added dts files for hi6220 SoC and hikey board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVcbdtAAoJEAvIV27ZiWZcmX8QAJLQ4KWB2XiXC8v2xkZFnLDv dHiwdNzHBFmavSNqmeg3krLUW/lQNTe60vDGrJxo2RfO9KyeS5cAQsuGgG5sMp/c N/u+YpQZOb9ufHNS1F/vQcd4YuedT4u2bkuOzuMFxBMViWdo5LQ5utWhdfbPuCdL iU6alY8C98AzPHfN6n0QxIz951PsyiKiyqf00+slUsBmVRUXiZgzBAHGWUQYGyeu J2XNC235yBbOqwsxMUotzssaourlcXaAIQglGlifOya8PNmkHfQIMT6dSfSgC6sV Nb0T89q7Tm0lKw7lULweIPz2gSoRqhVJLUI78bwCmSvzbdrAxNVnZuKEIPsMySOv i9LxfQLuNIuwVZrh/a5rfEZYNeM/PNTrlh9gto7de7XBCXjQMyzHL9H9BzPlKY1o f0TphBee6x7e9xdDjQYija6VIhgNS3y4xtwIrXtFtfECWOfbQUxdiUQP9sUMZlnf DtSZCqgWRIaN2sV4j12TYOwAI6O9ctWMSnTCsFbJxeTcu7046+DWKiS3DIRl4L5d EuTTTUdIvJ9geNslGm6sjlA6tOwdRgVK+J7oWGniFRyhr9m0kzwkv5cGV+sRSIHF Hf1gauZvB6jhyAvTdLq9+GZXExecLdkB5hNt98+OybJcXmu/r5lmrdubPrB8q220 EL41lFyJIEZCstYOuB6L =JYfg -----END PGP SIGNATURE----- Merge tag 'hi6620-dt-for-4.2' of git://github.com/hisilicon/linux-hisi into next/dt ARM64: DT: Hisilicon hi6220 soc and hikey board updates for 4.2 - Added the devicetree bindings document for hi6220 SoC - Added the devicetree bindings document for hi6220 clock - Added dts files for hi6220 SoC and hikey board * tag 'hi6620-dt-for-4.2' of git://github.com/hisilicon/linux-hisi: arm64: dts: Add dts files for Hisilicon Hi6220 SoC clk: hi6220: Document devicetree bindings for hi6220 clock arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
This commit is contained in:
Kevin Hilman
Коммит
7c37905ed1
|
|
@ -1,5 +1,8 @@
|
|||
Hisilicon Platforms Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
Hi6220 SoC
|
||||
Required root node properties:
|
||||
- compatible = "hisilicon,hi6220";
|
||||
|
||||
Hi4511 Board
|
||||
Required root node properties:
|
||||
|
|
@ -13,6 +16,9 @@ HiP01 ca9x2 Board
|
|||
Required root node properties:
|
||||
- compatible = "hisilicon,hip01-ca9x2";
|
||||
|
||||
HiKey Board
|
||||
Required root node properties:
|
||||
- compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
|
||||
|
||||
Hisilicon system controller
|
||||
|
||||
|
|
@ -40,6 +46,87 @@ Example:
|
|||
reboot-offset = <0x4>;
|
||||
};
|
||||
|
||||
-----------------------------------------------------------------------
|
||||
Hisilicon Hi6220 system controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-sysctrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, many clock registers are defined
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this controller as one of the system controllers,
|
||||
its main functions are the same as Hisilicon system controller, but
|
||||
the register offset of some core modules are different.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
sys_ctrl: sys_ctrl@f7030000 {
|
||||
compatible = "hisilicon,hi6220-sysctrl", "syscon";
|
||||
reg = <0x0 0xf7030000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
Hisilicon Hi6220 Power Always ON domain controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-aoctrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, many clock registers are defined
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this system controller to control the power always
|
||||
on domain for mobile platform.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
ao_ctrl: ao_ctrl@f7800000 {
|
||||
compatible = "hisilicon,hi6220-aoctrl", "syscon";
|
||||
reg = <0x0 0xf7800000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
Hisilicon Hi6220 Media domain controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-mediactrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, many clock registers are defined
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this system controller to control the multimedia
|
||||
domain(e.g. codec, G3D ...) for mobile platform.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
media_ctrl: media_ctrl@f4410000 {
|
||||
compatible = "hisilicon,hi6220-mediactrl", "syscon";
|
||||
reg = <0x0 0xf4410000 0x0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
Hisilicon Hi6220 Power Management domain controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "hisilicon,hi6220-pmctrl"
|
||||
- reg : Register address and size
|
||||
- #clock-cells: should be set to 1, some clock registers are define
|
||||
under this controller and this property must be present.
|
||||
|
||||
Hisilicon designs this system controller to control the power management
|
||||
domain for mobile platform.
|
||||
|
||||
Example:
|
||||
/*for Hi6220*/
|
||||
pm_ctrl: pm_ctrl@f7032000 {
|
||||
compatible = "hisilicon,hi6220-pmctrl", "syscon";
|
||||
reg = <0x0 0xf7032000 0x0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
-----------------------------------------------------------------------
|
||||
Hisilicon HiP01 system controller
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,34 @@
|
|||
* Hisilicon Hi6220 Clock Controller
|
||||
|
||||
Clock control registers reside in different Hi6220 system controllers,
|
||||
please refer the following document to know more about the binding rules
|
||||
for these system controllers:
|
||||
|
||||
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
|
||||
|
||||
Required Properties:
|
||||
|
||||
- compatible: the compatible should be one of the following strings to
|
||||
indicate the clock controller functionality.
|
||||
|
||||
- "hisilicon,hi6220-aoctrl"
|
||||
- "hisilicon,hi6220-sysctrl"
|
||||
- "hisilicon,hi6220-mediactrl"
|
||||
- "hisilicon,hi6220-pmctrl"
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
- #clock-cells: should be 1.
|
||||
|
||||
For example:
|
||||
sys_ctrl: sys_ctrl@f7030000 {
|
||||
compatible = "hisilicon,hi6220-sysctrl", "syscon";
|
||||
reg = <0x0 0xf7030000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
Each clock is assigned an identifier and client nodes use this identifier
|
||||
to specify the clock which they consume.
|
||||
|
||||
All these identifier could be found in <dt-bindings/clock/hi6220-clock.h>.
|
||||
|
|
@ -4,6 +4,7 @@ dts-dirs += arm
|
|||
dts-dirs += cavium
|
||||
dts-dirs += exynos
|
||||
dts-dirs += freescale
|
||||
dts-dirs += hisilicon
|
||||
dts-dirs += mediatek
|
||||
dts-dirs += qcom
|
||||
dts-dirs += sprd
|
||||
|
|
|
|||
|
|
@ -0,0 +1,5 @@
|
|||
dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
|
||||
|
||||
always := $(dtb-y)
|
||||
subdir-y := $(dts-dirs)
|
||||
clean-files := *.dtb
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* dts file for Hisilicon HiKey Development Board
|
||||
*
|
||||
* Copyright (C) 2015, Hisilicon Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/*Reserved 1MB memory for MCU*/
|
||||
/memreserve/ 0x05e00000 0x00100000;
|
||||
|
||||
#include "hi6220.dtsi"
|
||||
|
||||
/ {
|
||||
model = "HiKey Development Board";
|
||||
compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x40000000>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,171 @@
|
|||
/*
|
||||
* dts file for Hisilicon Hi6220 SoC
|
||||
*
|
||||
* Copyright (C) 2015, Hisilicon Ltd.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
/ {
|
||||
compatible = "hisilicon,hi6220";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&cpu0>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&cpu1>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&cpu2>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&cpu3>;
|
||||
};
|
||||
};
|
||||
cluster1 {
|
||||
core0 {
|
||||
cpu = <&cpu4>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&cpu5>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&cpu6>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&cpu7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu0: cpu@0 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x1>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x2>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x3>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu4: cpu@100 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu5: cpu@101 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x101>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu6: cpu@102 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x102>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu7: cpu@103 {
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0 0x103>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller@f6801000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0x0 0xf6801000 0 0x1000>, /* GICD */
|
||||
<0x0 0xf6802000 0 0x2000>, /* GICC */
|
||||
<0x0 0xf6804000 0 0x2000>, /* GICH */
|
||||
<0x0 0xf6806000 0 0x2000>; /* GICV */
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
ao_ctrl: ao_ctrl@f7800000 {
|
||||
compatible = "hisilicon,hi6220-aoctrl", "syscon";
|
||||
reg = <0x0 0xf7800000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
sys_ctrl: sys_ctrl@f7030000 {
|
||||
compatible = "hisilicon,hi6220-sysctrl", "syscon";
|
||||
reg = <0x0 0xf7030000 0x0 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
media_ctrl: media_ctrl@f4410000 {
|
||||
compatible = "hisilicon,hi6220-mediactrl", "syscon";
|
||||
reg = <0x0 0xf4410000 0x0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
pm_ctrl: pm_ctrl@f7032000 {
|
||||
compatible = "hisilicon,hi6220-pmctrl", "syscon";
|
||||
reg = <0x0 0xf7032000 0x0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
uart0: uart@f8015000 { /* console */
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x0 0xf8015000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ao_ctrl 36>, <&ao_ctrl 36>;
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
};
|
||||
};
|
||||
Загрузка…
Ссылка в новой задаче