x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS
Extend spectre_v2= boot option with Kernel IBRS. [jpoimboe: no STIBP with IBRS] Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de>
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c779bc1a90
Коммит
7c693f54c8
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@ -5589,6 +5589,7 @@
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eibrs - enhanced IBRS
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eibrs,retpoline - enhanced IBRS + Retpolines
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eibrs,lfence - enhanced IBRS + LFENCE
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ibrs - use IBRS to protect kernel
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Not specifying this option is equivalent to
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spectre_v2=auto.
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@ -211,6 +211,7 @@ enum spectre_v2_mitigation {
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SPECTRE_V2_EIBRS,
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SPECTRE_V2_EIBRS_RETPOLINE,
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SPECTRE_V2_EIBRS_LFENCE,
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SPECTRE_V2_IBRS,
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};
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/* The indirect branch speculation control variants */
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@ -972,6 +972,7 @@ enum spectre_v2_mitigation_cmd {
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SPECTRE_V2_CMD_EIBRS,
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SPECTRE_V2_CMD_EIBRS_RETPOLINE,
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SPECTRE_V2_CMD_EIBRS_LFENCE,
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SPECTRE_V2_CMD_IBRS,
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};
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enum spectre_v2_user_cmd {
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@ -1044,11 +1045,12 @@ spectre_v2_parse_user_cmdline(enum spectre_v2_mitigation_cmd v2_cmd)
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return SPECTRE_V2_USER_CMD_AUTO;
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}
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static inline bool spectre_v2_in_eibrs_mode(enum spectre_v2_mitigation mode)
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static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode)
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{
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return (mode == SPECTRE_V2_EIBRS ||
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mode == SPECTRE_V2_EIBRS_RETPOLINE ||
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mode == SPECTRE_V2_EIBRS_LFENCE);
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return mode == SPECTRE_V2_IBRS ||
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mode == SPECTRE_V2_EIBRS ||
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mode == SPECTRE_V2_EIBRS_RETPOLINE ||
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mode == SPECTRE_V2_EIBRS_LFENCE;
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}
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static void __init
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@ -1113,12 +1115,12 @@ spectre_v2_user_select_mitigation(enum spectre_v2_mitigation_cmd v2_cmd)
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}
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/*
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* If no STIBP, enhanced IBRS is enabled or SMT impossible, STIBP is not
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* required.
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* If no STIBP, IBRS or enhanced IBRS is enabled, or SMT impossible,
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* STIBP is not required.
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*/
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if (!boot_cpu_has(X86_FEATURE_STIBP) ||
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!smt_possible ||
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spectre_v2_in_eibrs_mode(spectre_v2_enabled))
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spectre_v2_in_ibrs_mode(spectre_v2_enabled))
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return;
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/*
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@ -1150,6 +1152,7 @@ static const char * const spectre_v2_strings[] = {
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[SPECTRE_V2_EIBRS] = "Mitigation: Enhanced IBRS",
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[SPECTRE_V2_EIBRS_LFENCE] = "Mitigation: Enhanced IBRS + LFENCE",
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[SPECTRE_V2_EIBRS_RETPOLINE] = "Mitigation: Enhanced IBRS + Retpolines",
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[SPECTRE_V2_IBRS] = "Mitigation: IBRS",
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};
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static const struct {
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@ -1167,6 +1170,7 @@ static const struct {
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{ "eibrs,lfence", SPECTRE_V2_CMD_EIBRS_LFENCE, false },
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{ "eibrs,retpoline", SPECTRE_V2_CMD_EIBRS_RETPOLINE, false },
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{ "auto", SPECTRE_V2_CMD_AUTO, false },
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{ "ibrs", SPECTRE_V2_CMD_IBRS, false },
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};
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static void __init spec_v2_print_cond(const char *reason, bool secure)
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@ -1229,6 +1233,24 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
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return SPECTRE_V2_CMD_AUTO;
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}
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if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
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pr_err("%s selected but not Intel CPU. Switching to AUTO select\n",
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mitigation_options[i].option);
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return SPECTRE_V2_CMD_AUTO;
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}
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if (cmd == SPECTRE_V2_CMD_IBRS && !boot_cpu_has(X86_FEATURE_IBRS)) {
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pr_err("%s selected but CPU doesn't have IBRS. Switching to AUTO select\n",
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mitigation_options[i].option);
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return SPECTRE_V2_CMD_AUTO;
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}
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if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
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pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
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mitigation_options[i].option);
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return SPECTRE_V2_CMD_AUTO;
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}
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spec_v2_print_cond(mitigation_options[i].option,
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mitigation_options[i].secure);
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return cmd;
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@ -1268,6 +1290,14 @@ static void __init spectre_v2_select_mitigation(void)
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break;
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}
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if (boot_cpu_has_bug(X86_BUG_RETBLEED) &&
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retbleed_cmd != RETBLEED_CMD_OFF &&
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boot_cpu_has(X86_FEATURE_IBRS) &&
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boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
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mode = SPECTRE_V2_IBRS;
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break;
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}
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mode = spectre_v2_select_retpoline();
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break;
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@ -1284,6 +1314,10 @@ static void __init spectre_v2_select_mitigation(void)
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mode = spectre_v2_select_retpoline();
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break;
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case SPECTRE_V2_CMD_IBRS:
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mode = SPECTRE_V2_IBRS;
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break;
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case SPECTRE_V2_CMD_EIBRS:
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mode = SPECTRE_V2_EIBRS;
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break;
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@ -1300,7 +1334,7 @@ static void __init spectre_v2_select_mitigation(void)
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if (mode == SPECTRE_V2_EIBRS && unprivileged_ebpf_enabled())
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pr_err(SPECTRE_V2_EIBRS_EBPF_MSG);
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if (spectre_v2_in_eibrs_mode(mode)) {
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if (spectre_v2_in_ibrs_mode(mode)) {
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/* Force it so VMEXIT will restore correctly */
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x86_spec_ctrl_base |= SPEC_CTRL_IBRS;
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write_spec_ctrl_current(x86_spec_ctrl_base, true);
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@ -1311,6 +1345,10 @@ static void __init spectre_v2_select_mitigation(void)
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case SPECTRE_V2_EIBRS:
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break;
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case SPECTRE_V2_IBRS:
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setup_force_cpu_cap(X86_FEATURE_KERNEL_IBRS);
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break;
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case SPECTRE_V2_LFENCE:
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case SPECTRE_V2_EIBRS_LFENCE:
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setup_force_cpu_cap(X86_FEATURE_RETPOLINE_LFENCE);
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@ -1337,17 +1375,17 @@ static void __init spectre_v2_select_mitigation(void)
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pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
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/*
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* Retpoline means the kernel is safe because it has no indirect
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* branches. Enhanced IBRS protects firmware too, so, enable restricted
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* speculation around firmware calls only when Enhanced IBRS isn't
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* supported.
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* Retpoline protects the kernel, but doesn't protect firmware. IBRS
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* and Enhanced IBRS protect firmware too, so enable IBRS around
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* firmware calls only when IBRS / Enhanced IBRS aren't otherwise
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* enabled.
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*
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* Use "mode" to check Enhanced IBRS instead of boot_cpu_has(), because
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* the user might select retpoline on the kernel command line and if
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* the CPU supports Enhanced IBRS, kernel might un-intentionally not
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* enable IBRS around firmware calls.
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*/
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if (boot_cpu_has(X86_FEATURE_IBRS) && !spectre_v2_in_eibrs_mode(mode)) {
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if (boot_cpu_has(X86_FEATURE_IBRS) && !spectre_v2_in_ibrs_mode(mode)) {
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setup_force_cpu_cap(X86_FEATURE_USE_IBRS_FW);
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pr_info("Enabling Restricted Speculation for firmware calls\n");
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}
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@ -2089,7 +2127,7 @@ static ssize_t mmio_stale_data_show_state(char *buf)
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static char *stibp_state(void)
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{
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if (spectre_v2_in_eibrs_mode(spectre_v2_enabled))
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if (spectre_v2_in_ibrs_mode(spectre_v2_enabled))
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return "";
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switch (spectre_v2_user_stibp) {
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