FB: sa11x0: convert to use platform resource and ioremap()
Convert the sa11x0 framebuffer driver to obtain the base address of its hardware registers from the platform resources, and ioremap this rather than relying on the static mappings. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Родитель
00d94979c3
Коммит
7cb66dcc82
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@ -1903,16 +1903,6 @@
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#define LCD_Int100_0A 0xF /* LCD Intensity = 100.0% = 1 */
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/* (Alternative) */
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#define LCCR0 __REG(0xB0100000) /* LCD Control Reg. 0 */
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#define LCSR __REG(0xB0100004) /* LCD Status Reg. */
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#define DBAR1 __REG(0xB0100010) /* LCD DMA Base Address Reg. channel 1 */
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#define DCAR1 __REG(0xB0100014) /* LCD DMA Current Address Reg. channel 1 */
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#define DBAR2 __REG(0xB0100018) /* LCD DMA Base Address Reg. channel 2 */
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#define DCAR2 __REG(0xB010001C) /* LCD DMA Current Address Reg. channel 2 */
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#define LCCR1 __REG(0xB0100020) /* LCD Control Reg. 1 */
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#define LCCR2 __REG(0xB0100024) /* LCD Control Reg. 2 */
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#define LCCR3 __REG(0xB0100028) /* LCD Control Reg. 3 */
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#define LCCR0_LEN 0x00000001 /* LCD ENable */
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#define LCCR0_CMS 0x00000002 /* Color/Monochrome display Select */
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#define LCCR0_Color (LCCR0_CMS*0) /* Color display */
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@ -705,9 +705,12 @@ static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_
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* Only update the registers if the controller is enabled
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* and something has changed.
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*/
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if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) ||
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(LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) ||
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(DBAR1 != fbi->dbar1) || (DBAR2 != fbi->dbar2))
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if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 ||
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readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 ||
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readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 ||
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readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 ||
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readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 ||
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readl_relaxed(fbi->base + DBAR2) != fbi->dbar2)
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sa1100fb_schedule_work(fbi, C_REENABLE);
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return 0;
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@ -789,28 +792,29 @@ static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
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fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
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/* Sequence from 11.7.10 */
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LCCR3 = fbi->reg_lccr3;
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LCCR2 = fbi->reg_lccr2;
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LCCR1 = fbi->reg_lccr1;
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LCCR0 = fbi->reg_lccr0 & ~LCCR0_LEN;
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DBAR1 = fbi->dbar1;
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DBAR2 = fbi->dbar2;
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LCCR0 |= LCCR0_LEN;
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writel_relaxed(fbi->reg_lccr3, fbi->base + LCCR3);
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writel_relaxed(fbi->reg_lccr2, fbi->base + LCCR2);
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writel_relaxed(fbi->reg_lccr1, fbi->base + LCCR1);
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writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0);
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writel_relaxed(fbi->dbar1, fbi->base + DBAR1);
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writel_relaxed(fbi->dbar2, fbi->base + DBAR2);
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writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0);
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if (machine_is_shannon())
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gpio_set_value(SHANNON_GPIO_DISP_EN, 1);
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dev_dbg(fbi->dev, "DBAR1 = 0x%08lx\n", DBAR1);
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dev_dbg(fbi->dev, "DBAR2 = 0x%08lx\n", DBAR2);
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dev_dbg(fbi->dev, "LCCR0 = 0x%08lx\n", LCCR0);
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dev_dbg(fbi->dev, "LCCR1 = 0x%08lx\n", LCCR1);
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dev_dbg(fbi->dev, "LCCR2 = 0x%08lx\n", LCCR2);
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dev_dbg(fbi->dev, "LCCR3 = 0x%08lx\n", LCCR3);
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dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1));
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dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2));
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dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0));
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dev_dbg(fbi->dev, "LCCR1: 0x%08x\n", readl_relaxed(fbi->base + LCCR1));
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dev_dbg(fbi->dev, "LCCR2: 0x%08x\n", readl_relaxed(fbi->base + LCCR2));
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dev_dbg(fbi->dev, "LCCR3: 0x%08x\n", readl_relaxed(fbi->base + LCCR3));
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}
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static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
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{
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DECLARE_WAITQUEUE(wait, current);
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u32 lccr0;
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dev_dbg(fbi->dev, "Disabling LCD controller\n");
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@ -820,9 +824,14 @@ static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&fbi->ctrlr_wait, &wait);
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LCSR = 0xffffffff; /* Clear LCD Status Register */
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LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
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LCCR0 &= ~LCCR0_LEN; /* Disable LCD Controller */
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/* Clear LCD Status Register */
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writel_relaxed(~0, fbi->base + LCSR);
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lccr0 = readl_relaxed(fbi->base + LCCR0);
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lccr0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
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writel_relaxed(lccr0, fbi->base + LCCR0);
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lccr0 &= ~LCCR0_LEN; /* Disable LCD Controller */
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writel_relaxed(lccr0, fbi->base + LCCR0);
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schedule_timeout(20 * HZ / 1000);
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remove_wait_queue(&fbi->ctrlr_wait, &wait);
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@ -834,14 +843,15 @@ static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
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static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id)
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{
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struct sa1100fb_info *fbi = dev_id;
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unsigned int lcsr = LCSR;
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unsigned int lcsr = readl_relaxed(fbi->base + LCSR);
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if (lcsr & LCSR_LDD) {
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LCCR0 |= LCCR0_LDM;
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u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM;
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writel_relaxed(lccr0, fbi->base + LCCR0);
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wake_up(&fbi->ctrlr_wait);
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}
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LCSR = lcsr;
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writel_relaxed(lcsr, fbi->base + LCSR);
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return IRQ_HANDLED;
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}
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@ -1198,6 +1208,7 @@ static struct sa1100fb_info * __devinit sa1100fb_init_fbinfo(struct device *dev)
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static int __devinit sa1100fb_probe(struct platform_device *pdev)
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{
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struct sa1100fb_info *fbi;
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struct resource *res;
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int ret, irq;
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if (!pdev->dev.platform_data) {
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@ -1205,11 +1216,12 @@ static int __devinit sa1100fb_probe(struct platform_device *pdev)
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return -EINVAL;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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if (irq < 0 || !res)
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return -EINVAL;
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if (!request_mem_region(0xb0100000, 0x10000, "LCD"))
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if (!request_mem_region(res->start, resource_size(res), "LCD"))
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return -EBUSY;
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fbi = sa1100fb_init_fbinfo(&pdev->dev);
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@ -1217,6 +1229,10 @@ static int __devinit sa1100fb_probe(struct platform_device *pdev)
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if (!fbi)
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goto failed;
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fbi->base = ioremap(res->start, resource_size(res));
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if (!fbi->base)
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goto failed;
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/* Initialize video memory */
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ret = sa1100fb_map_video_memory(fbi);
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if (ret)
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@ -1263,9 +1279,11 @@ static int __devinit sa1100fb_probe(struct platform_device *pdev)
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err_free_irq:
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free_irq(irq, fbi);
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failed:
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if (fbi)
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iounmap(fbi->base);
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platform_set_drvdata(pdev, NULL);
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kfree(fbi);
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release_mem_region(0xb0100000, 0x10000);
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release_mem_region(res->start, resource_size(res));
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return ret;
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}
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@ -10,6 +10,16 @@
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* for more details.
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*/
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#define LCCR0 0x0000 /* LCD Control Reg. 0 */
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#define LCSR 0x0004 /* LCD Status Reg. */
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#define DBAR1 0x0010 /* LCD DMA Base Address Reg. channel 1 */
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#define DCAR1 0x0014 /* LCD DMA Current Address Reg. channel 1 */
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#define DBAR2 0x0018 /* LCD DMA Base Address Reg. channel 2 */
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#define DCAR2 0x001C /* LCD DMA Current Address Reg. channel 2 */
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#define LCCR1 0x0020 /* LCD Control Reg. 1 */
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#define LCCR2 0x0024 /* LCD Control Reg. 2 */
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#define LCCR3 0x0028 /* LCD Control Reg. 3 */
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/* Shadows for LCD controller registers */
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struct sa1100fb_lcd_reg {
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unsigned long lccr0;
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@ -22,6 +32,7 @@ struct sa1100fb_info {
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struct fb_info fb;
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struct device *dev;
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const struct sa1100fb_rgb *rgb[NR_RGB];
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void __iomem *base;
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/*
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* These are the addresses we mapped
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