[WATCHDOG] iTCO_wdt : problem with rebooting on new ICH9 based motherboards
Bugzilla #9868: On Intel motherboards with the ICH9 based I/O controllers (Like DP35DP and DG33FB) the iTCO timer counts but it doesn't reboot the system after the counter expires. This patch fixes this by moving the enabling & disabling of the TCO_EN bit in the SMI_EN register into the start and stop code. Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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Коммит
7cd5b08be3
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@ -1,7 +1,7 @@
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/*
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* intel TCO vendor specific watchdog driver support
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*
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* (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>.
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* (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -19,8 +19,7 @@
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/* Module and version information */
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#define DRV_NAME "iTCO_vendor_support"
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#define DRV_VERSION "1.01"
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#define DRV_RELDATE "11-Nov-2006"
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#define DRV_VERSION "1.02"
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#define PFX DRV_NAME ": "
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/* Includes */
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@ -78,24 +77,6 @@ MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (n
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* 20.6 seconds.
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*/
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static void supermicro_old_pre_start(unsigned long acpibase)
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{
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unsigned long val32;
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val32 = inl(SMI_EN);
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val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
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outl(val32, SMI_EN); /* Needed to activate watchdog */
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}
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static void supermicro_old_pre_stop(unsigned long acpibase)
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{
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unsigned long val32;
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val32 = inl(SMI_EN);
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val32 &= 0x00002000; /* Turn on SMI clearing watchdog */
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outl(val32, SMI_EN); /* Needed to deactivate watchdog */
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}
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static void supermicro_old_pre_keepalive(unsigned long acpibase)
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{
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/* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
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@ -247,18 +228,14 @@ static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
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void iTCO_vendor_pre_start(unsigned long acpibase,
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unsigned int heartbeat)
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{
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if (vendorsupport == SUPERMICRO_OLD_BOARD)
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supermicro_old_pre_start(acpibase);
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else if (vendorsupport == SUPERMICRO_NEW_BOARD)
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if (vendorsupport == SUPERMICRO_NEW_BOARD)
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supermicro_new_pre_start(heartbeat);
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}
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EXPORT_SYMBOL(iTCO_vendor_pre_start);
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void iTCO_vendor_pre_stop(unsigned long acpibase)
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{
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if (vendorsupport == SUPERMICRO_OLD_BOARD)
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supermicro_old_pre_stop(acpibase);
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else if (vendorsupport == SUPERMICRO_NEW_BOARD)
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if (vendorsupport == SUPERMICRO_NEW_BOARD)
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supermicro_new_pre_stop();
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}
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EXPORT_SYMBOL(iTCO_vendor_pre_stop);
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@ -1,7 +1,7 @@
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/*
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* intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets)
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*
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* (c) Copyright 2006-2007 Wim Van Sebroeck <wim@iguana.be>.
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* (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -56,8 +56,7 @@
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/* Module and version information */
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#define DRV_NAME "iTCO_wdt"
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#define DRV_VERSION "1.03"
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#define DRV_RELDATE "30-Apr-2008"
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#define DRV_VERSION "1.04"
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#define PFX DRV_NAME ": "
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/* Includes */
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@ -311,6 +310,7 @@ static int iTCO_wdt_unset_NO_REBOOT_bit(void)
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static int iTCO_wdt_start(void)
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{
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unsigned int val;
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unsigned long val32;
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spin_lock(&iTCO_wdt_private.io_lock);
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@ -323,6 +323,18 @@ static int iTCO_wdt_start(void)
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return -EIO;
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}
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/* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
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val32 = inl(SMI_EN);
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val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
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outl(val32, SMI_EN);
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/* Force the timer to its reload value by writing to the TCO_RLD
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register */
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if (iTCO_wdt_private.iTCO_version == 2)
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outw(0x01, TCO_RLD);
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else if (iTCO_wdt_private.iTCO_version == 1)
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outb(0x01, TCO_RLD);
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/* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
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val = inw(TCO1_CNT);
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val &= 0xf7ff;
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@ -338,6 +350,7 @@ static int iTCO_wdt_start(void)
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static int iTCO_wdt_stop(void)
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{
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unsigned int val;
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unsigned long val32;
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spin_lock(&iTCO_wdt_private.io_lock);
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@ -349,6 +362,11 @@ static int iTCO_wdt_stop(void)
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outw(val, TCO1_CNT);
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val = inw(TCO1_CNT);
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/* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */
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val32 = inl(SMI_EN);
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val32 &= 0x00002000;
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outl(val32, SMI_EN);
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/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
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iTCO_wdt_set_NO_REBOOT_bit();
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@ -459,7 +477,6 @@ static int iTCO_wdt_open(struct inode *inode, struct file *file)
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/*
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* Reload and activate timer
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*/
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iTCO_wdt_keepalive();
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iTCO_wdt_start();
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return nonseekable_open(inode, file);
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}
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@ -604,7 +621,6 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
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int ret;
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u32 base_address;
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unsigned long RCBA;
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unsigned long val32;
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/*
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* Find the ACPI/PM base I/O address which is the base
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@ -644,17 +660,13 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
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/* Set the NO_REBOOT bit to prevent later reboots, just for sure */
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iTCO_wdt_set_NO_REBOOT_bit();
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/* Set the TCO_EN bit in SMI_EN register */
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/* The TCO logic uses the TCO_EN bit in the SMI_EN register */
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if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
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printk(KERN_ERR PFX
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"I/O address 0x%04lx already in use\n", SMI_EN);
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ret = -EIO;
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goto out;
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}
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val32 = inl(SMI_EN);
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val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
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outl(val32, SMI_EN);
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release_region(SMI_EN, 4);
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/* The TCO I/O registers reside in a 32-byte range pointed to
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by the TCOBASE value */
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printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
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TCOBASE);
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ret = -EIO;
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goto out;
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goto unreg_smi_en;
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}
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printk(KERN_INFO PFX
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@ -701,6 +713,8 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
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unreg_region:
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release_region(TCOBASE, 0x20);
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unreg_smi_en:
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release_region(SMI_EN, 4);
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out:
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if (iTCO_wdt_private.iTCO_version == 2)
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iounmap(iTCO_wdt_private.gcs);
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@ -718,6 +732,7 @@ static void __devexit iTCO_wdt_cleanup(void)
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/* Deregister */
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misc_deregister(&iTCO_wdt_miscdev);
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release_region(TCOBASE, 0x20);
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release_region(SMI_EN, 4);
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if (iTCO_wdt_private.iTCO_version == 2)
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iounmap(iTCO_wdt_private.gcs);
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pci_dev_put(iTCO_wdt_private.pdev);
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@ -782,8 +797,8 @@ static int __init iTCO_wdt_init_module(void)
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{
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int err;
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printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s (%s)\n",
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DRV_VERSION, DRV_RELDATE);
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printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s\n",
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DRV_VERSION);
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err = platform_driver_register(&iTCO_wdt_driver);
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if (err)
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