Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Misc i915, vmwgfx and radeon fixes along with a fix for one of those recursive sleep mutex debug cases in the mst code" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/vmwgfx: Fix an issue with the device losing its irq line on module unload drm/vmwgfx: Correctly NULLify dma buffer pointer on failure drm/vmwgfx: Reorder device takedown somewhat drm/vmwgfx: Fix a couple of lock dependency violations drm/radeon: drop setting UPLL to sleep mode drm/radeon: fix wait to actually occur after the signaling callback drm/i915: Prevent TLB error on first execution on SNB drm/i915: Do both mt and gen6 style forcewake reset on ivb probe drm/i915: Make WAIT_IOCTL negative timeouts be indefinite again drm/i915: use in_interrupt() not in_irq() to check context drm/mst: fix recursive sleep warning on qlock drm: Don't assign fbs for universal cursor support to files
This commit is contained in:
Linus Torvalds
Коммит
7cd9beb338
|
|
@ -43,9 +43,10 @@
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#include "drm_crtc_internal.h"
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#include "drm_internal.h"
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static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
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struct drm_mode_fb_cmd2 *r,
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struct drm_file *file_priv);
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static struct drm_framebuffer *
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internal_framebuffer_create(struct drm_device *dev,
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struct drm_mode_fb_cmd2 *r,
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struct drm_file *file_priv);
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/* Avoid boilerplate. I'm tired of typing. */
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#define DRM_ENUM_NAME_FN(fnname, list) \
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@ -2908,13 +2909,11 @@ static int drm_mode_cursor_universal(struct drm_crtc *crtc,
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*/
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if (req->flags & DRM_MODE_CURSOR_BO) {
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if (req->handle) {
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fb = add_framebuffer_internal(dev, &fbreq, file_priv);
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fb = internal_framebuffer_create(dev, &fbreq, file_priv);
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if (IS_ERR(fb)) {
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DRM_DEBUG_KMS("failed to wrap cursor buffer in drm framebuffer\n");
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return PTR_ERR(fb);
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}
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drm_framebuffer_reference(fb);
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} else {
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fb = NULL;
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}
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@ -3267,9 +3266,10 @@ static int framebuffer_check(const struct drm_mode_fb_cmd2 *r)
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return 0;
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}
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static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
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struct drm_mode_fb_cmd2 *r,
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struct drm_file *file_priv)
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static struct drm_framebuffer *
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internal_framebuffer_create(struct drm_device *dev,
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struct drm_mode_fb_cmd2 *r,
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struct drm_file *file_priv)
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{
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struct drm_mode_config *config = &dev->mode_config;
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struct drm_framebuffer *fb;
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@ -3301,12 +3301,6 @@ static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
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return fb;
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}
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mutex_lock(&file_priv->fbs_lock);
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r->fb_id = fb->base.id;
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list_add(&fb->filp_head, &file_priv->fbs);
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DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
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mutex_unlock(&file_priv->fbs_lock);
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return fb;
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}
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@ -3328,15 +3322,24 @@ static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
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int drm_mode_addfb2(struct drm_device *dev,
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void *data, struct drm_file *file_priv)
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{
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struct drm_mode_fb_cmd2 *r = data;
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struct drm_framebuffer *fb;
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if (!drm_core_check_feature(dev, DRIVER_MODESET))
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return -EINVAL;
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fb = add_framebuffer_internal(dev, data, file_priv);
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fb = internal_framebuffer_create(dev, r, file_priv);
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if (IS_ERR(fb))
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return PTR_ERR(fb);
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/* Transfer ownership to the filp for reaping on close */
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DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
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mutex_lock(&file_priv->fbs_lock);
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r->fb_id = fb->base.id;
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list_add(&fb->filp_head, &file_priv->fbs);
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mutex_unlock(&file_priv->fbs_lock);
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return 0;
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}
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@ -733,10 +733,14 @@ static bool check_txmsg_state(struct drm_dp_mst_topology_mgr *mgr,
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struct drm_dp_sideband_msg_tx *txmsg)
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{
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bool ret;
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mutex_lock(&mgr->qlock);
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/*
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* All updates to txmsg->state are protected by mgr->qlock, and the two
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* cases we check here are terminal states. For those the barriers
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* provided by the wake_up/wait_event pair are enough.
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*/
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ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
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txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT);
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mutex_unlock(&mgr->qlock);
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return ret;
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}
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|
|
@ -1363,12 +1367,13 @@ static int process_single_tx_qlock(struct drm_dp_mst_topology_mgr *mgr,
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return 0;
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}
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/* must be called holding qlock */
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static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr)
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{
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struct drm_dp_sideband_msg_tx *txmsg;
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int ret;
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WARN_ON(!mutex_is_locked(&mgr->qlock));
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/* construct a chunk from the first msg in the tx_msg queue */
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if (list_empty(&mgr->tx_msg_downq)) {
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mgr->tx_down_in_progress = false;
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|
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@ -2936,9 +2936,9 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
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req = obj->last_read_req;
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/* Do this after OLR check to make sure we make forward progress polling
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* on this IOCTL with a timeout <=0 (like busy ioctl)
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* on this IOCTL with a timeout == 0 (like busy ioctl)
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*/
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if (args->timeout_ns <= 0) {
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if (args->timeout_ns == 0) {
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ret = -ETIME;
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goto out;
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}
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@ -2948,7 +2948,8 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
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i915_gem_request_reference(req);
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mutex_unlock(&dev->struct_mutex);
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ret = __i915_wait_request(req, reset_counter, true, &args->timeout_ns,
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ret = __i915_wait_request(req, reset_counter, true,
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args->timeout_ns > 0 ? &args->timeout_ns : NULL,
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file->driver_priv);
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mutex_lock(&dev->struct_mutex);
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i915_gem_request_unreference(req);
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@ -4792,6 +4793,9 @@ i915_gem_init_hw(struct drm_device *dev)
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if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
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return -EIO;
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/* Double layer security blanket, see i915_gem_init() */
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intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
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if (dev_priv->ellc_size)
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I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
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@ -4824,7 +4828,7 @@ i915_gem_init_hw(struct drm_device *dev)
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for_each_ring(ring, dev_priv, i) {
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ret = ring->init_hw(ring);
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if (ret)
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return ret;
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goto out;
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}
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for (i = 0; i < NUM_L3_SLICES(dev); i++)
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@ -4841,9 +4845,11 @@ i915_gem_init_hw(struct drm_device *dev)
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DRM_ERROR("Context enable failed %d\n", ret);
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i915_gem_cleanup_ringbuffer(dev);
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return ret;
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goto out;
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}
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out:
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intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
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return ret;
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}
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@ -4877,6 +4883,14 @@ int i915_gem_init(struct drm_device *dev)
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dev_priv->gt.stop_ring = intel_logical_ring_stop;
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}
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/* This is just a security blanket to placate dragons.
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* On some systems, we very sporadically observe that the first TLBs
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* used by the CS may be stale, despite us poking the TLB reset. If
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* we hold the forcewake during initialisation these problems
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* just magically go away.
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*/
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intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
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ret = i915_gem_init_userptr(dev);
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if (ret)
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goto out_unlock;
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@ -4903,6 +4917,7 @@ int i915_gem_init(struct drm_device *dev)
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}
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out_unlock:
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intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
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mutex_unlock(&dev->struct_mutex);
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return ret;
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@ -9716,7 +9716,7 @@ void intel_check_page_flip(struct drm_device *dev, int pipe)
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struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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WARN_ON(!in_irq());
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WARN_ON(!in_interrupt());
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if (crtc == NULL)
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return;
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|
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|
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@ -1048,8 +1048,14 @@ static void intel_uncore_fw_domains_init(struct drm_device *dev)
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|
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/* We need to init first for ECOBUS access and then
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* determine later if we want to reinit, in case of MT access is
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* not working
|
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* not working. In this stage we don't know which flavour this
|
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* ivb is, so it is better to reset also the gen6 fw registers
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* before the ecobus check.
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*/
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__raw_i915_write32(dev_priv, FORCEWAKE, 0);
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__raw_posting_read(dev_priv, ECOBUS);
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fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
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FORCEWAKE_MT, FORCEWAKE_MT_ACK);
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|
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|
|
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|
|
@ -1030,37 +1030,59 @@ static inline bool radeon_test_signaled(struct radeon_fence *fence)
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return test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);
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}
|
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|
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struct radeon_wait_cb {
|
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struct fence_cb base;
|
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struct task_struct *task;
|
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};
|
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|
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static void
|
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radeon_fence_wait_cb(struct fence *fence, struct fence_cb *cb)
|
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{
|
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struct radeon_wait_cb *wait =
|
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container_of(cb, struct radeon_wait_cb, base);
|
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|
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wake_up_process(wait->task);
|
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}
|
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|
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static signed long radeon_fence_default_wait(struct fence *f, bool intr,
|
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signed long t)
|
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{
|
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struct radeon_fence *fence = to_radeon_fence(f);
|
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struct radeon_device *rdev = fence->rdev;
|
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bool signaled;
|
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struct radeon_wait_cb cb;
|
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|
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fence_enable_sw_signaling(&fence->base);
|
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cb.task = current;
|
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|
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/*
|
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* This function has to return -EDEADLK, but cannot hold
|
||||
* exclusive_lock during the wait because some callers
|
||||
* may already hold it. This means checking needs_reset without
|
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* lock, and not fiddling with any gpu internals.
|
||||
*
|
||||
* The callback installed with fence_enable_sw_signaling will
|
||||
* run before our wait_event_*timeout call, so we will see
|
||||
* both the signaled fence and the changes to needs_reset.
|
||||
*/
|
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if (fence_add_callback(f, &cb.base, radeon_fence_wait_cb))
|
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return t;
|
||||
|
||||
if (intr)
|
||||
t = wait_event_interruptible_timeout(rdev->fence_queue,
|
||||
((signaled = radeon_test_signaled(fence)) ||
|
||||
rdev->needs_reset), t);
|
||||
else
|
||||
t = wait_event_timeout(rdev->fence_queue,
|
||||
((signaled = radeon_test_signaled(fence)) ||
|
||||
rdev->needs_reset), t);
|
||||
while (t > 0) {
|
||||
if (intr)
|
||||
set_current_state(TASK_INTERRUPTIBLE);
|
||||
else
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
|
||||
/*
|
||||
* radeon_test_signaled must be called after
|
||||
* set_current_state to prevent a race with wake_up_process
|
||||
*/
|
||||
if (radeon_test_signaled(fence))
|
||||
break;
|
||||
|
||||
if (rdev->needs_reset) {
|
||||
t = -EDEADLK;
|
||||
break;
|
||||
}
|
||||
|
||||
t = schedule_timeout(t);
|
||||
|
||||
if (t > 0 && intr && signal_pending(current))
|
||||
t = -ERESTARTSYS;
|
||||
}
|
||||
|
||||
__set_current_state(TASK_RUNNING);
|
||||
fence_remove_callback(f, &cb.base);
|
||||
|
||||
if (t > 0 && !signaled)
|
||||
return -EDEADLK;
|
||||
return t;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -7130,8 +7130,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
|
|||
WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK);
|
||||
|
||||
if (!vclk || !dclk) {
|
||||
/* keep the Bypass mode, put PLL to sleep */
|
||||
WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK);
|
||||
/* keep the Bypass mode */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -7147,8 +7146,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
|
|||
/* set VCO_MODE to 1 */
|
||||
WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_VCO_MODE_MASK, ~UPLL_VCO_MODE_MASK);
|
||||
|
||||
/* toggle UPLL_SLEEP to 1 then back to 0 */
|
||||
WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK);
|
||||
/* disable sleep mode */
|
||||
WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_SLEEP_MASK);
|
||||
|
||||
/* deassert UPLL_RESET */
|
||||
|
|
|
|||
|
|
@ -725,32 +725,6 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
|
|||
goto out_err1;
|
||||
}
|
||||
|
||||
ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
|
||||
(dev_priv->vram_size >> PAGE_SHIFT));
|
||||
if (unlikely(ret != 0)) {
|
||||
DRM_ERROR("Failed initializing memory manager for VRAM.\n");
|
||||
goto out_err2;
|
||||
}
|
||||
|
||||
dev_priv->has_gmr = true;
|
||||
if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
|
||||
refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
|
||||
VMW_PL_GMR) != 0) {
|
||||
DRM_INFO("No GMR memory available. "
|
||||
"Graphics memory resources are very limited.\n");
|
||||
dev_priv->has_gmr = false;
|
||||
}
|
||||
|
||||
if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
|
||||
dev_priv->has_mob = true;
|
||||
if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
|
||||
VMW_PL_MOB) != 0) {
|
||||
DRM_INFO("No MOB memory available. "
|
||||
"3D will be disabled.\n");
|
||||
dev_priv->has_mob = false;
|
||||
}
|
||||
}
|
||||
|
||||
dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start,
|
||||
dev_priv->mmio_size);
|
||||
|
||||
|
|
@ -813,6 +787,33 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
|
|||
goto out_no_fman;
|
||||
}
|
||||
|
||||
|
||||
ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
|
||||
(dev_priv->vram_size >> PAGE_SHIFT));
|
||||
if (unlikely(ret != 0)) {
|
||||
DRM_ERROR("Failed initializing memory manager for VRAM.\n");
|
||||
goto out_no_vram;
|
||||
}
|
||||
|
||||
dev_priv->has_gmr = true;
|
||||
if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
|
||||
refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
|
||||
VMW_PL_GMR) != 0) {
|
||||
DRM_INFO("No GMR memory available. "
|
||||
"Graphics memory resources are very limited.\n");
|
||||
dev_priv->has_gmr = false;
|
||||
}
|
||||
|
||||
if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
|
||||
dev_priv->has_mob = true;
|
||||
if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
|
||||
VMW_PL_MOB) != 0) {
|
||||
DRM_INFO("No MOB memory available. "
|
||||
"3D will be disabled.\n");
|
||||
dev_priv->has_mob = false;
|
||||
}
|
||||
}
|
||||
|
||||
vmw_kms_save_vga(dev_priv);
|
||||
|
||||
/* Start kms and overlay systems, needs fifo. */
|
||||
|
|
@ -838,6 +839,12 @@ out_no_fifo:
|
|||
vmw_kms_close(dev_priv);
|
||||
out_no_kms:
|
||||
vmw_kms_restore_vga(dev_priv);
|
||||
if (dev_priv->has_mob)
|
||||
(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
|
||||
if (dev_priv->has_gmr)
|
||||
(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
|
||||
(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
|
||||
out_no_vram:
|
||||
vmw_fence_manager_takedown(dev_priv->fman);
|
||||
out_no_fman:
|
||||
if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
|
||||
|
|
@ -853,12 +860,6 @@ out_err4:
|
|||
iounmap(dev_priv->mmio_virt);
|
||||
out_err3:
|
||||
arch_phys_wc_del(dev_priv->mmio_mtrr);
|
||||
if (dev_priv->has_mob)
|
||||
(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
|
||||
if (dev_priv->has_gmr)
|
||||
(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
|
||||
(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
|
||||
out_err2:
|
||||
(void)ttm_bo_device_release(&dev_priv->bdev);
|
||||
out_err1:
|
||||
vmw_ttm_global_release(dev_priv);
|
||||
|
|
@ -887,6 +888,13 @@ static int vmw_driver_unload(struct drm_device *dev)
|
|||
}
|
||||
vmw_kms_close(dev_priv);
|
||||
vmw_overlay_close(dev_priv);
|
||||
|
||||
if (dev_priv->has_mob)
|
||||
(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
|
||||
if (dev_priv->has_gmr)
|
||||
(void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
|
||||
(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
|
||||
|
||||
vmw_fence_manager_takedown(dev_priv->fman);
|
||||
if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
|
||||
drm_irq_uninstall(dev_priv->dev);
|
||||
|
|
@ -898,11 +906,6 @@ static int vmw_driver_unload(struct drm_device *dev)
|
|||
ttm_object_device_release(&dev_priv->tdev);
|
||||
iounmap(dev_priv->mmio_virt);
|
||||
arch_phys_wc_del(dev_priv->mmio_mtrr);
|
||||
if (dev_priv->has_mob)
|
||||
(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
|
||||
if (dev_priv->has_gmr)
|
||||
(void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
|
||||
(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
|
||||
(void)ttm_bo_device_release(&dev_priv->bdev);
|
||||
vmw_ttm_global_release(dev_priv);
|
||||
|
||||
|
|
@ -1235,6 +1238,7 @@ static void vmw_remove(struct pci_dev *pdev)
|
|||
{
|
||||
struct drm_device *dev = pci_get_drvdata(pdev);
|
||||
|
||||
pci_disable_device(pdev);
|
||||
drm_put_dev(dev);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -890,7 +890,8 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
|
|||
ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
|
||||
if (unlikely(ret != 0)) {
|
||||
DRM_ERROR("Could not find or use MOB buffer.\n");
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto out_no_reloc;
|
||||
}
|
||||
bo = &vmw_bo->base;
|
||||
|
||||
|
|
@ -914,7 +915,7 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
|
|||
|
||||
out_no_reloc:
|
||||
vmw_dmabuf_unreference(&vmw_bo);
|
||||
vmw_bo_p = NULL;
|
||||
*vmw_bo_p = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -951,7 +952,8 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
|
|||
ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
|
||||
if (unlikely(ret != 0)) {
|
||||
DRM_ERROR("Could not find or use GMR region.\n");
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto out_no_reloc;
|
||||
}
|
||||
bo = &vmw_bo->base;
|
||||
|
||||
|
|
@ -974,7 +976,7 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
|
|||
|
||||
out_no_reloc:
|
||||
vmw_dmabuf_unreference(&vmw_bo);
|
||||
vmw_bo_p = NULL;
|
||||
*vmw_bo_p = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -2780,13 +2782,11 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
|
|||
NULL, arg->command_size, arg->throttle_us,
|
||||
(void __user *)(unsigned long)arg->fence_rep,
|
||||
NULL);
|
||||
|
||||
ttm_read_unlock(&dev_priv->reservation_sem);
|
||||
if (unlikely(ret != 0))
|
||||
goto out_unlock;
|
||||
return ret;
|
||||
|
||||
vmw_kms_cursor_post_execbuf(dev_priv);
|
||||
|
||||
out_unlock:
|
||||
ttm_read_unlock(&dev_priv->reservation_sem);
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2033,23 +2033,17 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
|
|||
int i;
|
||||
struct drm_mode_config *mode_config = &dev->mode_config;
|
||||
|
||||
ret = ttm_read_lock(&dev_priv->reservation_sem, true);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
if (!arg->num_outputs) {
|
||||
struct drm_vmw_rect def_rect = {0, 0, 800, 600};
|
||||
vmw_du_update_layout(dev_priv, 1, &def_rect);
|
||||
goto out_unlock;
|
||||
return 0;
|
||||
}
|
||||
|
||||
rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
|
||||
rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
|
||||
GFP_KERNEL);
|
||||
if (unlikely(!rects)) {
|
||||
ret = -ENOMEM;
|
||||
goto out_unlock;
|
||||
}
|
||||
if (unlikely(!rects))
|
||||
return -ENOMEM;
|
||||
|
||||
user_rects = (void __user *)(unsigned long)arg->rects;
|
||||
ret = copy_from_user(rects, user_rects, rects_size);
|
||||
|
|
@ -2074,7 +2068,5 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
|
|||
|
||||
out_free:
|
||||
kfree(rects);
|
||||
out_unlock:
|
||||
ttm_read_unlock(&dev_priv->reservation_sem);
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
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