arm64: alternatives: Split up alternative.h
asm/alternative.h contains both the macros needed to use alternatives, as well the type definitions and function prototypes for applying them. Split the header in two, so that alternatives can be used from core header files such as linux/compiler.h without the risk of circular includes Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Will Deacon
Родитель
e2a2190a80
Коммит
7cda23da52
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@ -0,0 +1,217 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_ALTERNATIVE_MACROS_H
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#define __ASM_ALTERNATIVE_MACROS_H
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#include <asm/cpucaps.h>
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#define ARM64_CB_PATCH ARM64_NCAPS
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/* A64 instructions are always 32 bits. */
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#define AARCH64_INSN_SIZE 4
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#ifndef __ASSEMBLY__
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#include <linux/stringify.h>
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#define ALTINSTR_ENTRY(feature) \
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" .word 661b - .\n" /* label */ \
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" .word 663f - .\n" /* new instruction */ \
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" .hword " __stringify(feature) "\n" /* feature bit */ \
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" .byte 662b-661b\n" /* source len */ \
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" .byte 664f-663f\n" /* replacement len */
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#define ALTINSTR_ENTRY_CB(feature, cb) \
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" .word 661b - .\n" /* label */ \
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" .word " __stringify(cb) "- .\n" /* callback */ \
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" .hword " __stringify(feature) "\n" /* feature bit */ \
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" .byte 662b-661b\n" /* source len */ \
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" .byte 664f-663f\n" /* replacement len */
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/*
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* alternative assembly primitive:
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*
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* If any of these .org directive fail, it means that insn1 and insn2
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* don't have the same length. This used to be written as
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*
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* .if ((664b-663b) != (662b-661b))
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* .error "Alternatives instruction length mismatch"
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* .endif
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*
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* but most assemblers die if insn1 or insn2 have a .inst. This should
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* be fixed in a binutils release posterior to 2.25.51.0.2 (anything
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* containing commit 4e4d08cf7399b606 or c1baaddf8861).
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*
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* Alternatives with callbacks do not generate replacement instructions.
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*/
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#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
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".if "__stringify(cfg_enabled)" == 1\n" \
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"661:\n\t" \
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oldinstr "\n" \
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"662:\n" \
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".pushsection .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY(feature) \
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".popsection\n" \
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".subsection 1\n" \
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"663:\n\t" \
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newinstr "\n" \
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"664:\n\t" \
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".org . - (664b-663b) + (662b-661b)\n\t" \
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".org . - (662b-661b) + (664b-663b)\n\t" \
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".previous\n" \
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".endif\n"
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#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \
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".if "__stringify(cfg_enabled)" == 1\n" \
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"661:\n\t" \
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oldinstr "\n" \
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"662:\n" \
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".pushsection .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY_CB(feature, cb) \
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".popsection\n" \
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"663:\n\t" \
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"664:\n\t" \
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".endif\n"
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#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
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__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
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#define ALTERNATIVE_CB(oldinstr, cb) \
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__ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb)
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#else
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#include <asm/assembler.h>
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.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
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.word \orig_offset - .
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.word \alt_offset - .
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.hword \feature
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.byte \orig_len
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.byte \alt_len
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.endm
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.macro alternative_insn insn1, insn2, cap, enable = 1
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.if \enable
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661: \insn1
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662: .pushsection .altinstructions, "a"
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altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
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.popsection
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.subsection 1
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663: \insn2
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664: .previous
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.org . - (664b-663b) + (662b-661b)
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.org . - (662b-661b) + (664b-663b)
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.endif
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.endm
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/*
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* Alternative sequences
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*
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* The code for the case where the capability is not present will be
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* assembled and linked as normal. There are no restrictions on this
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* code.
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*
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* The code for the case where the capability is present will be
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* assembled into a special section to be used for dynamic patching.
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* Code for that case must:
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*
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* 1. Be exactly the same length (in bytes) as the default code
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* sequence.
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*
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* 2. Not contain a branch target that is used outside of the
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* alternative sequence it is defined in (branches into an
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* alternative sequence are not fixed up).
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*/
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/*
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* Begin an alternative code sequence.
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*/
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.macro alternative_if_not cap
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.set .Lasm_alt_mode, 0
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.pushsection .altinstructions, "a"
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altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
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.popsection
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661:
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.endm
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.macro alternative_if cap
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.set .Lasm_alt_mode, 1
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.pushsection .altinstructions, "a"
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altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
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.popsection
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.subsection 1
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.align 2 /* So GAS knows label 661 is suitably aligned */
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661:
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.endm
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.macro alternative_cb cb
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.set .Lasm_alt_mode, 0
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.pushsection .altinstructions, "a"
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altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0
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.popsection
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661:
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.endm
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/*
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* Provide the other half of the alternative code sequence.
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*/
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.macro alternative_else
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662:
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.if .Lasm_alt_mode==0
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.subsection 1
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.else
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.previous
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.endif
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663:
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.endm
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/*
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* Complete an alternative code sequence.
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*/
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.macro alternative_endif
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664:
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.if .Lasm_alt_mode==0
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.previous
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.endif
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.org . - (664b-663b) + (662b-661b)
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.org . - (662b-661b) + (664b-663b)
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.endm
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/*
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* Callback-based alternative epilogue
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*/
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.macro alternative_cb_end
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662:
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.endm
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/*
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* Provides a trivial alternative or default sequence consisting solely
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* of NOPs. The number of NOPs is chosen automatically to match the
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* previous case.
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*/
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.macro alternative_else_nop_endif
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alternative_else
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nops (662b-661b) / AARCH64_INSN_SIZE
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alternative_endif
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.endm
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#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
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alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
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.macro user_alt, label, oldinstr, newinstr, cond
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9999: alternative_insn "\oldinstr", "\newinstr", \cond
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_asm_extable 9999b, \label
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.endm
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#endif /* __ASSEMBLY__ */
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/*
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* Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
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*
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* Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
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* N.B. If CONFIG_FOO is specified, but not selected, the whole block
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* will be omitted, including oldinstr.
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*/
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#define ALTERNATIVE(oldinstr, newinstr, ...) \
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_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
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#endif /* __ASM_ALTERNATIVE_MACROS_H */
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@ -2,17 +2,13 @@
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#ifndef __ASM_ALTERNATIVE_H
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#ifndef __ASM_ALTERNATIVE_H
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#define __ASM_ALTERNATIVE_H
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#define __ASM_ALTERNATIVE_H
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#include <asm/cpucaps.h>
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#include <asm/alternative-macros.h>
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#include <asm/insn.h>
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#define ARM64_CB_PATCH ARM64_NCAPS
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <linux/stddef.h>
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#include <linux/stringify.h>
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struct alt_instr {
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struct alt_instr {
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s32 orig_offset; /* offset to original instruction */
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s32 orig_offset; /* offset to original instruction */
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@ -35,205 +31,5 @@ void apply_alternatives_module(void *start, size_t length);
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static inline void apply_alternatives_module(void *start, size_t length) { }
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static inline void apply_alternatives_module(void *start, size_t length) { }
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#endif
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#endif
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#define ALTINSTR_ENTRY(feature) \
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#endif /* __ASSEMBLY__ */
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" .word 661b - .\n" /* label */ \
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" .word 663f - .\n" /* new instruction */ \
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" .hword " __stringify(feature) "\n" /* feature bit */ \
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" .byte 662b-661b\n" /* source len */ \
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" .byte 664f-663f\n" /* replacement len */
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#define ALTINSTR_ENTRY_CB(feature, cb) \
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" .word 661b - .\n" /* label */ \
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" .word " __stringify(cb) "- .\n" /* callback */ \
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" .hword " __stringify(feature) "\n" /* feature bit */ \
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" .byte 662b-661b\n" /* source len */ \
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" .byte 664f-663f\n" /* replacement len */
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/*
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* alternative assembly primitive:
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*
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* If any of these .org directive fail, it means that insn1 and insn2
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* don't have the same length. This used to be written as
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*
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* .if ((664b-663b) != (662b-661b))
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* .error "Alternatives instruction length mismatch"
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* .endif
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*
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* but most assemblers die if insn1 or insn2 have a .inst. This should
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* be fixed in a binutils release posterior to 2.25.51.0.2 (anything
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* containing commit 4e4d08cf7399b606 or c1baaddf8861).
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*
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* Alternatives with callbacks do not generate replacement instructions.
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*/
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#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
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".if "__stringify(cfg_enabled)" == 1\n" \
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"661:\n\t" \
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oldinstr "\n" \
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"662:\n" \
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".pushsection .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY(feature) \
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".popsection\n" \
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".subsection 1\n" \
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"663:\n\t" \
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newinstr "\n" \
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"664:\n\t" \
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".org . - (664b-663b) + (662b-661b)\n\t" \
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".org . - (662b-661b) + (664b-663b)\n\t" \
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".previous\n" \
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".endif\n"
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#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \
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".if "__stringify(cfg_enabled)" == 1\n" \
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"661:\n\t" \
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oldinstr "\n" \
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"662:\n" \
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".pushsection .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY_CB(feature, cb) \
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".popsection\n" \
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"663:\n\t" \
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"664:\n\t" \
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".endif\n"
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#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
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__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
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#define ALTERNATIVE_CB(oldinstr, cb) \
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__ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb)
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#else
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#include <asm/assembler.h>
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.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
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.word \orig_offset - .
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.word \alt_offset - .
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.hword \feature
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.byte \orig_len
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.byte \alt_len
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.endm
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.macro alternative_insn insn1, insn2, cap, enable = 1
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.if \enable
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661: \insn1
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662: .pushsection .altinstructions, "a"
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altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
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.popsection
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.subsection 1
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663: \insn2
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664: .previous
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.org . - (664b-663b) + (662b-661b)
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.org . - (662b-661b) + (664b-663b)
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.endif
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||||||
.endm
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||||||
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||||||
/*
|
|
||||||
* Alternative sequences
|
|
||||||
*
|
|
||||||
* The code for the case where the capability is not present will be
|
|
||||||
* assembled and linked as normal. There are no restrictions on this
|
|
||||||
* code.
|
|
||||||
*
|
|
||||||
* The code for the case where the capability is present will be
|
|
||||||
* assembled into a special section to be used for dynamic patching.
|
|
||||||
* Code for that case must:
|
|
||||||
*
|
|
||||||
* 1. Be exactly the same length (in bytes) as the default code
|
|
||||||
* sequence.
|
|
||||||
*
|
|
||||||
* 2. Not contain a branch target that is used outside of the
|
|
||||||
* alternative sequence it is defined in (branches into an
|
|
||||||
* alternative sequence are not fixed up).
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Begin an alternative code sequence.
|
|
||||||
*/
|
|
||||||
.macro alternative_if_not cap
|
|
||||||
.set .Lasm_alt_mode, 0
|
|
||||||
.pushsection .altinstructions, "a"
|
|
||||||
altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
|
|
||||||
.popsection
|
|
||||||
661:
|
|
||||||
.endm
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|
||||||
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|
||||||
.macro alternative_if cap
|
|
||||||
.set .Lasm_alt_mode, 1
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|
||||||
.pushsection .altinstructions, "a"
|
|
||||||
altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
|
|
||||||
.popsection
|
|
||||||
.subsection 1
|
|
||||||
.align 2 /* So GAS knows label 661 is suitably aligned */
|
|
||||||
661:
|
|
||||||
.endm
|
|
||||||
|
|
||||||
.macro alternative_cb cb
|
|
||||||
.set .Lasm_alt_mode, 0
|
|
||||||
.pushsection .altinstructions, "a"
|
|
||||||
altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0
|
|
||||||
.popsection
|
|
||||||
661:
|
|
||||||
.endm
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Provide the other half of the alternative code sequence.
|
|
||||||
*/
|
|
||||||
.macro alternative_else
|
|
||||||
662:
|
|
||||||
.if .Lasm_alt_mode==0
|
|
||||||
.subsection 1
|
|
||||||
.else
|
|
||||||
.previous
|
|
||||||
.endif
|
|
||||||
663:
|
|
||||||
.endm
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Complete an alternative code sequence.
|
|
||||||
*/
|
|
||||||
.macro alternative_endif
|
|
||||||
664:
|
|
||||||
.if .Lasm_alt_mode==0
|
|
||||||
.previous
|
|
||||||
.endif
|
|
||||||
.org . - (664b-663b) + (662b-661b)
|
|
||||||
.org . - (662b-661b) + (664b-663b)
|
|
||||||
.endm
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Callback-based alternative epilogue
|
|
||||||
*/
|
|
||||||
.macro alternative_cb_end
|
|
||||||
662:
|
|
||||||
.endm
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Provides a trivial alternative or default sequence consisting solely
|
|
||||||
* of NOPs. The number of NOPs is chosen automatically to match the
|
|
||||||
* previous case.
|
|
||||||
*/
|
|
||||||
.macro alternative_else_nop_endif
|
|
||||||
alternative_else
|
|
||||||
nops (662b-661b) / AARCH64_INSN_SIZE
|
|
||||||
alternative_endif
|
|
||||||
.endm
|
|
||||||
|
|
||||||
#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
|
|
||||||
alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
|
|
||||||
|
|
||||||
.macro user_alt, label, oldinstr, newinstr, cond
|
|
||||||
9999: alternative_insn "\oldinstr", "\newinstr", \cond
|
|
||||||
_asm_extable 9999b, \label
|
|
||||||
.endm
|
|
||||||
|
|
||||||
#endif /* __ASSEMBLY__ */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
|
|
||||||
*
|
|
||||||
* Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
|
|
||||||
* N.B. If CONFIG_FOO is specified, but not selected, the whole block
|
|
||||||
* will be omitted, including oldinstr.
|
|
||||||
*/
|
|
||||||
#define ALTERNATIVE(oldinstr, newinstr, ...) \
|
|
||||||
_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
|
|
||||||
|
|
||||||
#endif /* __ASM_ALTERNATIVE_H */
|
#endif /* __ASM_ALTERNATIVE_H */
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
#ifndef __ASM_ASM_UACCESS_H
|
#ifndef __ASM_ASM_UACCESS_H
|
||||||
#define __ASM_ASM_UACCESS_H
|
#define __ASM_ASM_UACCESS_H
|
||||||
|
|
||||||
#include <asm/alternative.h>
|
#include <asm/alternative-macros.h>
|
||||||
#include <asm/kernel-pgtable.h>
|
#include <asm/kernel-pgtable.h>
|
||||||
#include <asm/mmu.h>
|
#include <asm/mmu.h>
|
||||||
#include <asm/sysreg.h>
|
#include <asm/sysreg.h>
|
||||||
|
|
|
||||||
|
|
@ -10,8 +10,7 @@
|
||||||
#include <linux/build_bug.h>
|
#include <linux/build_bug.h>
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
|
|
||||||
/* A64 instructions are always 32 bits. */
|
#include <asm/alternative.h>
|
||||||
#define AARCH64_INSN_SIZE 4
|
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
#ifndef __ASSEMBLY__
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -24,6 +24,7 @@
|
||||||
#include <linux/prctl.h>
|
#include <linux/prctl.h>
|
||||||
#include <linux/sched/task_stack.h>
|
#include <linux/sched/task_stack.h>
|
||||||
|
|
||||||
|
#include <asm/insn.h>
|
||||||
#include <asm/spectre.h>
|
#include <asm/spectre.h>
|
||||||
#include <asm/traps.h>
|
#include <asm/traps.h>
|
||||||
|
|
||||||
|
|
|
||||||
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