[SCSI] pm80xx: Resetting the phy state.
Setting the phy state for hard reset response. After sending hard reset for a device ,phy down event sets the phy state to zero but for phy up event it will not set the phy state again.This will cause problem to successive hard resets. Signed-off-by: Nikith.Ganigarakoppal@pmcs.com Signed-off-by: Anandkumar.Santhanam@pmcs.com Reviewed-by: Jack Wang <jinpu.wang@profitbricks.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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34a9b81b47
Коммит
7d02900548
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@ -3403,6 +3403,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
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unsigned long flags;
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u8 deviceType = pPayload->sas_identify.dev_type;
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port->port_state = portstate;
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phy->phy_state = PHY_STATE_LINK_UP_SPC;
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PM8001_MSG_DBG(pm8001_ha,
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pm8001_printk("HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
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port_id, phy_id));
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@ -3483,6 +3484,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
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pm8001_printk("HW_EVENT_SATA_PHY_UP port id = %d,"
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" phy id = %d\n", port_id, phy_id));
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port->port_state = portstate;
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phy->phy_state = PHY_STATE_LINK_UP_SPC;
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port->port_attached = 1;
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pm8001_get_lrate_mode(phy, link_rate);
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phy->phy_type |= PORT_TYPE_SATA;
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@ -131,6 +131,10 @@
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#define LINKRATE_30 (0x02 << 8)
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#define LINKRATE_60 (0x04 << 8)
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/* for phy state */
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#define PHY_STATE_LINK_UP_SPC 0x1
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/* for new SPC controllers MEMBASE III is shared between BIOS and DATA */
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#define GSM_SM_BASE 0x4F0000
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struct mpi_msg_hdr{
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@ -2894,6 +2894,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
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unsigned long flags;
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u8 deviceType = pPayload->sas_identify.dev_type;
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port->port_state = portstate;
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phy->phy_state = PHY_STATE_LINK_UP_SPCV;
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PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
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"portid:%d; phyid:%d; linkrate:%d; "
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"portstate:%x; devicetype:%x\n",
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@ -2978,6 +2979,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
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port_id, phy_id, link_rate, portstate));
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port->port_state = portstate;
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phy->phy_state = PHY_STATE_LINK_UP_SPCV;
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port->port_attached = 1;
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pm8001_get_lrate_mode(phy, link_rate);
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phy->phy_type |= PORT_TYPE_SATA;
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@ -215,6 +215,8 @@
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#define SAS_DOPNRJT_RTRY_TMO 128
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#define SAS_COPNRJT_RTRY_TMO 128
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/* for phy state */
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#define PHY_STATE_LINK_UP_SPCV 0x2
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/*
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Making ORR bigger than IT NEXUS LOSS which is 2000000us = 2 second.
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Assuming a bigger value 3 second, 3000000/128 = 23437.5 where 128
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