KVM: arm64: Remove SPSR manipulation primitives
The SPSR setting code is now completely unused, including that dealing with banked AArch32 SPSRs. Cleanup time. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
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7d76b8a603
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@ -34,8 +34,6 @@ enum exception_type {
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};
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unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num);
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unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu);
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void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v);
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bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
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void kvm_skip_instr32(struct kvm_vcpu *vcpu);
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@ -180,30 +178,6 @@ static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
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vcpu_gp_regs(vcpu)->regs[reg_num] = val;
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}
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static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu)
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{
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if (vcpu_mode_is_32bit(vcpu))
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return vcpu_read_spsr32(vcpu);
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if (vcpu->arch.sysregs_loaded_on_cpu)
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return read_sysreg_el1(SYS_SPSR);
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else
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return __vcpu_sys_reg(vcpu, SPSR_EL1);
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}
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static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
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{
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if (vcpu_mode_is_32bit(vcpu)) {
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vcpu_write_spsr32(vcpu, v);
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return;
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}
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if (vcpu->arch.sysregs_loaded_on_cpu)
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write_sysreg_el1(v, SYS_SPSR);
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else
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__vcpu_sys_reg(vcpu, SPSR_EL1) = v;
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}
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/*
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* The layout of SPSR for an AArch32 state is different when observed from an
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* AArch64 SPSR_ELx or an AArch32 SPSR_*. This function generates the AArch32
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@ -126,99 +126,3 @@ unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num)
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return reg_array + vcpu_reg_offsets[mode][reg_num];
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}
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/*
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* Return the SPSR for the current mode of the virtual CPU.
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*/
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static int vcpu_spsr32_mode(const struct kvm_vcpu *vcpu)
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{
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unsigned long mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK;
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switch (mode) {
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case PSR_AA32_MODE_SVC: return KVM_SPSR_SVC;
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case PSR_AA32_MODE_ABT: return KVM_SPSR_ABT;
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case PSR_AA32_MODE_UND: return KVM_SPSR_UND;
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case PSR_AA32_MODE_IRQ: return KVM_SPSR_IRQ;
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case PSR_AA32_MODE_FIQ: return KVM_SPSR_FIQ;
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default: BUG();
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}
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}
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unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu)
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{
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int spsr_idx = vcpu_spsr32_mode(vcpu);
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if (!vcpu->arch.sysregs_loaded_on_cpu) {
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switch (spsr_idx) {
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case KVM_SPSR_SVC:
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return __vcpu_sys_reg(vcpu, SPSR_EL1);
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case KVM_SPSR_ABT:
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return vcpu->arch.ctxt.spsr_abt;
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case KVM_SPSR_UND:
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return vcpu->arch.ctxt.spsr_und;
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case KVM_SPSR_IRQ:
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return vcpu->arch.ctxt.spsr_irq;
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case KVM_SPSR_FIQ:
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return vcpu->arch.ctxt.spsr_fiq;
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}
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}
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switch (spsr_idx) {
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case KVM_SPSR_SVC:
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return read_sysreg_el1(SYS_SPSR);
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case KVM_SPSR_ABT:
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return read_sysreg(spsr_abt);
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case KVM_SPSR_UND:
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return read_sysreg(spsr_und);
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case KVM_SPSR_IRQ:
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return read_sysreg(spsr_irq);
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case KVM_SPSR_FIQ:
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return read_sysreg(spsr_fiq);
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default:
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BUG();
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}
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}
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void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v)
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{
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int spsr_idx = vcpu_spsr32_mode(vcpu);
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if (!vcpu->arch.sysregs_loaded_on_cpu) {
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switch (spsr_idx) {
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case KVM_SPSR_SVC:
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__vcpu_sys_reg(vcpu, SPSR_EL1) = v;
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break;
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case KVM_SPSR_ABT:
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vcpu->arch.ctxt.spsr_abt = v;
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break;
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case KVM_SPSR_UND:
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vcpu->arch.ctxt.spsr_und = v;
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break;
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case KVM_SPSR_IRQ:
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vcpu->arch.ctxt.spsr_irq = v;
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break;
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case KVM_SPSR_FIQ:
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vcpu->arch.ctxt.spsr_fiq = v;
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break;
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}
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return;
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}
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switch (spsr_idx) {
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case KVM_SPSR_SVC:
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write_sysreg_el1(v, SYS_SPSR);
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break;
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case KVM_SPSR_ABT:
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write_sysreg(v, spsr_abt);
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break;
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case KVM_SPSR_UND:
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write_sysreg(v, spsr_und);
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break;
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case KVM_SPSR_IRQ:
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write_sysreg(v, spsr_irq);
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break;
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case KVM_SPSR_FIQ:
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write_sysreg(v, spsr_fiq);
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break;
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}
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}
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