PCI: hv: Use vPCI protocol version 1.2
Update the Hyper-V vPCI driver to use the Server-2016 version of the vPCI protocol, fixing MSI creation and retargeting issues. Signed-off-by: Jork Loeser <jloeser@microsoft.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: K. Y. Srinivasan <kys@microsoft.com> Acked-by: K. Y. Srinivasan <kys@microsoft.com>
This commit is contained in:
Jork Loeser
Bjorn Helgaas
Родитель
b1db7e7e1d
Коммит
7dcf90e9e0
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@ -152,6 +152,12 @@
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*/
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#define HV_X64_DEPRECATING_AEOI_RECOMMENDED (1 << 9)
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/*
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* HV_VP_SET available
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*/
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#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED (1 << 11)
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/*
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* Crash notification flag.
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*/
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@ -70,6 +70,7 @@
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enum pci_protocol_version_t {
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PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
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PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
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};
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#define CPU_AFFINITY_ALL -1ULL
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@ -79,6 +80,7 @@ enum pci_protocol_version_t {
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* first.
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*/
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static enum pci_protocol_version_t pci_protocol_versions[] = {
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PCI_PROTOCOL_VERSION_1_2,
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PCI_PROTOCOL_VERSION_1_1,
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};
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@ -124,6 +126,9 @@ enum pci_message_type {
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PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
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PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
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PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
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PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
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PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
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PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
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PCI_MESSAGE_MAXIMUM
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};
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@ -193,6 +198,30 @@ struct hv_msi_desc {
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u64 cpu_mask;
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} __packed;
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/**
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* struct hv_msi_desc2 - 1.2 version of hv_msi_desc
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* @vector: IDT entry
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* @delivery_mode: As defined in Intel's Programmer's
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* Reference Manual, Volume 3, Chapter 8.
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* @vector_count: Number of contiguous entries in the
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* Interrupt Descriptor Table that are
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* occupied by this Message-Signaled
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* Interrupt. For "MSI", as first defined
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* in PCI 2.2, this can be between 1 and
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* 32. For "MSI-X," as first defined in PCI
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* 3.0, this must be 1, as each MSI-X table
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* entry would have its own descriptor.
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* @processor_count: number of bits enabled in array.
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* @processor_array: All the target virtual processors.
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*/
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struct hv_msi_desc2 {
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u8 vector;
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u8 delivery_mode;
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u16 vector_count;
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u16 processor_count;
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u16 processor_array[32];
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} __packed;
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/**
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* struct tran_int_desc
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* @reserved: unused, padding
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@ -309,6 +338,14 @@ struct pci_resources_assigned {
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u32 reserved[4];
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} __packed;
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struct pci_resources_assigned2 {
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struct pci_message message_type;
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union win_slot_encoding wslot;
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u8 memory_range[0x14][6]; /* not used here */
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u32 msi_descriptor_count;
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u8 reserved[70];
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} __packed;
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struct pci_create_interrupt {
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struct pci_message message_type;
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union win_slot_encoding wslot;
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@ -321,6 +358,12 @@ struct pci_create_int_response {
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struct tran_int_desc int_desc;
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} __packed;
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struct pci_create_interrupt2 {
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struct pci_message message_type;
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union win_slot_encoding wslot;
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struct hv_msi_desc2 int_desc;
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} __packed;
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struct pci_delete_interrupt {
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struct pci_message message_type;
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union win_slot_encoding wslot;
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@ -346,17 +389,42 @@ static int pci_ring_size = (4 * PAGE_SIZE);
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#define HV_PARTITION_ID_SELF ((u64)-1)
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#define HVCALL_RETARGET_INTERRUPT 0x7e
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struct retarget_msi_interrupt {
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u64 partition_id; /* use "self" */
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u64 device_id;
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struct hv_interrupt_entry {
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u32 source; /* 1 for MSI(-X) */
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u32 reserved1;
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u32 address;
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u32 data;
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u64 reserved2;
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};
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#define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */
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struct hv_vp_set {
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u64 format; /* 0 (HvGenericSetSparse4k) */
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u64 valid_banks;
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u64 masks[HV_VP_SET_BANK_COUNT_MAX];
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};
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/*
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* flags for hv_device_interrupt_target.flags
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*/
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#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
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#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
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struct hv_device_interrupt_target {
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u32 vector;
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u32 flags;
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u64 vp_mask;
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union {
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u64 vp_mask;
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struct hv_vp_set vp_set;
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};
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};
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struct retarget_msi_interrupt {
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u64 partition_id; /* use "self" */
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u64 device_id;
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struct hv_interrupt_entry int_entry;
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u64 reserved2;
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struct hv_device_interrupt_target int_target;
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} __packed;
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/*
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@ -850,8 +918,11 @@ static void hv_irq_unmask(struct irq_data *data)
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struct cpumask *dest;
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struct pci_bus *pbus;
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struct pci_dev *pdev;
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int cpu;
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unsigned long flags;
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u32 var_size = 0;
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int cpu_vmbus;
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int cpu;
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u64 res;
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dest = irq_data_get_affinity_mask(data);
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pdev = msi_desc_to_pci_dev(msi_desc);
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@ -863,23 +934,74 @@ static void hv_irq_unmask(struct irq_data *data)
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params = &hbus->retarget_msi_interrupt_params;
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memset(params, 0, sizeof(*params));
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params->partition_id = HV_PARTITION_ID_SELF;
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params->source = 1; /* MSI(-X) */
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params->address = msi_desc->msg.address_lo;
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params->data = msi_desc->msg.data;
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params->int_entry.source = 1; /* MSI(-X) */
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params->int_entry.address = msi_desc->msg.address_lo;
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params->int_entry.data = msi_desc->msg.data;
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params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
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(hbus->hdev->dev_instance.b[4] << 16) |
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(hbus->hdev->dev_instance.b[7] << 8) |
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(hbus->hdev->dev_instance.b[6] & 0xf8) |
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PCI_FUNC(pdev->devfn);
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params->vector = cfg->vector;
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params->int_target.vector = cfg->vector;
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for_each_cpu_and(cpu, dest, cpu_online_mask)
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params->vp_mask |= (1ULL << hv_tmp_cpu_nr_to_vp_nr(cpu));
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/*
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* Honoring apic->irq_delivery_mode set to dest_Fixed by
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* setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
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* spurious interrupt storm. Not doing so does not seem to have a
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* negative effect (yet?).
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*/
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hv_do_hypercall(HVCALL_RETARGET_INTERRUPT, params, NULL);
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if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
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/*
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* PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
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* HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
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* with >64 VP support.
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* ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
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* is not sufficient for this hypercall.
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*/
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params->int_target.flags |=
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HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
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params->int_target.vp_set.valid_banks =
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(1ull << HV_VP_SET_BANK_COUNT_MAX) - 1;
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/*
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* var-sized hypercall, var-size starts after vp_mask (thus
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* vp_set.format does not count, but vp_set.valid_banks does).
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*/
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var_size = 1 + HV_VP_SET_BANK_COUNT_MAX;
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for_each_cpu_and(cpu, dest, cpu_online_mask) {
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cpu_vmbus = hv_tmp_cpu_nr_to_vp_nr(cpu);
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if (cpu_vmbus >= HV_VP_SET_BANK_COUNT_MAX * 64) {
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dev_err(&hbus->hdev->device,
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"too high CPU %d", cpu_vmbus);
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res = 1;
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goto exit_unlock;
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}
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params->int_target.vp_set.masks[cpu_vmbus / 64] |=
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(1ULL << (cpu_vmbus & 63));
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}
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} else {
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for_each_cpu_and(cpu, dest, cpu_online_mask) {
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params->int_target.vp_mask |=
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(1ULL << hv_tmp_cpu_nr_to_vp_nr(cpu));
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}
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}
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res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
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params, NULL);
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exit_unlock:
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spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
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if (res) {
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dev_err(&hbus->hdev->device,
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"%s() failed: %#llx", __func__, res);
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return;
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}
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pci_msi_unmask_irq(data);
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}
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@ -900,6 +1022,53 @@ static void hv_pci_compose_compl(void *context, struct pci_response *resp,
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complete(&comp_pkt->comp_pkt.host_event);
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}
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static u32 hv_compose_msi_req_v1(
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struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
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u32 slot, u8 vector)
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{
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int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
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int_pkt->wslot.slot = slot;
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int_pkt->int_desc.vector = vector;
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int_pkt->int_desc.vector_count = 1;
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int_pkt->int_desc.delivery_mode =
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(apic->irq_delivery_mode == dest_LowestPrio) ?
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dest_LowestPrio : dest_Fixed;
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/*
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* Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
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* hv_irq_unmask().
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*/
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int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
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return sizeof(*int_pkt);
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}
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static u32 hv_compose_msi_req_v2(
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struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
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u32 slot, u8 vector)
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{
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int cpu;
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int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
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int_pkt->wslot.slot = slot;
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int_pkt->int_desc.vector = vector;
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int_pkt->int_desc.vector_count = 1;
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int_pkt->int_desc.delivery_mode =
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(apic->irq_delivery_mode == dest_LowestPrio) ?
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dest_LowestPrio : dest_Fixed;
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/*
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* Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
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* by subsequent retarget in hv_irq_unmask().
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*/
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cpu = cpumask_first_and(affinity, cpu_online_mask);
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int_pkt->int_desc.processor_array[0] =
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hv_tmp_cpu_nr_to_vp_nr(cpu);
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int_pkt->int_desc.processor_count = 1;
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return sizeof(*int_pkt);
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}
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/**
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* hv_compose_msi_msg() - Supplies a valid MSI address/data
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* @data: Everything about this MSI
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@ -918,15 +1087,17 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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struct hv_pci_dev *hpdev;
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struct pci_bus *pbus;
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struct pci_dev *pdev;
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struct pci_create_interrupt *int_pkt;
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struct compose_comp_ctxt comp;
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struct tran_int_desc *int_desc;
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struct cpumask *affinity;
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struct {
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struct pci_packet pkt;
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u8 buffer[sizeof(struct pci_create_interrupt)];
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} ctxt;
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int cpu;
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struct pci_packet pci_pkt;
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union {
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struct pci_create_interrupt v1;
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struct pci_create_interrupt2 v2;
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} int_pkts;
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} __packed ctxt;
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|
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u32 size;
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int ret;
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pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
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@ -949,36 +1120,44 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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memset(&ctxt, 0, sizeof(ctxt));
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init_completion(&comp.comp_pkt.host_event);
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ctxt.pkt.completion_func = hv_pci_compose_compl;
|
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ctxt.pkt.compl_ctxt = ∁
|
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int_pkt = (struct pci_create_interrupt *)&ctxt.pkt.message;
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int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
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int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
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int_pkt->int_desc.vector = cfg->vector;
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int_pkt->int_desc.vector_count = 1;
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int_pkt->int_desc.delivery_mode =
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(apic->irq_delivery_mode == dest_LowestPrio) ? 1 : 0;
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ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
|
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ctxt.pci_pkt.compl_ctxt = ∁
|
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|
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/*
|
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* This bit doesn't have to work on machines with more than 64
|
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* processors because Hyper-V only supports 64 in a guest.
|
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*/
|
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affinity = irq_data_get_affinity_mask(data);
|
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if (cpumask_weight(affinity) >= 32) {
|
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int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
|
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} else {
|
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for_each_cpu_and(cpu, affinity, cpu_online_mask) {
|
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int_pkt->int_desc.cpu_mask |=
|
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(1ULL << hv_tmp_cpu_nr_to_vp_nr(cpu));
|
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}
|
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switch (pci_protocol_version) {
|
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case PCI_PROTOCOL_VERSION_1_1:
|
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size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
|
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irq_data_get_affinity_mask(data),
|
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hpdev->desc.win_slot.slot,
|
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cfg->vector);
|
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break;
|
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|
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case PCI_PROTOCOL_VERSION_1_2:
|
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size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
|
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irq_data_get_affinity_mask(data),
|
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hpdev->desc.win_slot.slot,
|
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cfg->vector);
|
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break;
|
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|
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default:
|
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/* As we only negotiate protocol versions known to this driver,
|
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* this path should never hit. However, this is it not a hot
|
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* path so we print a message to aid future updates.
|
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*/
|
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dev_err(&hbus->hdev->device,
|
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"Unexpected vPCI protocol, update driver.");
|
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goto free_int_desc;
|
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}
|
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|
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ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt,
|
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sizeof(*int_pkt), (unsigned long)&ctxt.pkt,
|
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ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
|
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size, (unsigned long)&ctxt.pci_pkt,
|
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VM_PKT_DATA_INBAND,
|
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VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
|
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if (ret)
|
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if (ret) {
|
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dev_err(&hbus->hdev->device,
|
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"Sending request for interrupt failed: 0x%x",
|
||||
comp.comp_pkt.completion_status);
|
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goto free_int_desc;
|
||||
}
|
||||
|
||||
wait_for_completion(&comp.comp_pkt.host_event);
|
||||
|
||||
|
|
@ -2177,13 +2356,18 @@ static int hv_send_resources_allocated(struct hv_device *hdev)
|
|||
{
|
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struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
|
||||
struct pci_resources_assigned *res_assigned;
|
||||
struct pci_resources_assigned2 *res_assigned2;
|
||||
struct hv_pci_compl comp_pkt;
|
||||
struct hv_pci_dev *hpdev;
|
||||
struct pci_packet *pkt;
|
||||
size_t size_res;
|
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u32 wslot;
|
||||
int ret;
|
||||
|
||||
pkt = kmalloc(sizeof(*pkt) + sizeof(*res_assigned), GFP_KERNEL);
|
||||
size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2)
|
||||
? sizeof(*res_assigned) : sizeof(*res_assigned2);
|
||||
|
||||
pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
|
||||
if (!pkt)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
@ -2194,22 +2378,30 @@ static int hv_send_resources_allocated(struct hv_device *hdev)
|
|||
if (!hpdev)
|
||||
continue;
|
||||
|
||||
memset(pkt, 0, sizeof(*pkt) + sizeof(*res_assigned));
|
||||
memset(pkt, 0, sizeof(*pkt) + size_res);
|
||||
init_completion(&comp_pkt.host_event);
|
||||
pkt->completion_func = hv_pci_generic_compl;
|
||||
pkt->compl_ctxt = &comp_pkt;
|
||||
res_assigned = (struct pci_resources_assigned *)&pkt->message;
|
||||
res_assigned->message_type.type = PCI_RESOURCES_ASSIGNED;
|
||||
res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
|
||||
|
||||
if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) {
|
||||
res_assigned =
|
||||
(struct pci_resources_assigned *)&pkt->message;
|
||||
res_assigned->message_type.type =
|
||||
PCI_RESOURCES_ASSIGNED;
|
||||
res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
|
||||
} else {
|
||||
res_assigned2 =
|
||||
(struct pci_resources_assigned2 *)&pkt->message;
|
||||
res_assigned2->message_type.type =
|
||||
PCI_RESOURCES_ASSIGNED2;
|
||||
res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
|
||||
}
|
||||
put_pcichild(hpdev, hv_pcidev_ref_by_slot);
|
||||
|
||||
ret = vmbus_sendpacket(
|
||||
hdev->channel, &pkt->message,
|
||||
sizeof(*res_assigned),
|
||||
(unsigned long)pkt,
|
||||
VM_PKT_DATA_INBAND,
|
||||
VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
|
||||
ret = vmbus_sendpacket(hdev->channel, &pkt->message,
|
||||
size_res, (unsigned long)pkt,
|
||||
VM_PKT_DATA_INBAND,
|
||||
VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
|
||||
if (ret)
|
||||
break;
|
||||
|
||||
|
|
|
|||
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Ссылка в новой задаче