crypto: qat - relocate PFVF VF related logic
Move device specific PFVF logic related to the VF to the newly created adf_gen2_pfvf.c. This refactory is done to isolate the GEN2 PFVF code into its own file in preparation for the introduction of support for PFVF for GEN4 devices. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Коммит
7e00fb3f16
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@ -136,7 +136,7 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data)
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hw_data->enable_ints = adf_enable_ints;
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hw_data->reset_device = adf_reset_flr;
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hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
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hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset;
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hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset;
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hw_data->get_vf2pf_sources = adf_gen2_get_vf2pf_sources;
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hw_data->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
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hw_data->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
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@ -4,6 +4,7 @@
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#include <adf_pf2vf_msg.h>
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#include <adf_common_drv.h>
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#include <adf_gen2_hw_data.h>
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#include <adf_gen2_pfvf.h>
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#include "adf_c3xxxvf_hw_data.h"
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static struct adf_hw_device_class c3xxxiov_class = {
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@ -47,11 +48,6 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
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return DEV_SKU_VF;
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}
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static u32 get_pf2vf_offset(u32 i)
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{
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return ADF_C3XXXIOV_PF2VF_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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@ -86,7 +82,7 @@ void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data)
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hw_data->get_num_aes = get_num_aes;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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@ -12,7 +12,6 @@
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#define ADF_C3XXXIOV_TX_RINGS_MASK 0xFF
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#define ADF_C3XXXIOV_ETR_BAR 0
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#define ADF_C3XXXIOV_ETR_MAX_BANKS 1
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#define ADF_C3XXXIOV_PF2VF_OFFSET 0x200
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void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
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@ -138,7 +138,7 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data)
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hw_data->enable_ints = adf_enable_ints;
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hw_data->reset_device = adf_reset_flr;
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hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
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hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset;
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hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset;
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hw_data->get_vf2pf_sources = adf_gen2_get_vf2pf_sources;
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hw_data->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
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hw_data->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
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@ -4,6 +4,7 @@
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#include <adf_pf2vf_msg.h>
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#include <adf_common_drv.h>
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#include <adf_gen2_hw_data.h>
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#include <adf_gen2_pfvf.h>
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#include "adf_c62xvf_hw_data.h"
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static struct adf_hw_device_class c62xiov_class = {
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@ -47,11 +48,6 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
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return DEV_SKU_VF;
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}
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static u32 get_pf2vf_offset(u32 i)
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{
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return ADF_C62XIOV_PF2VF_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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@ -86,7 +82,7 @@ void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
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hw_data->get_num_aes = get_num_aes;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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@ -12,7 +12,6 @@
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#define ADF_C62XIOV_TX_RINGS_MASK 0xFF
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#define ADF_C62XIOV_ETR_BAR 0
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#define ADF_C62XIOV_ETR_MAX_BANKS 1
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#define ADF_C62XIOV_PF2VF_OFFSET 0x200
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void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
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@ -8,13 +8,20 @@
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#define ADF_GEN2_ERR_REG_VF2PF(vf_src) (((vf_src) & 0x01FFFE00) >> 9)
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#define ADF_GEN2_ERR_MSK_VF2PF(vf_mask) (((vf_mask) & 0xFFFF) << 9)
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#define ADF_GEN2_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
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#define ADF_GEN2_PF_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
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#define ADF_GEN2_VF_PF2VF_OFFSET 0x200
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u32 adf_gen2_get_pf2vf_offset(u32 i)
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u32 adf_gen2_pf_get_pf2vf_offset(u32 i)
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{
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return ADF_GEN2_PF2VF_OFFSET(i);
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return ADF_GEN2_PF_PF2VF_OFFSET(i);
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}
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EXPORT_SYMBOL_GPL(adf_gen2_get_pf2vf_offset);
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EXPORT_SYMBOL_GPL(adf_gen2_pf_get_pf2vf_offset);
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u32 adf_gen2_vf_get_pf2vf_offset(u32 i)
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{
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return ADF_GEN2_VF_PF2VF_OFFSET;
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}
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EXPORT_SYMBOL_GPL(adf_gen2_vf_get_pf2vf_offset);
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u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_addr)
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{
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@ -11,7 +11,8 @@
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#define ADF_GEN2_ERRMSK3 (0x3A000 + 0x1C)
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#define ADF_GEN2_ERRMSK5 (0x3A000 + 0xDC)
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u32 adf_gen2_get_pf2vf_offset(u32 i);
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u32 adf_gen2_pf_get_pf2vf_offset(u32 i);
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u32 adf_gen2_vf_get_pf2vf_offset(u32 i);
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u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_bar);
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void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);
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void adf_gen2_disable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);
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@ -215,7 +215,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
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hw_data->get_arb_mapping = adf_get_arbiter_mapping;
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hw_data->enable_ints = adf_enable_ints;
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hw_data->reset_device = adf_reset_sbr;
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hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset;
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hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset;
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hw_data->get_vf2pf_sources = get_vf2pf_sources;
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hw_data->enable_vf2pf_interrupts = enable_vf2pf_interrupts;
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hw_data->disable_vf2pf_interrupts = disable_vf2pf_interrupts;
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@ -4,6 +4,7 @@
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#include <adf_pf2vf_msg.h>
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#include <adf_common_drv.h>
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#include <adf_gen2_hw_data.h>
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#include <adf_gen2_pfvf.h>
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#include "adf_dh895xccvf_hw_data.h"
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static struct adf_hw_device_class dh895xcciov_class = {
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@ -47,11 +48,6 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
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return DEV_SKU_VF;
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}
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static u32 get_pf2vf_offset(u32 i)
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{
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return ADF_DH895XCCIOV_PF2VF_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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@ -86,7 +82,7 @@ void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
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hw_data->get_num_aes = get_num_aes;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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@ -12,7 +12,6 @@
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#define ADF_DH895XCCIOV_TX_RINGS_MASK 0xFF
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#define ADF_DH895XCCIOV_ETR_BAR 0
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#define ADF_DH895XCCIOV_ETR_MAX_BANKS 1
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#define ADF_DH895XCCIOV_PF2VF_OFFSET 0x200
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void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);
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