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drm/i915: Protect the argument expansion in LRI and SRM macros 

It seems like it wouldn't be too unlikely to be wanting to use a an
expression in the macro argument and things could go very wrong.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2014-04-07 20:24:32 +01:00 коммит произвёл Daniel Vetter
Родитель 13732ba749
Коммит 7ec55f46da
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4
drivers/gpu/drm/i915/i915_reg.h
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@ -265,8 +265,8 @@
* - One can actually load arbitrary many arbitrary registers: Simply issue x * - One can actually load arbitrary many arbitrary registers: Simply issue x
* address/value pairs. Don't overdue it, though, x <= 2^4 must hold! * address/value pairs. Don't overdue it, though, x <= 2^4 must hold!
*/ */
#define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*x-1) #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1)
#define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*x-1) #define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*(x)-1)
#define MI_SRM_LRM_GLOBAL_GTT (1<<22) #define MI_SRM_LRM_GLOBAL_GTT (1<<22)
#define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */ #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */
#define MI_FLUSH_DW_STORE_INDEX (1<<21) #define MI_FLUSH_DW_STORE_INDEX (1<<21)