MIPS: Remove redundant IPTI==IPPCI logic
The situation where the timer interrupt is on the same line as the performance counter interrupt is handled in per_cpu_trap_init() by setting cp0_perfcount_irq to -1, so there is no need to duplicate the logic conditional upon cp0_perfcount_irq >= 0 in perf (init_hw_perf_events()) and oprofile (mipsxx_init()). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9125/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1615,8 +1615,7 @@ init_hw_perf_events(void)
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if (get_c0_perfcount_int)
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if (get_c0_perfcount_int)
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irq = get_c0_perfcount_int();
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irq = get_c0_perfcount_int();
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else if ((cp0_perfcount_irq >= 0) &&
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else if (cp0_perfcount_irq >= 0)
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(cp0_compare_irq != cp0_perfcount_irq))
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irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
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irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
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else
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else
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irq = -1;
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irq = -1;
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@ -435,8 +435,7 @@ static int __init mipsxx_init(void)
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if (get_c0_perfcount_int)
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if (get_c0_perfcount_int)
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perfcount_irq = get_c0_perfcount_int();
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perfcount_irq = get_c0_perfcount_int();
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else if ((cp0_perfcount_irq >= 0) &&
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else if (cp0_perfcount_irq >= 0)
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(cp0_compare_irq != cp0_perfcount_irq))
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perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
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perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
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else
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else
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perfcount_irq = -1;
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perfcount_irq = -1;
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