ARM/arm64: SoC platform updates for v4.14
This branch contains platform updates for 32- and 64-bit ARM, including defconfig updates to enable new options, drivers and platforms. There are also a few fixes and cleanups for some existing vendors. Some of the things worth highlighting here are: - Enabling new crypt drivers on arm64 defconfig - QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig - Debug support enabled for Renesas r8a7743 - Various config updates for Renesas platforms (sound, USB, other drivers) - Platform support (including SMP) for TI dra762 - OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale DMA code -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZtdXjAAoJEIwa5zzehBx3ExIQAJQ6anSZlkGysXqptA4c1HuL vgGq/U5xZ1Wa4Z/YX7//wuCMwRClc1j/zSJ5PP+wP0YsaviN7iF/8H1P/HQtCiTT DcEQPSI770829wzW4oMNW0PyU/ZnWMtuiMB+FAjdPVjbS8bT4PIK72D8PYKrT7f8 8bU51+QezjSLamQaA8S2RyX+kYI/4znTa/9Aco4AlCtioV8h9gQanFYd2EI/EMhU 1uvR3xUFf/YK49+M5J6m3DvtFffllHU9TKV/EAQD1Bhl1s5VPfem+a8JbVh1m7M+ NzQOOoPJ9jYOGfjlaQQVmZ/1E4iKac1oK4x44Djk/i+RFjl+AT/2co3RcaEq9Npw 5HNsK8ujnjzWB3xHu5wK5CbrjLNYco9hOpJaGkSeClo4ElDJVSKxyqWkZuhhnSA8 bXXV5VraMX67tjG7Ou8+NtdbMkGdOUqnNbuBlCxkxpWxhtaUQG1YHHQDofUXNguy rtVhKRZRSkNYrp4lDCKCXVFFO077FGzP2Boq6JVzLv+U1l6JlZkkr3EWKYMY45HC o2rVcAB4lMR/k6tqE5MAmQC53jCNlFZt2xtf1WRVKf+0TfBVIGX3MxvFxl4E9wA+ 9pdJ9ujZWsPjTcZcktA6AsaK7uevRxcB2YZYv4pXVjR1RcZ/SfiEf4UW+md3j4QB igKej5WsRiCPwnkMFKs0 =g8cF -----END PGP SIGNATURE----- Merge tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM/arm64 SoC platform updates from Olof Johansson: "This branch contains platform updates for 32- and 64-bit ARM, including defconfig updates to enable new options, drivers and platforms. There are also a few fixes and cleanups for some existing vendors. Some of the things worth highlighting here are: - Enabling new crypt drivers on arm64 defconfig - QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig - Debug support enabled for Renesas r8a7743 - Various config updates for Renesas platforms (sound, USB, other drivers) - Platform support (including SMP) for TI dra762 - OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale DMA code" * tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits) ARM: multi_v7_defconfig: make eSDHC driver built-in arm64: defconfig: enable rockchip graphics MAINTAINERS: Update Cavium ThunderX2 entry ARM: config: aspeed: Add I2C, VUART, LPC Snoop ARM: configs: aspeed: Update Aspeed G4 with VMSPLIT_2G ARM: s3c24xx: Fix NAND ECC mode for mini2440 board ARM: davinci_all_defconfig: enable tinydrm and ST7586 arm64: defconfig: Enable QCOM IPQ8074 clock and pinctrl ARM: defconfig: tegra: Enable ChipIdea UDC driver ARM: configs: Add Tegra I2S interfaces to multi_v7_defconfig ARM: tegra: Add Tegra I2S interfaces to defconfig ARM: tegra: Update default configuration for v4.13-rc1 MAINTAINERS: update ARM/ZTE entry soc: versatile: remove unnecessary static in realview_soc_probe() ARM: Convert to using %pOF instead of full_name ARM: hisi: Fix typo in comment ARM: multi_v7_defconfig: add CONFIG_BRCMSTB_THERMAL arm64: defconfig: add CONFIG_BRCMSTB_THERMAL arm64: defconfig: add recently added crypto drivers as modules arm64: defconfig: enable CONFIG_UNIPHIER_WATCHDOG ...
This commit is contained in:
Коммит
7f1b9be13a
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@ -80,6 +80,9 @@ SoCs:
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|||
- OMAP5432
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compatible = "ti,omap5432", "ti,omap5"
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- DRA762
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compatible = "ti,dra762", "ti,dra7"
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- DRA742
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compatible = "ti,dra742", "ti,dra74", "ti,dra7"
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26
MAINTAINERS
26
MAINTAINERS
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@ -2101,17 +2101,38 @@ F: arch/arm/mach-pxa/include/mach/z2.h
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ARM/ZTE ARCHITECTURE
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M: Jun Nie <jun.nie@linaro.org>
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M: Baoyou Xie <baoyou.xie@linaro.org>
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M: Shawn Guo <shawnguo@kernel.org>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/boot/dts/zx2967*
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F: arch/arm/mach-zx/
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F: arch/arm64/boot/dts/zte/
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F: drivers/clk/zte/
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F: drivers/dma/zx_dma.c
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F: drivers/gpio/gpio-zx.c
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F: drivers/i2c/busses/i2c-zx2967.c
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F: drivers/mmc/host/dw_mmc-zx.*
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F: drivers/pinctrl/zte/
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F: drivers/reset/reset-zx2967.c
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F: drivers/soc/zte/
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F: drivers/thermal/zx2967_thermal.c
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F: drivers/watchdog/zx2967_wdt.c
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F: Documentation/devicetree/bindings/arm/zte.txt
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F: Documentation/devicetree/bindings/clock/zx296702-clk.txt
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F: Documentation/devicetree/bindings/clock/zx2967*.txt
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F: Documentation/devicetree/bindings/dma/zxdma.txt
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F: Documentation/devicetree/bindings/gpio/zx296702-gpio.txt
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F: Documentation/devicetree/bindings/i2c/i2c-zx2967.txt
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F: Documentation/devicetree/bindings/mmc/zx-dw-mshc.txt
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F: Documentation/devicetree/bindings/pinctrl/pinctrl-zx.txt
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F: Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt
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F: Documentation/devicetree/bindings/soc/zte/
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F: include/dt-bindings/soc/zx*.h
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F: Documentation/devicetree/bindings/sound/zte,*.txt
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F: Documentation/devicetree/bindings/thermal/zx2967-thermal.txt
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F: Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt
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F: include/dt-bindings/clock/zx2967*.h
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F: include/dt-bindings/soc/zte,*.h
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F: sound/soc/codecs/zx_aud96p22.c
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F: sound/soc/zte/
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ARM/ZYNQ ARCHITECTURE
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M: Michal Simek <michal.simek@xilinx.com>
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@ -3175,6 +3196,7 @@ S: Supported
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F: drivers/crypto/cavium/cpt/
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CAVIUM THUNDERX2 ARM64 SOC
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M: Robert Richter <rrichter@cavium.com>
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M: Jayachandran C <jnair@caviumnetworks.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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@ -646,7 +646,7 @@ choice
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config DEBUG_OMAP2UART1
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bool "OMAP2/3/4 UART1 (omap2/3 sdp boards and some omap3 boards)"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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help
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This covers at least h4, 2430sdp, 3430sdp, 3630sdp,
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omap3 torpedo and 3530 lv som.
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@ -654,17 +654,17 @@ choice
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config DEBUG_OMAP2UART2
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bool "Kernel low-level debugging messages via OMAP2/3/4 UART2"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_OMAP2UART3
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bool "Kernel low-level debugging messages via OMAP2 UART3 (n8x0)"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_OMAP3UART3
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bool "Kernel low-level debugging messages via OMAP3 UART3 (most omap3 boards)"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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help
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This covers at least cm_t3x, beagle, crane, devkit8000,
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igep00x0, ldp, n900, n9(50), pandora, overo, touchbook,
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@ -673,17 +673,17 @@ choice
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config DEBUG_OMAP4UART3
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bool "Kernel low-level debugging messages via OMAP4/5 UART3 (omap4 blaze, panda, omap5 sevm)"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_OMAP3UART4
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bool "Kernel low-level debugging messages via OMAP36XX UART4"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_OMAP4UART4
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bool "Kernel low-level debugging messages via OMAP4/5 UART4"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_OMAP7XXUART1
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bool "Kernel low-level debugging via OMAP730 UART1"
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@ -712,22 +712,22 @@ choice
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config DEBUG_TI81XXUART1
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bool "Kernel low-level debugging messages via TI81XX UART1 (ti8148evm)"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_TI81XXUART2
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bool "Kernel low-level debugging messages via TI81XX UART2"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_TI81XXUART3
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bool "Kernel low-level debugging messages via TI81XX UART3 (ti8168evm)"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_AM33XXUART1
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bool "Kernel low-level debugging messages via AM33XX UART1"
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depends on ARCH_OMAP2PLUS
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select DEBUG_OMAP2PLUS_UART
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select DEBUG_UART_8250
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config DEBUG_ZOOM_UART
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bool "Kernel low-level debugging messages via Zoom2/3 UART"
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@ -896,12 +896,13 @@ choice
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via SCIF2 on Renesas R-Car H1 (R8A7779).
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config DEBUG_RCAR_GEN2_SCIF0
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bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7792/R8A7793"
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depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7792 || ARCH_R8A7793
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bool "Kernel low-level debugging messages via SCIF0 on R-Car Gen2 and RZ/G1"
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depends on ARCH_R8A7743 || ARCH_R8A7790 || ARCH_R8A7791 || \
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ARCH_R8A7792 || ARCH_R8A7793
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help
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Say Y here if you want kernel low-level debugging support
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via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), V2H
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(R8A7792), or M2-N (R8A7793).
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via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790),
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M2-W (R8A7791), V2H (R8A7792), or M2-N (R8A7793).
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config DEBUG_RCAR_GEN2_SCIF2
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bool "Kernel low-level debugging messages via SCIF2 on R8A7794"
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@ -1523,6 +1524,17 @@ config DEBUG_UART_PHYS
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default 0x40090000 if DEBUG_LPC32XX
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default 0x40100000 if DEBUG_PXA_UART1
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default 0x42000000 if DEBUG_GEMINI
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default 0x44e09000 if DEBUG_AM33XXUART1
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default 0x48020000 if DEBUG_OMAP4UART3 || DEBUG_TI81XXUART1
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default 0x48022000 if DEBUG_TI81XXUART2
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default 0x48024000 if DEBUG_TI81XXUART3
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default 0x4806a000 if DEBUG_OMAP2UART1 || DEBUG_OMAP3UART1 || \
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DEBUG_OMAP4UART1 || DEBUG_OMAP5UART1
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default 0x4806c000 if DEBUG_OMAP2UART2 || DEBUG_OMAP3UART2 || \
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DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2
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default 0x4806e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4
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default 0x49020000 if DEBUG_OMAP3UART3
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default 0x49042000 if DEBUG_OMAP3UART4
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default 0x50000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
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DEBUG_S3C2410_UART0)
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default 0x50004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
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@ -1641,10 +1653,21 @@ config DEBUG_UART_VIRT
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default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
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default 0xf8ffee00 if DEBUG_AT91_SAM9263_DBGU
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default 0xf8fff200 if DEBUG_AT91_RM9200_DBGU
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default 0xf9e09000 if DEBUG_AM33XXUART1
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default 0xfa020000 if DEBUG_OMAP4UART3 || DEBUG_TI81XXUART1
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default 0xfa022000 if DEBUG_TI81XXUART2
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default 0xfa024000 if DEBUG_TI81XXUART3
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default 0xfa06a000 if DEBUG_OMAP2UART1 || DEBUG_OMAP3UART1 || \
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DEBUG_OMAP4UART1 || DEBUG_OMAP5UART1
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default 0xfa06c000 if DEBUG_OMAP2UART2 || DEBUG_OMAP3UART2 || \
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DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2
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default 0xfa06e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4
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default 0xfa71e000 if DEBUG_QCOM_UARTDM
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default 0xfb002000 if DEBUG_CNS3XXX
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default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
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default 0xfb00c000 if DEBUG_AT91_SAMA5D4_USART3
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default 0xfb020000 if DEBUG_OMAP3UART3
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default 0xfb042000 if DEBUG_OMAP3UART4
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default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT
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default 0xfc705000 if DEBUG_ZTE_ZX
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default 0xfcfe8600 if DEBUG_BCM63XX_UART
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|
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@ -191,6 +191,7 @@
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,min-output-impedance;
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ti,dp83867-rxctrl-strap-quirk;
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};
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dp83867_1: ethernet-phy@3 {
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|
@ -199,6 +200,7 @@
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
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ti,min-output-impedance;
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ti,dp83867-rxctrl-strap-quirk;
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};
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};
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|
|
|
@ -70,6 +70,7 @@
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ti,min-output-impedance;
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interrupt-parent = <&gpio6>;
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interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
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ti,dp83867-rxctrl-strap-quirk;
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};
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dp83867_1: ethernet-phy@3 {
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|
@ -80,5 +81,6 @@
|
|||
ti,min-output-impedance;
|
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interrupt-parent = <&gpio6>;
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interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
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ti,dp83867-rxctrl-strap-quirk;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -24,6 +24,7 @@ CONFIG_MODULE_UNLOAD=y
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|||
# CONFIG_ARCH_MULTI_V7 is not set
|
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CONFIG_ARCH_ASPEED=y
|
||||
CONFIG_MACH_ASPEED_G4=y
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||||
CONFIG_VMSPLIT_2G=y
|
||||
CONFIG_AEABI=y
|
||||
# CONFIG_CPU_SW_DOMAIN_PAN is not set
|
||||
# CONFIG_COMPACTION is not set
|
||||
|
@ -64,6 +65,7 @@ CONFIG_MTD_UBI_FASTMAP=y
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|||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_ASPEED_LPC_CTRL=y
|
||||
CONFIG_ASPEED_LPC_SNOOP=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NETCONSOLE=y
|
||||
|
@ -104,6 +106,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
|
|||
CONFIG_SERIAL_8250_NR_UARTS=6
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_ASPEED_VUART=y
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_ASPEED_BT_IPMI_BMC=y
|
||||
|
@ -114,6 +117,7 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PCA9541=y
|
||||
CONFIG_I2C_MUX_PCA954x=y
|
||||
CONFIG_I2C_ASPEED=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_ASPEED=y
|
||||
|
@ -166,7 +170,6 @@ CONFIG_PRINTK_TIME=y
|
|||
CONFIG_DYNAMIC_DEBUG=y
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_LOCKUP_DETECTOR=y
|
||||
CONFIG_WQ_WATCHDOG=y
|
||||
CONFIG_PANIC_TIMEOUT=-1
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
|
|
|
@ -67,6 +67,7 @@ CONFIG_MTD_UBI_FASTMAP=y
|
|||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_ASPEED_LPC_CTRL=y
|
||||
CONFIG_ASPEED_LPC_SNOOP=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NETCONSOLE=y
|
||||
|
@ -107,6 +108,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
|
|||
CONFIG_SERIAL_8250_NR_UARTS=6
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_ASPEED_VUART=y
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_ASPEED_BT_IPMI_BMC=y
|
||||
|
@ -117,6 +119,7 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_PCA9541=y
|
||||
CONFIG_I2C_MUX_PCA954x=y
|
||||
CONFIG_I2C_ASPEED=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_ASPEED=y
|
||||
|
@ -169,7 +172,6 @@ CONFIG_PRINTK_TIME=y
|
|||
CONFIG_DYNAMIC_DEBUG=y
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_LOCKUP_DETECTOR=y
|
||||
CONFIG_WQ_WATCHDOG=y
|
||||
CONFIG_PANIC_TIMEOUT=-1
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
|
|
|
@ -55,6 +55,7 @@ CONFIG_DEVTMPFS=y
|
|||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=32
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
|
@ -62,9 +63,15 @@ CONFIG_SCSI_SCAN_ASYNC=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
CONFIG_BRCMFMAC=m
|
||||
CONFIG_ZD1211RW=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_TTY_PRINTK=y
|
||||
|
|
|
@ -143,6 +143,8 @@ CONFIG_VIDEO_ADV7343=m
|
|||
CONFIG_DRM=m
|
||||
CONFIG_DRM_TILCDC=m
|
||||
CONFIG_DRM_DUMB_VGA_DAC=m
|
||||
CONFIG_DRM_TINYDRM=m
|
||||
CONFIG_TINYDRM_ST7586=m
|
||||
CONFIG_FB=y
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
CONFIG_FB_DA8XX=y
|
||||
|
|
|
@ -3,7 +3,6 @@ CONFIG_NO_HZ=y
|
|||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
|
@ -48,7 +47,43 @@ CONFIG_IP_PNP=y
|
|||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_IP_PNP_RARP=y
|
||||
CONFIG_BT=m
|
||||
CONFIG_BT_RFCOMM=m
|
||||
CONFIG_BT_RFCOMM_TTY=y
|
||||
CONFIG_BT_BNEP=m
|
||||
CONFIG_BT_BNEP_MC_FILTER=y
|
||||
CONFIG_BT_BNEP_PROTO_FILTER=y
|
||||
CONFIG_BT_HIDP=m
|
||||
CONFIG_BT_LEDS=y
|
||||
CONFIG_BT_HCIBTUSB=m
|
||||
CONFIG_BT_HCIBTSDIO=m
|
||||
CONFIG_BT_HCIUART=m
|
||||
CONFIG_BT_HCIUART_BCSP=y
|
||||
CONFIG_BT_HCIUART_ATH3K=y
|
||||
CONFIG_BT_HCIUART_3WIRE=y
|
||||
CONFIG_BT_HCIUART_INTEL=y
|
||||
CONFIG_BT_HCIUART_BCM=y
|
||||
CONFIG_BT_HCIUART_QCA=y
|
||||
CONFIG_BT_HCIUART_AG6XX=y
|
||||
CONFIG_BT_HCIUART_MRVL=y
|
||||
CONFIG_BT_HCIBCM203X=m
|
||||
CONFIG_BT_HCIBPA10X=m
|
||||
CONFIG_BT_HCIBFUSB=m
|
||||
CONFIG_BT_HCIVHCI=m
|
||||
CONFIG_BT_MRVL=m
|
||||
CONFIG_BT_MRVL_SDIO=m
|
||||
CONFIG_BT_ATH3K=m
|
||||
CONFIG_CFG80211=y
|
||||
CONFIG_MAC80211=y
|
||||
CONFIG_MAC80211_LEDS=y
|
||||
CONFIG_NFC=y
|
||||
CONFIG_NFC_DIGITAL=m
|
||||
CONFIG_NFC_NCI=y
|
||||
CONFIG_NFC_NCI_SPI=m
|
||||
CONFIG_NFC_NCI_UART=m
|
||||
CONFIG_NFC_HCI=m
|
||||
CONFIG_NFC_SHDLC=y
|
||||
CONFIG_NFC_S3FWRN5_I2C=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_DMA_CMA=y
|
||||
|
@ -65,7 +100,9 @@ CONFIG_BLK_DEV_DM=y
|
|||
CONFIG_DM_CRYPT=m
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_USB_RTL8150=m
|
||||
CONFIG_USB_RTL8152=y
|
||||
CONFIG_USB_LAN78XX=m
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_SMSC75XX=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
|
@ -189,7 +226,25 @@ CONFIG_USB_EHCI_HCD=y
|
|||
CONFIG_USB_EHCI_EXYNOS=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_EXYNOS=y
|
||||
CONFIG_USB_ACM=m
|
||||
CONFIG_USB_PRINTER=m
|
||||
CONFIG_USB_WDM=m
|
||||
CONFIG_USB_TMC=m
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_STORAGE_REALTEK=m
|
||||
CONFIG_USB_STORAGE_DATAFAB=m
|
||||
CONFIG_USB_STORAGE_FREECOM=m
|
||||
CONFIG_USB_STORAGE_ISD200=m
|
||||
CONFIG_USB_STORAGE_USBAT=m
|
||||
CONFIG_USB_STORAGE_SDDR09=m
|
||||
CONFIG_USB_STORAGE_SDDR55=m
|
||||
CONFIG_USB_STORAGE_JUMPSHOT=m
|
||||
CONFIG_USB_STORAGE_ALAUDA=m
|
||||
CONFIG_USB_STORAGE_ONETOUCH=m
|
||||
CONFIG_USB_STORAGE_KARMA=m
|
||||
CONFIG_USB_STORAGE_CYPRESS_ATACB=m
|
||||
CONFIG_USB_STORAGE_ENE_UB6250=m
|
||||
CONFIG_USB_UAS=m
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_HSIC_USB3503=y
|
||||
|
@ -209,7 +264,6 @@ CONFIG_LEDS_GPIO=y
|
|||
CONFIG_LEDS_PWM=y
|
||||
CONFIG_LEDS_MAX77693=y
|
||||
CONFIG_LEDS_MAX8997=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_MAX8997=y
|
||||
|
@ -253,18 +307,30 @@ CONFIG_ROOT_NFS=y
|
|||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ASCII=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DYNAMIC_DEBUG=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_LOCKUP_DETECTOR=y
|
||||
CONFIG_DEBUG_RT_MUTEXES=y
|
||||
CONFIG_DEBUG_SPINLOCK=y
|
||||
CONFIG_DEBUG_MUTEXES=y
|
||||
CONFIG_SOFTLOCKUP_DETECTOR=y
|
||||
# CONFIG_DETECT_HUNG_TASK is not set
|
||||
CONFIG_PROVE_LOCKING=y
|
||||
CONFIG_DEBUG_ATOMIC_SLEEP=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_CRYPTO_RSA=m
|
||||
CONFIG_CRYPTO_DH=m
|
||||
CONFIG_CRYPTO_USER=m
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_XTS=m
|
||||
CONFIG_CRYPTO_MD5=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_SALSA20=m
|
||||
CONFIG_CRYPTO_LZO=m
|
||||
CONFIG_CRYPTO_LZ4=m
|
||||
CONFIG_CRYPTO_USER_API_HASH=m
|
||||
CONFIG_CRYPTO_USER_API_SKCIPHER=m
|
||||
CONFIG_CRYPTO_USER_API_RNG=m
|
||||
|
@ -276,6 +342,7 @@ CONFIG_CRYPTO_SHA1_ARM_NEON=m
|
|||
CONFIG_CRYPTO_SHA256_ARM=m
|
||||
CONFIG_CRYPTO_SHA512_ARM=m
|
||||
CONFIG_CRYPTO_AES_ARM_BS=m
|
||||
CONFIG_CRYPTO_CHACHA20_NEON=m
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_7x14=y
|
||||
|
|
|
@ -27,7 +27,6 @@ CONFIG_ZBOOT_ROM_BSS=0x0
|
|||
CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEBUG=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=m
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=m
|
||||
|
|
|
@ -51,6 +51,7 @@ CONFIG_PREEMPT_VOLUNTARY=y
|
|||
CONFIG_AEABI=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_FORCE_MAX_ZONEORDER=14
|
||||
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
|
@ -186,6 +187,7 @@ CONFIG_SERIAL_FSL_LPUART=y
|
|||
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
|
||||
# CONFIG_I2C_COMPAT is not set
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_MUX_GPIO=y
|
||||
# CONFIG_I2C_HELPER_AUTO is not set
|
||||
CONFIG_I2C_ALGOPCF=m
|
||||
|
@ -193,12 +195,14 @@ CONFIG_I2C_ALGOPCA=m
|
|||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_I2C_IMX=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_GPIO=y
|
||||
CONFIG_SPI_IMX=y
|
||||
CONFIG_SPI_FSL_DSPI=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_MC9S08DZ60=y
|
||||
CONFIG_GPIO_PCA953X=y
|
||||
CONFIG_GPIO_STMPE=y
|
||||
CONFIG_GPIO_74X164=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_IMX=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
|
@ -227,14 +231,20 @@ CONFIG_REGULATOR_PFUZE100=y
|
|||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_MEDIA_CAMERA_SUPPORT=y
|
||||
CONFIG_RC_CORE=y
|
||||
CONFIG_MEDIA_CONTROLLER=y
|
||||
CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_GPIO_CIR=y
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=m
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
CONFIG_VIDEO_MUX=y
|
||||
CONFIG_SOC_CAMERA=y
|
||||
CONFIG_V4L_MEM2MEM_DRIVERS=y
|
||||
CONFIG_VIDEO_CODA=y
|
||||
CONFIG_VIDEO_CODA=m
|
||||
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
|
||||
CONFIG_VIDEO_ADV7180=m
|
||||
CONFIG_VIDEO_OV5640=m
|
||||
CONFIG_SOC_CAMERA_OV2640=y
|
||||
CONFIG_IMX_IPUV3_CORE=y
|
||||
CONFIG_DRM=y
|
||||
|
@ -344,6 +354,9 @@ CONFIG_FSL_EDMA=y
|
|||
CONFIG_IMX_SDMA=y
|
||||
CONFIG_MXS_DMA=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_STAGING_MEDIA=y
|
||||
CONFIG_VIDEO_IMX_MEDIA=y
|
||||
CONFIG_COMMON_CLK_PWM=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_IMX7D_ADC=y
|
||||
CONFIG_VF610_ADC=y
|
||||
|
|
|
@ -81,12 +81,8 @@ CONFIG_ATALK=m
|
|||
CONFIG_DEV_APPLETALK=m
|
||||
CONFIG_IPDDP=m
|
||||
CONFIG_IPDDP_ENCAP=y
|
||||
CONFIG_IPDDP_DECAP=y
|
||||
CONFIG_X25=m
|
||||
CONFIG_LAPB=m
|
||||
CONFIG_ECONET=m
|
||||
CONFIG_ECONET_AUNUDP=y
|
||||
CONFIG_ECONET_NATIVE=y
|
||||
CONFIG_WAN_ROUTER=m
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_NET_SCH_CBQ=m
|
||||
|
|
|
@ -112,6 +112,9 @@ CONFIG_IP_NF_ARP_MANGLE=y
|
|||
CONFIG_IP6_NF_IPTABLES=m
|
||||
CONFIG_IP_SCTP=y
|
||||
CONFIG_VLAN_8021Q=y
|
||||
CONFIG_CAN=m
|
||||
CONFIG_CAN_C_CAN=m
|
||||
CONFIG_CAN_C_CAN_PLATFORM=m
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
|
@ -156,6 +159,8 @@ CONFIG_POWER_RESET_KEYSTONE=y
|
|||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_DAVINCI_WATCHDOG=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_MON=y
|
||||
|
@ -164,6 +169,8 @@ CONFIG_USB_STORAGE=y
|
|||
CONFIG_USB_DWC3=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_KEYSTONE_USB_PHY=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
|
@ -174,12 +181,18 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=y
|
|||
CONFIG_LEDS_TRIGGER_GPIO=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_TI_EDMA=y
|
||||
CONFIG_MAILBOX=y
|
||||
CONFIG_TI_MESSAGE_MANAGER=y
|
||||
CONFIG_SOC_TI=y
|
||||
CONFIG_KEYSTONE_NAVIGATOR_QMSS=y
|
||||
CONFIG_KEYSTONE_NAVIGATOR_DMA=y
|
||||
CONFIG_TI_SCI_PM_DOMAINS=y
|
||||
CONFIG_MEMORY=y
|
||||
CONFIG_TI_AEMIF=y
|
||||
CONFIG_KEYSTONE_IRQ=y
|
||||
CONFIG_RESET_TI_SCI=m
|
||||
CONFIG_RESET_TI_SYSCON=m
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_FANOTIFY=y
|
||||
|
|
|
@ -104,13 +104,11 @@ CONFIG_ARCH_TEGRA_2x_SOC=y
|
|||
CONFIG_ARCH_TEGRA_3x_SOC=y
|
||||
CONFIG_ARCH_TEGRA_114_SOC=y
|
||||
CONFIG_ARCH_TEGRA_124_SOC=y
|
||||
CONFIG_TEGRA_EMC_SCALING_ENABLE=y
|
||||
CONFIG_ARCH_UNIPHIER=y
|
||||
CONFIG_ARCH_U8500=y
|
||||
CONFIG_MACH_HREFV60=y
|
||||
CONFIG_MACH_SNOWBALL=y
|
||||
CONFIG_ARCH_VEXPRESS=y
|
||||
CONFIG_ARCH_VEXPRESS_CA9X4=y
|
||||
CONFIG_ARCH_VEXPRESS_TC2_PM=y
|
||||
CONFIG_ARCH_WM8850=y
|
||||
CONFIG_ARCH_ZYNQ=y
|
||||
|
@ -331,6 +329,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y
|
|||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
|
||||
CONFIG_SERIAL_SH_SCI_CONSOLE=y
|
||||
CONFIG_SERIAL_SH_SCI_DMA=y
|
||||
CONFIG_SERIAL_MSM=y
|
||||
CONFIG_SERIAL_MSM_CONSOLE=y
|
||||
CONFIG_SERIAL_VT8500=y
|
||||
|
@ -456,6 +455,7 @@ CONFIG_SENSORS_NTC_THERMISTOR=m
|
|||
CONFIG_SENSORS_PWM_FAN=m
|
||||
CONFIG_SENSORS_INA2XX=m
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_BRCMSTB_THERMAL=m
|
||||
CONFIG_ROCKCHIP_THERMAL=y
|
||||
CONFIG_RCAR_THERMAL=y
|
||||
CONFIG_ARMADA_THERMAL=y
|
||||
|
@ -585,6 +585,7 @@ CONFIG_VIDEO_ADV7180=m
|
|||
CONFIG_VIDEO_ML86V7667=m
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_I2C_ADV7511=m
|
||||
CONFIG_DRM_I2C_ADV7511_AUDIO=y
|
||||
# CONFIG_DRM_I2C_CH7006 is not set
|
||||
# CONFIG_DRM_I2C_SIL164 is not set
|
||||
CONFIG_DRM_DUMB_VGA_DAC=m
|
||||
|
@ -604,7 +605,6 @@ CONFIG_ROCKCHIP_DW_MIPI_DSI=y
|
|||
CONFIG_ROCKCHIP_INNO_HDMI=y
|
||||
CONFIG_DRM_ATMEL_HLCDC=m
|
||||
CONFIG_DRM_RCAR_DU=m
|
||||
CONFIG_DRM_RCAR_HDMI=y
|
||||
CONFIG_DRM_RCAR_LVDS=y
|
||||
CONFIG_DRM_SUN4I=m
|
||||
CONFIG_DRM_TEGRA=y
|
||||
|
@ -651,9 +651,11 @@ CONFIG_SND_SOC_SMDK_WM8994_PCM=m
|
|||
CONFIG_SND_SOC_SNOW=m
|
||||
CONFIG_SND_SOC_SH4_FSI=m
|
||||
CONFIG_SND_SOC_RCAR=m
|
||||
CONFIG_SND_SOC_RSRC_CARD=m
|
||||
CONFIG_SND_SIMPLE_SCU_CARD=m
|
||||
CONFIG_SND_SUN4I_CODEC=m
|
||||
CONFIG_SND_SOC_TEGRA=m
|
||||
CONFIG_SND_SOC_TEGRA20_I2S=m
|
||||
CONFIG_SND_SOC_TEGRA30_I2S=m
|
||||
CONFIG_SND_SOC_TEGRA_RT5640=m
|
||||
CONFIG_SND_SOC_TEGRA_WM8753=m
|
||||
CONFIG_SND_SOC_TEGRA_WM8903=m
|
||||
|
@ -696,7 +698,6 @@ CONFIG_USB_CHIPIDEA_UDC=y
|
|||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_AB8500_USB=y
|
||||
CONFIG_KEYSTONE_USB_PHY=y
|
||||
CONFIG_OMAP_USB3=y
|
||||
CONFIG_USB_GPIO_VBUS=y
|
||||
CONFIG_USB_ISP1301=y
|
||||
CONFIG_USB_MSM_OTG=m
|
||||
|
@ -712,7 +713,7 @@ CONFIG_MMC_SDHCI=y
|
|||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_OF_ARASAN=y
|
||||
CONFIG_MMC_SDHCI_OF_AT91=y
|
||||
CONFIG_MMC_SDHCI_OF_ESDHC=m
|
||||
CONFIG_MMC_SDHCI_OF_ESDHC=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MMC_SDHCI_DOVE=y
|
||||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
|
@ -729,7 +730,6 @@ CONFIG_MMC_SDHCI_MSM=y
|
|||
CONFIG_MMC_MVSDIO=y
|
||||
CONFIG_MMC_SDHI=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_IDMAC=y
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
CONFIG_MMC_DW_EXYNOS=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
|
@ -826,7 +826,6 @@ CONFIG_BCMA_DRIVER_GPIO=y
|
|||
CONFIG_QCOM_GSBI=y
|
||||
CONFIG_QCOM_PM=y
|
||||
CONFIG_QCOM_SMEM=y
|
||||
CONFIG_QCOM_SMD=y
|
||||
CONFIG_QCOM_SMD_RPM=y
|
||||
CONFIG_QCOM_SMP2P=y
|
||||
CONFIG_QCOM_SMSM=y
|
||||
|
@ -838,7 +837,6 @@ CONFIG_CHROME_PLATFORMS=y
|
|||
CONFIG_STAGING_BOARD=y
|
||||
CONFIG_CROS_EC_CHARDEV=m
|
||||
CONFIG_COMMON_CLK_MAX77686=y
|
||||
CONFIG_COMMON_CLK_MAX77802=m
|
||||
CONFIG_COMMON_CLK_RK808=m
|
||||
CONFIG_COMMON_CLK_S2MPS11=m
|
||||
CONFIG_APQ_MMCC_8084=y
|
||||
|
@ -934,7 +932,6 @@ CONFIG_PRINTK_TIME=y
|
|||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_LOCKUP_DETECTOR=y
|
||||
CONFIG_CRYPTO_DEV_TEGRA_AES=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
CONFIG_KEYSTONE_IRQ=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
|
|
|
@ -170,6 +170,7 @@ CONFIG_TI_CPTS=y
|
|||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_DP83848_PHY=y
|
||||
CONFIG_DP83867_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_PPP=m
|
||||
|
@ -250,6 +251,7 @@ CONFIG_DEBUG_GPIO=y
|
|||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_PCA953X=m
|
||||
CONFIG_GPIO_PCF857X=y
|
||||
CONFIG_GPIO_LP87565=y
|
||||
CONFIG_GPIO_PALMAS=y
|
||||
CONFIG_GPIO_TWL4030=y
|
||||
CONFIG_W1=m
|
||||
|
@ -284,6 +286,7 @@ CONFIG_MFD_TI_AM335X_TSCADC=m
|
|||
CONFIG_MFD_PALMAS=y
|
||||
CONFIG_MFD_TPS65217=y
|
||||
CONFIG_MFD_TI_LP873X=y
|
||||
CONFIG_MFD_TI_LP87565=y
|
||||
CONFIG_MFD_TPS65218=y
|
||||
CONFIG_MFD_TPS65910=y
|
||||
CONFIG_TWL6040_CORE=y
|
||||
|
@ -292,6 +295,7 @@ CONFIG_REGULATOR_GPIO=y
|
|||
CONFIG_REGULATOR_LM363X=m
|
||||
CONFIG_REGULATOR_LP872X=y
|
||||
CONFIG_REGULATOR_LP873X=y
|
||||
CONFIG_REGULATOR_LP87565=y
|
||||
CONFIG_REGULATOR_PALMAS=y
|
||||
CONFIG_REGULATOR_PBIAS=y
|
||||
CONFIG_REGULATOR_TI_ABB=y
|
||||
|
|
|
@ -199,7 +199,6 @@ CONFIG_QCOM_WCNSS_PIL=y
|
|||
CONFIG_QCOM_GSBI=y
|
||||
CONFIG_QCOM_PM=y
|
||||
CONFIG_QCOM_SMEM=y
|
||||
CONFIG_QCOM_SMD=y
|
||||
CONFIG_QCOM_SMD_RPM=y
|
||||
CONFIG_QCOM_SMP2P=y
|
||||
CONFIG_QCOM_SMSM=y
|
||||
|
|
|
@ -27,6 +27,7 @@ CONFIG_ARCH_SH73A0=y
|
|||
CONFIG_PL310_ERRATA_588369=y
|
||||
CONFIG_ARM_ERRATA_754322=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_RCAR_GEN2=y
|
||||
CONFIG_PCIE_RCAR=y
|
||||
CONFIG_SMP=y
|
||||
|
@ -83,14 +84,14 @@ CONFIG_NETDEVICES=y
|
|||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
CONFIG_SH_ETH=y
|
||||
CONFIG_RAVB=y
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
CONFIG_SMSC911X=y
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
|
@ -105,6 +106,7 @@ CONFIG_SERIAL_8250_EM=y
|
|||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
|
||||
CONFIG_SERIAL_SH_SCI_CONSOLE=y
|
||||
CONFIG_SERIAL_SH_SCI_DMA=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_DEMUX_PINCTRL=y
|
||||
|
@ -121,9 +123,9 @@ CONFIG_SPI_SH_HSPI=y
|
|||
CONFIG_GPIO_EM=y
|
||||
CONFIG_GPIO_RCAR=y
|
||||
CONFIG_GPIO_PCF857X=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_RMOBILE=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
|
@ -153,10 +155,11 @@ CONFIG_VIDEO_ADV7180=y
|
|||
CONFIG_VIDEO_ADV7604=y
|
||||
CONFIG_VIDEO_ML86V7667=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_I2C_ADV7511=y
|
||||
CONFIG_DRM_RCAR_DU=y
|
||||
CONFIG_DRM_RCAR_HDMI=y
|
||||
CONFIG_DRM_RCAR_LVDS=y
|
||||
CONFIG_DRM_DUMB_VGA_DAC=y
|
||||
CONFIG_DRM_I2C_ADV7511=y
|
||||
CONFIG_DRM_I2C_ADV7511_AUDIO=y
|
||||
CONFIG_FB_SH_MOBILE_LCDC=y
|
||||
CONFIG_FB_SH_MOBILE_MERAM=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
|
@ -169,12 +172,12 @@ CONFIG_SND=y
|
|||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_SH4_FSI=y
|
||||
CONFIG_SND_SOC_RCAR=y
|
||||
CONFIG_SND_SOC_RSRC_CARD=y
|
||||
CONFIG_SND_SOC_AK4642=y
|
||||
CONFIG_SND_SOC_WM8978=y
|
||||
CONFIG_SND_SIMPLE_SCU_CARD=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_RCAR=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_R8A66597_HCD=y
|
||||
|
@ -190,6 +193,7 @@ CONFIG_LEDS_CLASS=y
|
|||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_RS5C372=y
|
||||
CONFIG_RTC_DRV_BQ32K=y
|
||||
CONFIG_RTC_DRV_S35390A=y
|
||||
CONFIG_RTC_DRV_RX8581=y
|
||||
CONFIG_RTC_DRV_DA9063=y
|
||||
|
|
|
@ -1,4 +1,3 @@
|
|||
CONFIG_FHANDLE=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_CGROUPS=y
|
||||
|
@ -56,7 +55,6 @@ CONFIG_STMMAC_ETH=y
|
|||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_SUN4I_LRADC=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
|
@ -71,7 +69,6 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=8
|
|||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MV64XXX=y
|
||||
CONFIG_I2C_SUN6I_P2WI=y
|
||||
|
@ -80,14 +77,14 @@ CONFIG_SPI_SUN4I=y
|
|||
CONFIG_SPI_SUN6I=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_CHARGER_AXP20X=y
|
||||
CONFIG_BATTERY_AXP20X=y
|
||||
CONFIG_AXP20X_POWER=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_SUNXI_WATCHDOG=y
|
||||
CONFIG_MFD_AC100=y
|
||||
CONFIG_MFD_AXP20X=y
|
||||
CONFIG_MFD_AXP20X_I2C=y
|
||||
CONFIG_MFD_AXP20X_RSB=y
|
||||
CONFIG_REGULATOR=y
|
||||
|
@ -99,12 +96,9 @@ CONFIG_RC_CORE=y
|
|||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_SUNXI=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_DUMB_VGA_DAC=y
|
||||
CONFIG_DRM_SUN4I=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_DRM_DUMB_VGA_DAC=y
|
||||
CONFIG_FB_SIMPLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SOC=y
|
||||
|
@ -130,12 +124,13 @@ CONFIG_RTC_CLASS=y
|
|||
# CONFIG_RTC_INTF_SYSFS is not set
|
||||
# CONFIG_RTC_INTF_PROC is not set
|
||||
CONFIG_RTC_DRV_AC100=y
|
||||
CONFIG_RTC_DRV_SUN6I=y
|
||||
CONFIG_RTC_DRV_SUNXI=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_SUN6I=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXTCON=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_AXP20X_ADC=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_SUN4I=y
|
||||
CONFIG_PHY_SUN4I_USB=y
|
||||
|
|
|
@ -121,7 +121,6 @@ CONFIG_TOUCHSCREEN_WM97XX=y
|
|||
CONFIG_TOUCHSCREEN_STMPE=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
|
@ -202,6 +201,8 @@ CONFIG_SND_HDA_CODEC_HDMI=y
|
|||
# CONFIG_SND_USB is not set
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_TEGRA=y
|
||||
CONFIG_SND_SOC_TEGRA20_I2S=y
|
||||
CONFIG_SND_SOC_TEGRA30_I2S=y
|
||||
CONFIG_SND_SOC_TEGRA_RT5640=y
|
||||
CONFIG_SND_SOC_TEGRA_WM8753=y
|
||||
CONFIG_SND_SOC_TEGRA_WM8903=y
|
||||
|
@ -218,6 +219,9 @@ CONFIG_USB_EHCI_TEGRA=y
|
|||
CONFIG_USB_ACM=y
|
||||
CONFIG_USB_WDM=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_UDC=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK_MINORS=16
|
||||
CONFIG_MMC_SDHCI=y
|
||||
|
@ -247,8 +251,6 @@ CONFIG_RTC_DRV_TEGRA=y
|
|||
CONFIG_DMADEVICES=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_SENSORS_ISL29018=y
|
||||
CONFIG_SENSORS_ISL29028=y
|
||||
CONFIG_MFD_NVEC=y
|
||||
CONFIG_KEYBOARD_NVEC=y
|
||||
CONFIG_SERIO_NVEC_PS2=y
|
||||
|
@ -263,6 +265,8 @@ CONFIG_ARCH_TEGRA_124_SOC=y
|
|||
CONFIG_MEMORY=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_MPU3050_I2C=y
|
||||
CONFIG_SENSORS_ISL29018=y
|
||||
CONFIG_SENSORS_ISL29028=y
|
||||
CONFIG_AK8975=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_TEGRA=y
|
||||
|
@ -288,13 +292,11 @@ CONFIG_NLS_CODEPAGE_437=y
|
|||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_SLAB=y
|
||||
CONFIG_DEBUG_VM=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
CONFIG_TIMER_STATS=y
|
||||
# CONFIG_DEBUG_PREEMPT is not set
|
||||
CONFIG_DEBUG_MUTEXES=y
|
||||
CONFIG_DEBUG_SG=y
|
||||
|
|
|
@ -19,7 +19,6 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_VEXPRESS=y
|
||||
CONFIG_ARCH_VEXPRESS_CA9X4=y
|
||||
CONFIG_ARCH_VEXPRESS_DCSCB=y
|
||||
CONFIG_ARCH_VEXPRESS_TC2_PM=y
|
||||
# CONFIG_SWP_EMULATE is not set
|
||||
|
|
|
@ -12,43 +12,6 @@
|
|||
|
||||
#include <linux/serial_reg.h>
|
||||
|
||||
/* OMAP2 serial ports */
|
||||
#define OMAP2_UART1_BASE 0x4806a000
|
||||
#define OMAP2_UART2_BASE 0x4806c000
|
||||
#define OMAP2_UART3_BASE 0x4806e000
|
||||
|
||||
/* OMAP3 serial ports */
|
||||
#define OMAP3_UART1_BASE OMAP2_UART1_BASE
|
||||
#define OMAP3_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP3_UART3_BASE 0x49020000
|
||||
#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
|
||||
#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
|
||||
|
||||
/* OMAP4 serial ports */
|
||||
#define OMAP4_UART1_BASE OMAP2_UART1_BASE
|
||||
#define OMAP4_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP4_UART3_BASE 0x48020000
|
||||
#define OMAP4_UART4_BASE 0x4806e000
|
||||
|
||||
/* TI81XX serial ports */
|
||||
#define TI81XX_UART1_BASE 0x48020000
|
||||
#define TI81XX_UART2_BASE 0x48022000
|
||||
#define TI81XX_UART3_BASE 0x48024000
|
||||
|
||||
/* AM3505/3517 UART4 */
|
||||
#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
|
||||
|
||||
/* AM33XX serial port */
|
||||
#define AM33XX_UART1_BASE 0x44E09000
|
||||
|
||||
/* OMAP5 serial ports */
|
||||
#define OMAP5_UART1_BASE OMAP2_UART1_BASE
|
||||
#define OMAP5_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP5_UART3_BASE OMAP4_UART3_BASE
|
||||
#define OMAP5_UART4_BASE OMAP4_UART4_BASE
|
||||
#define OMAP5_UART5_BASE 0x48066000
|
||||
#define OMAP5_UART6_BASE 0x48068000
|
||||
|
||||
/* External port on Zoom2/3 */
|
||||
#define ZOOM_UART_BASE 0x10000000
|
||||
#define ZOOM_UART_VIRT 0xfa400000
|
||||
|
@ -79,55 +42,6 @@ omap_uart_lsr: .word 0
|
|||
bne 100f @ already configured
|
||||
|
||||
/* Configure the UART offset from the phys/virt base */
|
||||
#ifdef CONFIG_DEBUG_OMAP2UART1
|
||||
mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_OMAP2UART2
|
||||
mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_OMAP2UART3
|
||||
mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_OMAP3UART3
|
||||
mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
|
||||
add \rp, \rp, #0x00fb0000
|
||||
add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_OMAP4UART3
|
||||
mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_OMAP3UART4
|
||||
mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
|
||||
add \rp, \rp, #0x00fb0000
|
||||
add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_OMAP4UART4
|
||||
mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_TI81XXUART1
|
||||
mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_TI81XXUART2
|
||||
mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_TI81XXUART3
|
||||
mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
|
||||
b 98f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_AM33XXUART1
|
||||
ldr \rp, =AM33XX_UART1_BASE
|
||||
and \rp, \rp, #0x00ffffff
|
||||
b 97f
|
||||
#endif
|
||||
#ifdef CONFIG_DEBUG_ZOOM_UART
|
||||
ldr \rp, =ZOOM_UART_BASE
|
||||
str \rp, [\tmp, #0] @ omap_uart_phys
|
||||
|
@ -138,28 +52,6 @@ omap_uart_lsr: .word 0
|
|||
#endif
|
||||
b 10b
|
||||
|
||||
/* AM33XX: Store both phys and virt address for the uart */
|
||||
97: add \rp, \rp, #0x44000000 @ phys base
|
||||
str \rp, [\tmp, #0] @ omap_uart_phys
|
||||
sub \rp, \rp, #0x44000000 @ phys base
|
||||
add \rp, \rp, #0xf9000000 @ virt base
|
||||
str \rp, [\tmp, #4] @ omap_uart_virt
|
||||
mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
|
||||
str \rp, [\tmp, #8] @ omap_uart_lsr
|
||||
|
||||
b 10b
|
||||
|
||||
/* Store both phys and virt address for the uart */
|
||||
98: add \rp, \rp, #0x48000000 @ phys base
|
||||
str \rp, [\tmp, #0] @ omap_uart_phys
|
||||
sub \rp, \rp, #0x48000000 @ phys base
|
||||
add \rp, \rp, #0xfa000000 @ virt base
|
||||
str \rp, [\tmp, #4] @ omap_uart_virt
|
||||
mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
|
||||
str \rp, [\tmp, #8] @ omap_uart_lsr
|
||||
|
||||
b 10b
|
||||
|
||||
.align
|
||||
99: .word .
|
||||
.word omap_uart_phys
|
||||
|
|
|
@ -101,8 +101,8 @@ static int __init arm_cpuidle_read_ops(struct device_node *dn, int cpu)
|
|||
|
||||
ops = arm_cpuidle_get_ops(enable_method);
|
||||
if (!ops) {
|
||||
pr_warn("%s: unsupported enable-method property: %s\n",
|
||||
dn->full_name, enable_method);
|
||||
pr_warn("%pOF: unsupported enable-method property: %s\n",
|
||||
dn, enable_method);
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
|
|
|
@ -95,7 +95,7 @@ void __init arm_dt_init_cpu_maps(void)
|
|||
if (of_node_cmp(cpu->type, "cpu"))
|
||||
continue;
|
||||
|
||||
pr_debug(" * %s...\n", cpu->full_name);
|
||||
pr_debug(" * %pOF...\n", cpu);
|
||||
/*
|
||||
* A device tree containing CPU nodes with missing "reg"
|
||||
* properties is considered invalid to build the
|
||||
|
@ -103,8 +103,7 @@ void __init arm_dt_init_cpu_maps(void)
|
|||
*/
|
||||
cell = of_get_property(cpu, "reg", &prop_bytes);
|
||||
if (!cell || prop_bytes < sizeof(*cell)) {
|
||||
pr_debug(" * %s missing reg property\n",
|
||||
cpu->full_name);
|
||||
pr_debug(" * %pOF missing reg property\n", cpu);
|
||||
of_node_put(cpu);
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -127,8 +127,7 @@ static void __init parse_dt_topology(void)
|
|||
|
||||
rate = of_get_property(cn, "clock-frequency", &len);
|
||||
if (!rate || len != 4) {
|
||||
pr_err("%s missing clock-frequency property\n",
|
||||
cn->full_name);
|
||||
pr_err("%pOF missing clock-frequency property\n", cn);
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
|
@ -98,6 +98,13 @@ static struct clk clk_keypad = {
|
|||
.enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
|
||||
.set_rate = set_keytchclk_rate,
|
||||
};
|
||||
static struct clk clk_adc = {
|
||||
.parent = &clk_xtali,
|
||||
.sw_locked = 1,
|
||||
.enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV,
|
||||
.enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_TSEN,
|
||||
.set_rate = set_keytchclk_rate,
|
||||
};
|
||||
static struct clk clk_spi = {
|
||||
.parent = &clk_xtali,
|
||||
.rate = EP93XX_EXT_CLK_RATE,
|
||||
|
@ -214,6 +221,7 @@ static struct clk_lookup clocks[] = {
|
|||
INIT_CK(NULL, "pll2", &clk_pll2),
|
||||
INIT_CK("ohci-platform", NULL, &clk_usb_host),
|
||||
INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
|
||||
INIT_CK("ep93xx-adc", NULL, &clk_adc),
|
||||
INIT_CK("ep93xx-fb", NULL, &clk_video),
|
||||
INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
|
||||
INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk),
|
||||
|
|
|
@ -820,6 +820,30 @@ void ep93xx_ide_release_gpio(struct platform_device *pdev)
|
|||
}
|
||||
EXPORT_SYMBOL(ep93xx_ide_release_gpio);
|
||||
|
||||
/*************************************************************************
|
||||
* EP93xx ADC
|
||||
*************************************************************************/
|
||||
static struct resource ep93xx_adc_resources[] = {
|
||||
DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
|
||||
DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
|
||||
};
|
||||
|
||||
static struct platform_device ep93xx_adc_device = {
|
||||
.name = "ep93xx-adc",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(ep93xx_adc_resources),
|
||||
.resource = ep93xx_adc_resources,
|
||||
};
|
||||
|
||||
void __init ep93xx_register_adc(void)
|
||||
{
|
||||
/* Power up ADC, deactivate Touch Screen Controller */
|
||||
ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
|
||||
EP93XX_SYSCON_DEVCFG_ADCPD);
|
||||
|
||||
platform_device_register(&ep93xx_adc_device);
|
||||
}
|
||||
|
||||
/*************************************************************************
|
||||
* EP93xx Security peripheral
|
||||
*************************************************************************/
|
||||
|
|
|
@ -245,6 +245,7 @@ static void __init edb93xx_init_machine(void)
|
|||
edb93xx_register_pwm();
|
||||
edb93xx_register_fb();
|
||||
edb93xx_register_ide();
|
||||
ep93xx_register_adc();
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -52,6 +52,7 @@ int ep93xx_i2s_acquire(void);
|
|||
void ep93xx_i2s_release(void);
|
||||
void ep93xx_register_ac97(void);
|
||||
void ep93xx_register_ide(void);
|
||||
void ep93xx_register_adc(void);
|
||||
int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
|
||||
void ep93xx_ide_release_gpio(struct platform_device *pdev);
|
||||
|
||||
|
|
|
@ -95,6 +95,7 @@
|
|||
#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000)
|
||||
#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
|
||||
|
||||
#define EP93XX_ADC_PHYS_BASE EP93XX_APB_PHYS(0x00100000)
|
||||
#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
|
||||
#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
|
||||
|
||||
|
|
|
@ -187,21 +187,20 @@ static int __init exynos_pmu_irq_init(struct device_node *node,
|
|||
struct irq_domain *parent_domain, *domain;
|
||||
|
||||
if (!parent) {
|
||||
pr_err("%s: no parent, giving up\n", node->full_name);
|
||||
pr_err("%pOF: no parent, giving up\n", node);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
parent_domain = irq_find_host(parent);
|
||||
if (!parent_domain) {
|
||||
pr_err("%s: unable to obtain parent domain\n", node->full_name);
|
||||
pr_err("%pOF: unable to obtain parent domain\n", node);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
pmu_base_addr = of_iomap(node, 0);
|
||||
|
||||
if (!pmu_base_addr) {
|
||||
pr_err("%s: failed to find exynos pmu register\n",
|
||||
node->full_name);
|
||||
pr_err("%pOF: failed to find exynos pmu register\n", node);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
|
|
|
@ -1,11 +1,16 @@
|
|||
menuconfig ARCH_GEMINI
|
||||
bool "Cortina Systems Gemini"
|
||||
depends on ARCH_MULTI_V4
|
||||
select ARCH_HAS_RESET_CONTROLLER
|
||||
select ARM_AMBA
|
||||
select ARM_APPENDED_DTB # Old Redboot bootloaders deployed
|
||||
select COMMON_CLK_GEMINI
|
||||
select FARADAY_FTINTC010
|
||||
select FTTMR010_TIMER
|
||||
select GPIO_FTGPIO010
|
||||
select GPIOLIB
|
||||
select PINCTRL
|
||||
select PINCTRL_GEMINI
|
||||
select POWER_RESET
|
||||
select POWER_RESET_GEMINI_POWEROFF
|
||||
select POWER_RESET_SYSCON
|
||||
|
|
|
@ -109,7 +109,7 @@ static void hix5hd2_set_scu_boot_addr(phys_addr_t start_addr, phys_addr_t jump_a
|
|||
|
||||
virt = ioremap(start_addr, PAGE_SIZE);
|
||||
|
||||
writel_relaxed(0xe51ff004, virt); /* ldr pc, [rc, #-4] */
|
||||
writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */
|
||||
writel_relaxed(jump_addr, virt + 4); /* pc jump phy address */
|
||||
iounmap(virt);
|
||||
}
|
||||
|
|
|
@ -224,13 +224,13 @@ static int __init imx_gpc_init(struct device_node *node,
|
|||
int i;
|
||||
|
||||
if (!parent) {
|
||||
pr_err("%s: no parent, giving up\n", node->full_name);
|
||||
pr_err("%pOF: no parent, giving up\n", node);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
parent_domain = irq_find_host(parent);
|
||||
if (!parent_domain) {
|
||||
pr_err("%s: unable to obtain parent domain\n", node->full_name);
|
||||
pr_err("%pOF: unable to obtain parent domain\n", node);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
|
|
|
@ -60,6 +60,8 @@ config MACH_ARMADA_38X
|
|||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_753970
|
||||
select ARM_GIC
|
||||
select ARM_GLOBAL_TIMER
|
||||
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
|
||||
select ARMADA_370_XP_IRQ
|
||||
select ARMADA_38X_CLK
|
||||
select HAVE_ARM_SCU
|
||||
|
|
|
@ -107,8 +107,7 @@ static void __init kirkwood_dt_eth_fixup(void)
|
|||
clk_prepare_enable(clk);
|
||||
|
||||
/* store MAC address register contents in local-mac-address */
|
||||
pr_err(FW_INFO "%s: local-mac-address is not set\n",
|
||||
np->full_name);
|
||||
pr_err(FW_INFO "%pOF: local-mac-address is not set\n", np);
|
||||
|
||||
pmac = kzalloc(sizeof(*pmac) + 6, GFP_KERNEL);
|
||||
if (!pmac)
|
||||
|
|
|
@ -87,6 +87,7 @@ config SOC_DRA7XX
|
|||
select OMAP_INTERCONNECT_BARRIER
|
||||
select PM_OPP if PM
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
select PINCTRL_TI_IODELAY if OF && PINCTRL
|
||||
|
||||
config ARCH_OMAP2PLUS
|
||||
bool
|
||||
|
|
|
@ -313,6 +313,7 @@ MACHINE_END
|
|||
|
||||
#ifdef CONFIG_SOC_DRA7XX
|
||||
static const char *const dra74x_boards_compat[] __initconst = {
|
||||
"ti,dra762",
|
||||
"ti,am5728",
|
||||
"ti,am5726",
|
||||
"ti,dra742",
|
||||
|
|
|
@ -204,61 +204,6 @@ static unsigned configure_dma_errata(void)
|
|||
return errata;
|
||||
}
|
||||
|
||||
static const struct dma_slave_map omap24xx_sdma_map[] = {
|
||||
{ "omap-gpmc", "rxtx", SDMA_FILTER_PARAM(4) },
|
||||
{ "omap-aes", "tx", SDMA_FILTER_PARAM(9) },
|
||||
{ "omap-aes", "rx", SDMA_FILTER_PARAM(10) },
|
||||
{ "omap-sham", "rx", SDMA_FILTER_PARAM(13) },
|
||||
{ "omap2_mcspi.2", "tx0", SDMA_FILTER_PARAM(15) },
|
||||
{ "omap2_mcspi.2", "rx0", SDMA_FILTER_PARAM(16) },
|
||||
{ "omap-mcbsp.3", "tx", SDMA_FILTER_PARAM(17) },
|
||||
{ "omap-mcbsp.3", "rx", SDMA_FILTER_PARAM(18) },
|
||||
{ "omap-mcbsp.4", "tx", SDMA_FILTER_PARAM(19) },
|
||||
{ "omap-mcbsp.4", "rx", SDMA_FILTER_PARAM(20) },
|
||||
{ "omap-mcbsp.5", "tx", SDMA_FILTER_PARAM(21) },
|
||||
{ "omap-mcbsp.5", "rx", SDMA_FILTER_PARAM(22) },
|
||||
{ "omap2_mcspi.2", "tx1", SDMA_FILTER_PARAM(23) },
|
||||
{ "omap2_mcspi.2", "rx1", SDMA_FILTER_PARAM(24) },
|
||||
{ "omap_i2c.1", "tx", SDMA_FILTER_PARAM(27) },
|
||||
{ "omap_i2c.1", "rx", SDMA_FILTER_PARAM(28) },
|
||||
{ "omap_i2c.2", "tx", SDMA_FILTER_PARAM(29) },
|
||||
{ "omap_i2c.2", "rx", SDMA_FILTER_PARAM(30) },
|
||||
{ "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(31) },
|
||||
{ "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(32) },
|
||||
{ "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(33) },
|
||||
{ "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(34) },
|
||||
{ "omap2_mcspi.0", "tx0", SDMA_FILTER_PARAM(35) },
|
||||
{ "omap2_mcspi.0", "rx0", SDMA_FILTER_PARAM(36) },
|
||||
{ "omap2_mcspi.0", "tx1", SDMA_FILTER_PARAM(37) },
|
||||
{ "omap2_mcspi.0", "rx1", SDMA_FILTER_PARAM(38) },
|
||||
{ "omap2_mcspi.0", "tx2", SDMA_FILTER_PARAM(39) },
|
||||
{ "omap2_mcspi.0", "rx2", SDMA_FILTER_PARAM(40) },
|
||||
{ "omap2_mcspi.0", "tx3", SDMA_FILTER_PARAM(41) },
|
||||
{ "omap2_mcspi.0", "rx3", SDMA_FILTER_PARAM(42) },
|
||||
{ "omap2_mcspi.1", "tx0", SDMA_FILTER_PARAM(43) },
|
||||
{ "omap2_mcspi.1", "rx0", SDMA_FILTER_PARAM(44) },
|
||||
{ "omap2_mcspi.1", "tx1", SDMA_FILTER_PARAM(45) },
|
||||
{ "omap2_mcspi.1", "rx1", SDMA_FILTER_PARAM(46) },
|
||||
{ "omap_hsmmc.1", "tx", SDMA_FILTER_PARAM(47) },
|
||||
{ "omap_hsmmc.1", "rx", SDMA_FILTER_PARAM(48) },
|
||||
{ "omap_uart.0", "tx", SDMA_FILTER_PARAM(49) },
|
||||
{ "omap_uart.0", "rx", SDMA_FILTER_PARAM(50) },
|
||||
{ "omap_uart.1", "tx", SDMA_FILTER_PARAM(51) },
|
||||
{ "omap_uart.1", "rx", SDMA_FILTER_PARAM(52) },
|
||||
{ "omap_uart.2", "tx", SDMA_FILTER_PARAM(53) },
|
||||
{ "omap_uart.2", "rx", SDMA_FILTER_PARAM(54) },
|
||||
{ "omap_hsmmc.0", "tx", SDMA_FILTER_PARAM(61) },
|
||||
{ "omap_hsmmc.0", "rx", SDMA_FILTER_PARAM(62) },
|
||||
|
||||
/* external DMA requests when tusb6010 is used */
|
||||
{ "musb-tusb", "dmareq0", SDMA_FILTER_PARAM(2) },
|
||||
{ "musb-tusb", "dmareq1", SDMA_FILTER_PARAM(3) },
|
||||
{ "musb-tusb", "dmareq2", SDMA_FILTER_PARAM(14) }, /* OMAP2420 only */
|
||||
{ "musb-tusb", "dmareq3", SDMA_FILTER_PARAM(15) }, /* OMAP2420 only */
|
||||
{ "musb-tusb", "dmareq4", SDMA_FILTER_PARAM(16) }, /* OMAP2420 only */
|
||||
{ "musb-tusb", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
|
||||
};
|
||||
|
||||
static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
|
||||
/* external DMA requests when tusb6010 is used */
|
||||
{ "musb-hdrc.1.auto", "dmareq0", SDMA_FILTER_PARAM(2) },
|
||||
|
@ -269,61 +214,6 @@ static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
|
|||
{ "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
|
||||
};
|
||||
|
||||
static const struct dma_slave_map omap3xxx_sdma_map[] = {
|
||||
{ "omap-gpmc", "rxtx", SDMA_FILTER_PARAM(4) },
|
||||
{ "omap2_mcspi.2", "tx0", SDMA_FILTER_PARAM(15) },
|
||||
{ "omap2_mcspi.2", "rx0", SDMA_FILTER_PARAM(16) },
|
||||
{ "omap-mcbsp.3", "tx", SDMA_FILTER_PARAM(17) },
|
||||
{ "omap-mcbsp.3", "rx", SDMA_FILTER_PARAM(18) },
|
||||
{ "omap-mcbsp.4", "tx", SDMA_FILTER_PARAM(19) },
|
||||
{ "omap-mcbsp.4", "rx", SDMA_FILTER_PARAM(20) },
|
||||
{ "omap-mcbsp.5", "tx", SDMA_FILTER_PARAM(21) },
|
||||
{ "omap-mcbsp.5", "rx", SDMA_FILTER_PARAM(22) },
|
||||
{ "omap2_mcspi.2", "tx1", SDMA_FILTER_PARAM(23) },
|
||||
{ "omap2_mcspi.2", "rx1", SDMA_FILTER_PARAM(24) },
|
||||
{ "omap_i2c.3", "tx", SDMA_FILTER_PARAM(25) },
|
||||
{ "omap_i2c.3", "rx", SDMA_FILTER_PARAM(26) },
|
||||
{ "omap_i2c.1", "tx", SDMA_FILTER_PARAM(27) },
|
||||
{ "omap_i2c.1", "rx", SDMA_FILTER_PARAM(28) },
|
||||
{ "omap_i2c.2", "tx", SDMA_FILTER_PARAM(29) },
|
||||
{ "omap_i2c.2", "rx", SDMA_FILTER_PARAM(30) },
|
||||
{ "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(31) },
|
||||
{ "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(32) },
|
||||
{ "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(33) },
|
||||
{ "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(34) },
|
||||
{ "omap2_mcspi.0", "tx0", SDMA_FILTER_PARAM(35) },
|
||||
{ "omap2_mcspi.0", "rx0", SDMA_FILTER_PARAM(36) },
|
||||
{ "omap2_mcspi.0", "tx1", SDMA_FILTER_PARAM(37) },
|
||||
{ "omap2_mcspi.0", "rx1", SDMA_FILTER_PARAM(38) },
|
||||
{ "omap2_mcspi.0", "tx2", SDMA_FILTER_PARAM(39) },
|
||||
{ "omap2_mcspi.0", "rx2", SDMA_FILTER_PARAM(40) },
|
||||
{ "omap2_mcspi.0", "tx3", SDMA_FILTER_PARAM(41) },
|
||||
{ "omap2_mcspi.0", "rx3", SDMA_FILTER_PARAM(42) },
|
||||
{ "omap2_mcspi.1", "tx0", SDMA_FILTER_PARAM(43) },
|
||||
{ "omap2_mcspi.1", "rx0", SDMA_FILTER_PARAM(44) },
|
||||
{ "omap2_mcspi.1", "tx1", SDMA_FILTER_PARAM(45) },
|
||||
{ "omap2_mcspi.1", "rx1", SDMA_FILTER_PARAM(46) },
|
||||
{ "omap_hsmmc.1", "tx", SDMA_FILTER_PARAM(47) },
|
||||
{ "omap_hsmmc.1", "rx", SDMA_FILTER_PARAM(48) },
|
||||
{ "omap_uart.0", "tx", SDMA_FILTER_PARAM(49) },
|
||||
{ "omap_uart.0", "rx", SDMA_FILTER_PARAM(50) },
|
||||
{ "omap_uart.1", "tx", SDMA_FILTER_PARAM(51) },
|
||||
{ "omap_uart.1", "rx", SDMA_FILTER_PARAM(52) },
|
||||
{ "omap_uart.2", "tx", SDMA_FILTER_PARAM(53) },
|
||||
{ "omap_uart.2", "rx", SDMA_FILTER_PARAM(54) },
|
||||
{ "omap_hsmmc.0", "tx", SDMA_FILTER_PARAM(61) },
|
||||
{ "omap_hsmmc.0", "rx", SDMA_FILTER_PARAM(62) },
|
||||
{ "omap-aes", "tx", SDMA_FILTER_PARAM(65) },
|
||||
{ "omap-aes", "rx", SDMA_FILTER_PARAM(66) },
|
||||
{ "omap-sham", "rx", SDMA_FILTER_PARAM(69) },
|
||||
{ "omap2_mcspi.3", "tx0", SDMA_FILTER_PARAM(70) },
|
||||
{ "omap2_mcspi.3", "rx0", SDMA_FILTER_PARAM(71) },
|
||||
{ "omap_hsmmc.2", "tx", SDMA_FILTER_PARAM(77) },
|
||||
{ "omap_hsmmc.2", "rx", SDMA_FILTER_PARAM(78) },
|
||||
{ "omap_uart.3", "tx", SDMA_FILTER_PARAM(81) },
|
||||
{ "omap_uart.3", "rx", SDMA_FILTER_PARAM(82) },
|
||||
};
|
||||
|
||||
static struct omap_system_dma_plat_info dma_plat_info __initdata = {
|
||||
.reg_map = reg_map,
|
||||
.channel_stride = 0x60,
|
||||
|
@ -352,24 +242,10 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
|
|||
p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
|
||||
p.errata = configure_dma_errata();
|
||||
|
||||
if (!of_have_populated_dt()) {
|
||||
if (soc_is_omap24xx()) {
|
||||
p.slave_map = omap24xx_sdma_map;
|
||||
p.slavecnt = ARRAY_SIZE(omap24xx_sdma_map);
|
||||
} else if (soc_is_omap34xx() || soc_is_omap3630()) {
|
||||
p.slave_map = omap3xxx_sdma_map;
|
||||
p.slavecnt = ARRAY_SIZE(omap3xxx_sdma_map);
|
||||
} else {
|
||||
pr_err("%s: The legacy DMA map is not provided!\n",
|
||||
__func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
} else {
|
||||
if (soc_is_omap24xx()) {
|
||||
/* DMA slave map for drivers not yet converted to DT */
|
||||
p.slave_map = omap24xx_sdma_dt_map;
|
||||
p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
|
||||
}
|
||||
if (soc_is_omap24xx()) {
|
||||
/* DMA slave map for drivers not yet converted to DT */
|
||||
p.slave_map = omap24xx_sdma_dt_map;
|
||||
p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
|
||||
}
|
||||
|
||||
pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
|
||||
|
@ -413,21 +289,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
|
|||
|
||||
static int __init omap2_system_dma_init(void)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
int res;
|
||||
|
||||
res = omap_hwmod_for_each_by_class("dma",
|
||||
return omap_hwmod_for_each_by_class("dma",
|
||||
omap2_system_dma_init_dev, NULL);
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
if (of_have_populated_dt())
|
||||
return res;
|
||||
|
||||
pdev = platform_device_register_full(&omap_dma_dev_info);
|
||||
if (IS_ERR(pdev))
|
||||
return PTR_ERR(pdev);
|
||||
|
||||
return res;
|
||||
}
|
||||
omap_arch_initcall(omap2_system_dma_init);
|
||||
|
|
|
@ -663,6 +663,15 @@ void __init dra7xxx_check_revision(void)
|
|||
hawkeye = (idcode >> 12) & 0xffff;
|
||||
rev = (idcode >> 28) & 0xff;
|
||||
switch (hawkeye) {
|
||||
case 0xbb50:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
default:
|
||||
omap_revision = DRA762_REV_ES1_0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xb990:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
|
|
|
@ -342,7 +342,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
c = &omap443x_cfg;
|
||||
else if (soc_is_omap446x())
|
||||
c = &omap446x_cfg;
|
||||
else if (soc_is_dra74x() || soc_is_omap54xx())
|
||||
else if (soc_is_dra74x() || soc_is_omap54xx() || soc_is_dra76x())
|
||||
c = &omap5_cfg;
|
||||
|
||||
if (!c) {
|
||||
|
@ -355,7 +355,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
cfg.startup_addr = c->startup_addr;
|
||||
cfg.wakeupgen_base = omap_get_wakeupgen_base();
|
||||
|
||||
if (soc_is_dra74x() || soc_is_omap54xx()) {
|
||||
if (soc_is_dra74x() || soc_is_omap54xx() || soc_is_dra76x()) {
|
||||
if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
|
||||
cfg.startup_addr = omap5_secondary_hyp_startup;
|
||||
omap5_erratum_workaround_801819();
|
||||
|
|
|
@ -522,13 +522,13 @@ static int __init wakeupgen_init(struct device_node *node,
|
|||
u32 val;
|
||||
|
||||
if (!parent) {
|
||||
pr_err("%s: no parent, giving up\n", node->full_name);
|
||||
pr_err("%pOF: no parent, giving up\n", node);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
parent_domain = irq_find_host(parent);
|
||||
if (!parent_domain) {
|
||||
pr_err("%s: unable to obtain parent domain\n", node->full_name);
|
||||
pr_err("%pOF: unable to obtain parent domain\n", node);
|
||||
return -ENXIO;
|
||||
}
|
||||
/* Not supported on OMAP4 ES1.0 silicon */
|
||||
|
|
|
@ -672,7 +672,6 @@ static int _od_suspend_noirq(struct device *dev)
|
|||
|
||||
if (!ret && !pm_runtime_status_suspended(dev)) {
|
||||
if (pm_generic_runtime_suspend(dev) == 0) {
|
||||
pm_runtime_set_suspended(dev);
|
||||
omap_device_idle(pdev);
|
||||
od->flags |= OMAP_DEVICE_SUSPENDED;
|
||||
}
|
||||
|
@ -689,15 +688,6 @@ static int _od_resume_noirq(struct device *dev)
|
|||
if (od->flags & OMAP_DEVICE_SUSPENDED) {
|
||||
od->flags &= ~OMAP_DEVICE_SUSPENDED;
|
||||
omap_device_enable(pdev);
|
||||
/*
|
||||
* XXX: we run before core runtime pm has resumed itself. At
|
||||
* this point in time, we just restore the runtime pm state and
|
||||
* considering symmetric operations in resume, we donot expect
|
||||
* to fail. If we failed, something changed in core runtime_pm
|
||||
* framework OR some device driver messed things up, hence, WARN
|
||||
*/
|
||||
WARN(pm_runtime_set_active(dev),
|
||||
"Could not set %s runtime state active\n", dev_name(dev));
|
||||
pm_generic_runtime_resume(dev);
|
||||
}
|
||||
|
||||
|
|
|
@ -2417,8 +2417,8 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
|
|||
if (mem)
|
||||
pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
|
||||
else
|
||||
pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
|
||||
oh->name, index, np->full_name);
|
||||
pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
|
||||
oh->name, index, np);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
|
|
|
@ -4070,6 +4070,11 @@ static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = {
|
|||
};
|
||||
|
||||
/* SoC variant specific hwmod links */
|
||||
static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = {
|
||||
&dra7xx_l4_per3__usb_otg_ss4,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
|
||||
&dra7xx_l4_per3__usb_otg_ss4,
|
||||
NULL,
|
||||
|
@ -4095,12 +4100,14 @@ int __init dra7xx_hwmod_init(void)
|
|||
ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
|
||||
else if (!ret && soc_is_dra72x())
|
||||
ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
|
||||
else if (!ret && soc_is_dra76x())
|
||||
ret = omap_hwmod_register_links(dra76x_hwmod_ocp_ifs);
|
||||
|
||||
if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
|
||||
ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
|
||||
|
||||
/* now for the IPs *NOT* in dra71 */
|
||||
if (!ret && !of_machine_is_compatible("ti,dra718"))
|
||||
/* now for the IPs available only in dra74 and dra72 */
|
||||
if (!ret && !of_machine_is_compatible("ti,dra718") && !soc_is_dra76x())
|
||||
ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -434,6 +434,26 @@ static void __init omap5_uevm_legacy_init(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_DRA7XX
|
||||
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
|
||||
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
|
||||
static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
|
||||
|
||||
static void __init dra7x_evm_mmc_quirk(void)
|
||||
{
|
||||
if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
|
||||
dra7_hsmmc_data_mmc1.version = "rev11";
|
||||
dra7_hsmmc_data_mmc1.max_freq = 96000000;
|
||||
|
||||
dra7_hsmmc_data_mmc2.version = "rev11";
|
||||
dra7_hsmmc_data_mmc2.max_freq = 48000000;
|
||||
|
||||
dra7_hsmmc_data_mmc3.version = "rev11";
|
||||
dra7_hsmmc_data_mmc3.max_freq = 48000000;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct pcs_pdata pcs_pdata;
|
||||
|
||||
void omap_pcs_legacy_init(int irq, void (*rearm)(void))
|
||||
|
@ -560,6 +580,14 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
&omap4_iommu_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_DRA7XX
|
||||
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
|
||||
&dra7_hsmmc_data_mmc1),
|
||||
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
|
||||
&dra7_hsmmc_data_mmc2),
|
||||
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
|
||||
&dra7_hsmmc_data_mmc3),
|
||||
#endif
|
||||
/* Common auxdata */
|
||||
OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
|
||||
|
@ -589,6 +617,9 @@ static struct pdata_init pdata_quirks[] __initdata = {
|
|||
#endif
|
||||
#ifdef CONFIG_SOC_OMAP5
|
||||
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_DRA7XX
|
||||
{ "ti,dra7-evm", dra7x_evm_mmc_quirk, },
|
||||
#endif
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include "prcm44xx.h"
|
||||
#include "prm7xx.h"
|
||||
#include "prcm_mpu7xx.h"
|
||||
#include "soc.h"
|
||||
|
||||
/* iva_7xx_pwrdm: IVA-HD power domain */
|
||||
static struct powerdomain iva_7xx_pwrdm = {
|
||||
|
@ -63,6 +64,14 @@ static struct powerdomain custefuse_7xx_pwrdm = {
|
|||
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* custefuse_aon_7xx_pwrdm: Customer efuse controller power domain */
|
||||
static struct powerdomain custefuse_aon_7xx_pwrdm = {
|
||||
.name = "custefuse_pwrdm",
|
||||
.prcm_offs = DRA7XX_PRM_CUSTEFUSE_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_ON,
|
||||
};
|
||||
|
||||
/* ipu_7xx_pwrdm: Audio back end power domain */
|
||||
static struct powerdomain ipu_7xx_pwrdm = {
|
||||
.name = "ipu_pwrdm",
|
||||
|
@ -350,7 +359,6 @@ static struct powerdomain eve1_7xx_pwrdm = {
|
|||
static struct powerdomain *powerdomains_dra7xx[] __initdata = {
|
||||
&iva_7xx_pwrdm,
|
||||
&rtc_7xx_pwrdm,
|
||||
&custefuse_7xx_pwrdm,
|
||||
&ipu_7xx_pwrdm,
|
||||
&dss_7xx_pwrdm,
|
||||
&l4per_7xx_pwrdm,
|
||||
|
@ -374,9 +382,32 @@ static struct powerdomain *powerdomains_dra7xx[] __initdata = {
|
|||
NULL
|
||||
};
|
||||
|
||||
static struct powerdomain *powerdomains_dra76x[] __initdata = {
|
||||
&custefuse_aon_7xx_pwrdm,
|
||||
NULL
|
||||
};
|
||||
|
||||
static struct powerdomain *powerdomains_dra74x[] __initdata = {
|
||||
&custefuse_7xx_pwrdm,
|
||||
NULL
|
||||
};
|
||||
|
||||
static struct powerdomain *powerdomains_dra72x[] __initdata = {
|
||||
&custefuse_aon_7xx_pwrdm,
|
||||
NULL
|
||||
};
|
||||
|
||||
void __init dra7xx_powerdomains_init(void)
|
||||
{
|
||||
pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
|
||||
pwrdm_register_pwrdms(powerdomains_dra7xx);
|
||||
|
||||
if (soc_is_dra76x())
|
||||
pwrdm_register_pwrdms(powerdomains_dra76x);
|
||||
else if (soc_is_dra74x())
|
||||
pwrdm_register_pwrdms(powerdomains_dra74x);
|
||||
else if (soc_is_dra72x())
|
||||
pwrdm_register_pwrdms(powerdomains_dra72x);
|
||||
|
||||
pwrdm_complete_init();
|
||||
}
|
||||
|
|
|
@ -706,7 +706,7 @@ static int omap3xxx_prm_late_init(void)
|
|||
np = of_find_matching_node(NULL, omap3_prm_dt_match_table);
|
||||
if (np) {
|
||||
irq_num = of_irq_get(np, 0);
|
||||
if (irq_num >= 0)
|
||||
if (irq_num > 0)
|
||||
omap3_prcm_irq_setup.irq = irq_num;
|
||||
}
|
||||
|
||||
|
|
|
@ -747,7 +747,7 @@ static int omap44xx_prm_late_init(void)
|
|||
* Already have OMAP4 IRQ num. For all other platforms, we need
|
||||
* IRQ numbers from DT
|
||||
*/
|
||||
if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
|
||||
if (irq_num <= 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
|
||||
if (irq_num == -EPROBE_DEFER)
|
||||
return irq_num;
|
||||
|
||||
|
@ -756,7 +756,7 @@ static int omap44xx_prm_late_init(void)
|
|||
}
|
||||
|
||||
/* Once OMAP4 DT is filled as well */
|
||||
if (irq_num >= 0) {
|
||||
if (irq_num > 0) {
|
||||
omap4_prcm_irq_setup.irq = irq_num;
|
||||
omap4_prcm_irq_setup.xlate_irq = NULL;
|
||||
}
|
||||
|
|
|
@ -167,6 +167,7 @@ IS_TI_SUBCLASS(816x, 0x816)
|
|||
IS_TI_SUBCLASS(814x, 0x814)
|
||||
IS_AM_SUBCLASS(335x, 0x335)
|
||||
IS_AM_SUBCLASS(437x, 0x437)
|
||||
IS_DRA_SUBCLASS(76x, 0x76)
|
||||
IS_DRA_SUBCLASS(75x, 0x75)
|
||||
IS_DRA_SUBCLASS(72x, 0x72)
|
||||
|
||||
|
@ -185,6 +186,7 @@ IS_DRA_SUBCLASS(72x, 0x72)
|
|||
#define soc_is_omap54xx() 0
|
||||
#define soc_is_omap543x() 0
|
||||
#define soc_is_dra7xx() 0
|
||||
#define soc_is_dra76x() 0
|
||||
#define soc_is_dra74x() 0
|
||||
#define soc_is_dra72x() 0
|
||||
|
||||
|
@ -314,9 +316,11 @@ IS_OMAP_TYPE(3430, 0x3430)
|
|||
|
||||
#if defined(CONFIG_SOC_DRA7XX)
|
||||
#undef soc_is_dra7xx
|
||||
#undef soc_is_dra76x
|
||||
#undef soc_is_dra74x
|
||||
#undef soc_is_dra72x
|
||||
#define soc_is_dra7xx() is_dra7xx()
|
||||
#define soc_is_dra76x() is_dra76x()
|
||||
#define soc_is_dra74x() is_dra75x()
|
||||
#define soc_is_dra72x() is_dra72x()
|
||||
#endif
|
||||
|
@ -386,6 +390,7 @@ IS_OMAP_TYPE(3430, 0x3430)
|
|||
#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
|
||||
|
||||
#define DRA7XX_CLASS 0x07000000
|
||||
#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
|
||||
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
|
||||
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
|
||||
#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
|
||||
|
|
|
@ -3,6 +3,7 @@ config ARCH_ROCKCHIP
|
|||
depends on ARCH_MULTI_V7
|
||||
select PINCTRL
|
||||
select PINCTRL_ROCKCHIP
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
select ARCH_HAS_RESET_CONTROLLER
|
||||
select ARM_AMBA
|
||||
select ARM_GIC
|
||||
|
@ -16,6 +17,7 @@ config ARCH_ROCKCHIP
|
|||
select ROCKCHIP_TIMER
|
||||
select ARM_GLOBAL_TIMER
|
||||
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
help
|
||||
Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
|
||||
containing the RK2928, RK30xx and RK31xx series.
|
||||
|
|
|
@ -67,7 +67,7 @@ static struct reset_control *rockchip_get_core_reset(int cpu)
|
|||
else
|
||||
np = of_get_cpu_node(cpu, NULL);
|
||||
|
||||
return of_reset_control_get(np, NULL);
|
||||
return of_reset_control_get_exclusive(np, NULL);
|
||||
}
|
||||
|
||||
static int pmu_set_power_domain(int pd, bool on)
|
||||
|
@ -182,8 +182,8 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node)
|
|||
|
||||
ret = of_address_to_resource(node, 0, &res);
|
||||
if (ret < 0) {
|
||||
pr_err("%s: could not get address for node %s\n",
|
||||
__func__, node->full_name);
|
||||
pr_err("%s: could not get address for node %pOF\n",
|
||||
__func__, node);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -229,7 +229,7 @@ config ARCH_H1940
|
|||
config H1940BT
|
||||
tristate "Control the state of H1940 bluetooth chip"
|
||||
depends on ARCH_H1940
|
||||
select RFKILL
|
||||
depends on RFKILL
|
||||
help
|
||||
This is a simple driver that is able to control
|
||||
the state of built in bluetooth chip on h1940.
|
||||
|
|
|
@ -173,7 +173,7 @@ static unsigned long s3c24xx_read_idcode_v5(void)
|
|||
return gs;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
|
||||
#if defined(CONFIG_CPU_S3C2412)
|
||||
return __raw_readl(S3C2412_GSTATUS1);
|
||||
#else
|
||||
return 1UL; /* don't look like an 2400 */
|
||||
|
|
|
@ -77,7 +77,7 @@
|
|||
|
||||
#endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */
|
||||
|
||||
#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
|
||||
#if defined(CONFIG_CPU_S3C2412)
|
||||
|
||||
#define S3C2412_OSCSET S3C2410_CLKREG(0x18)
|
||||
#define S3C2412_CLKSRC S3C2410_CLKREG(0x1C)
|
||||
|
@ -141,7 +141,7 @@
|
|||
#define S3C2412_CLKSRC_UREFCLK_EXTCLK (1<<12)
|
||||
#define S3C2412_CLKSRC_EREFCLK_EXTCLK (1<<14)
|
||||
|
||||
#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */
|
||||
#endif /* CONFIG_CPU_S3C2412 */
|
||||
|
||||
#define S3C2416_CLKDIV2 S3C2410_CLKREG(0x28)
|
||||
|
||||
|
|
|
@ -287,7 +287,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
|
|||
.nr_sets = ARRAY_SIZE(mini2440_nand_sets),
|
||||
.sets = mini2440_nand_sets,
|
||||
.ignore_unset_ecc = 1,
|
||||
.ecc_mode = NAND_ECC_SOFT,
|
||||
.ecc_mode = NAND_ECC_HW,
|
||||
};
|
||||
|
||||
/* DM9000AEP 10/100 ethernet controller */
|
||||
|
|
|
@ -111,9 +111,6 @@ static struct platform_device *smdk2443_devices[] __initdata = {
|
|||
&s3c_device_wdt,
|
||||
&s3c_device_i2c0,
|
||||
&s3c_device_hsmmc1,
|
||||
#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
|
||||
&s3c_device_ac97,
|
||||
#endif
|
||||
&s3c2443_device_dma,
|
||||
};
|
||||
|
||||
|
@ -133,11 +130,6 @@ static void __init smdk2443_init_time(void)
|
|||
static void __init smdk2443_machine_init(void)
|
||||
{
|
||||
s3c_i2c0_set_platdata(NULL);
|
||||
|
||||
#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
|
||||
s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0);
|
||||
#endif
|
||||
|
||||
platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
|
||||
smdk_machine_init();
|
||||
}
|
||||
|
|
|
@ -33,10 +33,11 @@
|
|||
#include <mach/regs-gpio.h>
|
||||
#include <mach/regs-clock.h>
|
||||
|
||||
/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
|
||||
/*
|
||||
* S3C24XX_DEBUG_RESUME is dangerous if your bootloader does not
|
||||
* reset the UART configuration, only enable if you really need this!
|
||||
*/
|
||||
//#define CONFIG_DEBUG_RESUME
|
||||
*/
|
||||
//#define S3C24XX_DEBUG_RESUME
|
||||
|
||||
.text
|
||||
|
||||
|
@ -71,13 +72,13 @@ ENTRY(s3c_cpu_resume)
|
|||
str r12, [ r14, #0x54 ]
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_RESUME
|
||||
#ifdef S3C24XX_DEBUG_RESUME
|
||||
mov r3, #'L'
|
||||
strb r3, [ r2, #S3C2410_UTXH ]
|
||||
1001:
|
||||
ldrb r14, [ r3, #S3C2410_UTRSTAT ]
|
||||
tst r14, #S3C2410_UTRSTAT_TXE
|
||||
beq 1001b
|
||||
#endif /* CONFIG_DEBUG_RESUME */
|
||||
#endif /* S3C24XX_DEBUG_RESUME */
|
||||
|
||||
b cpu_resume
|
||||
|
|
|
@ -1,9 +1,6 @@
|
|||
config ARCH_SHMOBILE
|
||||
bool
|
||||
|
||||
config ARCH_SHMOBILE_MULTI
|
||||
bool
|
||||
|
||||
config PM_RMOBILE
|
||||
bool
|
||||
select PM
|
||||
|
@ -34,7 +31,6 @@ menuconfig ARCH_RENESAS
|
|||
depends on ARCH_MULTI_V7 && MMU
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
select ARCH_SHMOBILE
|
||||
select ARCH_SHMOBILE_MULTI
|
||||
select ARM_GIC
|
||||
select GPIOLIB
|
||||
select HAVE_ARM_SCU if SMP
|
||||
|
|
|
@ -11,7 +11,9 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/soc/renesas/rcar-sysc.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -69,8 +71,9 @@ void __init rcar_gen2_pm_init(void)
|
|||
struct device_node *np, *cpus;
|
||||
bool has_a7 = false;
|
||||
bool has_a15 = false;
|
||||
phys_addr_t boot_vector_addr = ICRAM1;
|
||||
struct resource res;
|
||||
u32 syscier = 0;
|
||||
int error;
|
||||
|
||||
if (once++)
|
||||
return;
|
||||
|
@ -91,14 +94,38 @@ void __init rcar_gen2_pm_init(void)
|
|||
else if (of_machine_is_compatible("renesas,r8a7791"))
|
||||
syscier = 0x00111003;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram");
|
||||
if (!np) {
|
||||
/* No smp-sram in DT, fall back to hardcoded address */
|
||||
res = (struct resource)DEFINE_RES_MEM(ICRAM1,
|
||||
shmobile_boot_size);
|
||||
goto map;
|
||||
}
|
||||
|
||||
error = of_address_to_resource(np, 0, &res);
|
||||
if (error) {
|
||||
pr_err("Failed to get smp-sram address: %d\n", error);
|
||||
return;
|
||||
}
|
||||
|
||||
map:
|
||||
/* RAM for jump stub, because BAR requires 256KB aligned address */
|
||||
p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);
|
||||
if (res.start & (256 * 1024 - 1) ||
|
||||
resource_size(&res) < shmobile_boot_size) {
|
||||
pr_err("Invalid smp-sram region\n");
|
||||
return;
|
||||
}
|
||||
|
||||
p = ioremap(res.start, resource_size(&res));
|
||||
if (!p)
|
||||
return;
|
||||
|
||||
memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
|
||||
iounmap(p);
|
||||
|
||||
/* setup reset vectors */
|
||||
p = ioremap_nocache(RST, 0x63);
|
||||
bar = phys_to_sbar(boot_vector_addr);
|
||||
bar = phys_to_sbar(res.start);
|
||||
if (has_a15) {
|
||||
writel_relaxed(bar, p + CA15BAR);
|
||||
writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);
|
||||
|
|
|
@ -195,8 +195,7 @@ static void __init add_special_pd(struct device_node *np, enum pd_types type)
|
|||
return;
|
||||
}
|
||||
|
||||
pr_debug("Special PM domain %s type %d for %s\n", pd->name, type,
|
||||
np->full_name);
|
||||
pr_debug("Special PM domain %s type %d for %pOF\n", pd->name, type, np);
|
||||
|
||||
special_pds[num_special_pds].pd = pd;
|
||||
special_pds[num_special_pds].type = type;
|
||||
|
@ -331,13 +330,13 @@ static int __init rmobile_init_pm_domains(void)
|
|||
for_each_compatible_node(np, NULL, "renesas,sysc-rmobile") {
|
||||
base = of_iomap(np, 0);
|
||||
if (!base) {
|
||||
pr_warn("%s cannot map reg 0\n", np->full_name);
|
||||
pr_warn("%pOF cannot map reg 0\n", np);
|
||||
continue;
|
||||
}
|
||||
|
||||
pmd = of_get_child_by_name(np, "pm-domains");
|
||||
if (!pmd) {
|
||||
pr_warn("%s lacks pm-domains node\n", np->full_name);
|
||||
pr_warn("%pOF lacks pm-domains node\n", np);
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
|
@ -29,17 +29,29 @@
|
|||
#include "common.h"
|
||||
#include "rcar-gen2.h"
|
||||
|
||||
static const struct of_device_id cpg_matches[] __initconst = {
|
||||
{ .compatible = "renesas,rcar-gen2-cpg-clocks", },
|
||||
{ .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
|
||||
{ .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
|
||||
{ .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
|
||||
{ .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static unsigned int __init get_extal_freq(void)
|
||||
{
|
||||
const struct of_device_id *match;
|
||||
struct device_node *cpg, *extal;
|
||||
u32 freq = 20000000;
|
||||
int idx = 0;
|
||||
|
||||
cpg = of_find_compatible_node(NULL, NULL,
|
||||
"renesas,rcar-gen2-cpg-clocks");
|
||||
cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);
|
||||
if (!cpg)
|
||||
return freq;
|
||||
|
||||
extal = of_parse_phandle(cpg, "clocks", 0);
|
||||
if (match->data)
|
||||
idx = of_property_match_string(cpg, "clock-names", match->data);
|
||||
extal = of_parse_phandle(cpg, "clocks", idx);
|
||||
of_node_put(cpg);
|
||||
if (!extal)
|
||||
return freq;
|
||||
|
@ -58,7 +70,8 @@ void __init rcar_gen2_timer_init(void)
|
|||
void __iomem *base;
|
||||
u32 freq;
|
||||
|
||||
if (of_machine_is_compatible("renesas,r8a7792") ||
|
||||
if (of_machine_is_compatible("renesas,r8a7745") ||
|
||||
of_machine_is_compatible("renesas,r8a7792") ||
|
||||
of_machine_is_compatible("renesas,r8a7794")) {
|
||||
freq = 260000000 / 8; /* ZS / 8 */
|
||||
/* CNTVOFF has to be initialized either from non-secure
|
||||
|
|
|
@ -13,5 +13,7 @@ menuconfig ARCH_TEGRA
|
|||
select ARCH_HAS_RESET_CONTROLLER
|
||||
select RESET_CONTROLLER
|
||||
select SOC_BUS
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
help
|
||||
This enables support for NVIDIA Tegra based systems.
|
||||
|
|
|
@ -61,7 +61,7 @@
|
|||
|
||||
/* deal with the registers that move under the 2412/2413 */
|
||||
|
||||
#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
|
||||
#if defined(CONFIG_CPU_S3C2412)
|
||||
#ifndef __ASSEMBLY__
|
||||
extern void __iomem *s3c24xx_va_gpio2;
|
||||
#endif
|
||||
|
|
|
@ -250,6 +250,7 @@ config ARCH_XGENE
|
|||
|
||||
config ARCH_ZX
|
||||
bool "ZTE ZX SoC Family"
|
||||
select PINCTRL
|
||||
help
|
||||
This enables support for ZTE ZX SoC Family
|
||||
|
||||
|
|
|
@ -3,6 +3,7 @@ CONFIG_POSIX_MQUEUE=y
|
|||
CONFIG_AUDIT=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_TASKSTATS=y
|
||||
|
@ -68,6 +69,7 @@ CONFIG_HOTPLUG_PCI_ACPI=y
|
|||
CONFIG_PCI_LAYERSCAPE=y
|
||||
CONFIG_PCI_HISI=y
|
||||
CONFIG_PCIE_QCOM=y
|
||||
CONFIG_PCIE_KIRIN=y
|
||||
CONFIG_PCIE_ARMADA_8K=y
|
||||
CONFIG_PCI_AARDVARK=y
|
||||
CONFIG_PCIE_RCAR=y
|
||||
|
@ -88,6 +90,7 @@ CONFIG_XEN=y
|
|||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_COMPAT=y
|
||||
CONFIG_HIBERNATION=y
|
||||
CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
|
||||
CONFIG_ARM_CPUIDLE=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
|
@ -164,6 +167,7 @@ CONFIG_EEPROM_AT25=m
|
|||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_SAS_ATA=y
|
||||
CONFIG_SCSI_HISI_SAS=y
|
||||
CONFIG_SCSI_HISI_SAS_PCI=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_AHCI=y
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
|
@ -251,6 +255,8 @@ CONFIG_SERIAL_MSM_CONSOLE=y
|
|||
CONFIG_SERIAL_XILINX_PS_UART=y
|
||||
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
|
||||
CONFIG_SERIAL_MVEBU_UART=y
|
||||
CONFIG_SERIAL_DEV_BUS=y
|
||||
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MUX=y
|
||||
|
@ -280,6 +286,7 @@ CONFIG_SPI_ROCKCHIP=y
|
|||
CONFIG_SPI_S3C64XX=y
|
||||
CONFIG_SPI_SPIDEV=m
|
||||
CONFIG_SPMI=y
|
||||
CONFIG_PINCTRL_IPQ8074=y
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_PINCTRL_MAX77620=y
|
||||
CONFIG_PINCTRL_MSM8916=y
|
||||
|
@ -298,6 +305,7 @@ CONFIG_GPIO_MAX77620=y
|
|||
CONFIG_POWER_RESET_MSM=y
|
||||
CONFIG_POWER_RESET_XGENE=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_SYSCON_REBOOT_MODE=y
|
||||
CONFIG_BATTERY_BQ27XXX=y
|
||||
CONFIG_SENSORS_ARM_SCPI=y
|
||||
CONFIG_SENSORS_LM90=m
|
||||
|
@ -305,6 +313,7 @@ CONFIG_SENSORS_INA2XX=m
|
|||
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_THERMAL_EMULATION=y
|
||||
CONFIG_BRCMSTB_THERMAL=m
|
||||
CONFIG_EXYNOS_THERMAL=y
|
||||
CONFIG_ROCKCHIP_THERMAL=m
|
||||
CONFIG_WATCHDOG=y
|
||||
|
@ -312,19 +321,24 @@ CONFIG_S3C2410_WATCHDOG=y
|
|||
CONFIG_MESON_GXBB_WATCHDOG=m
|
||||
CONFIG_MESON_WATCHDOG=m
|
||||
CONFIG_RENESAS_WDT=y
|
||||
CONFIG_UNIPHIER_WATCHDOG=y
|
||||
CONFIG_BCM2835_WDT=y
|
||||
CONFIG_MFD_AXP20X_RSB=y
|
||||
CONFIG_MFD_CROS_EC=y
|
||||
CONFIG_MFD_CROS_EC_I2C=y
|
||||
CONFIG_MFD_CROS_EC_SPI=y
|
||||
CONFIG_MFD_EXYNOS_LPASS=m
|
||||
CONFIG_MFD_HI6421_PMIC=y
|
||||
CONFIG_MFD_HI655X_PMIC=y
|
||||
CONFIG_MFD_MAX77620=y
|
||||
CONFIG_MFD_SPMI_PMIC=y
|
||||
CONFIG_MFD_RK808=y
|
||||
CONFIG_MFD_SEC_CORE=y
|
||||
CONFIG_REGULATOR_AXP20X=y
|
||||
CONFIG_REGULATOR_FAN53555=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_HI6421V530=y
|
||||
CONFIG_REGULATOR_HI655X=y
|
||||
CONFIG_REGULATOR_MAX77620=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
|
@ -359,6 +373,12 @@ CONFIG_DRM_EXYNOS_DSI=y
|
|||
# CONFIG_DRM_EXYNOS_DP is not set
|
||||
CONFIG_DRM_EXYNOS_HDMI=y
|
||||
CONFIG_DRM_EXYNOS_MIC=y
|
||||
CONFIG_DRM_ROCKCHIP=m
|
||||
CONFIG_ROCKCHIP_ANALOGIX_DP=y
|
||||
CONFIG_ROCKCHIP_CDN_DP=y
|
||||
CONFIG_ROCKCHIP_DW_HDMI=y
|
||||
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
|
||||
CONFIG_ROCKCHIP_INNO_HDMI=y
|
||||
CONFIG_DRM_RCAR_DU=m
|
||||
CONFIG_DRM_RCAR_LVDS=y
|
||||
CONFIG_DRM_RCAR_VSP=y
|
||||
|
@ -371,6 +391,7 @@ CONFIG_DRM_MESON=m
|
|||
CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_BACKLIGHT_GENERIC=m
|
||||
CONFIG_BACKLIGHT_PWM=m
|
||||
CONFIG_BACKLIGHT_LP855X=m
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
|
@ -381,8 +402,8 @@ CONFIG_SND=y
|
|||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_BCM2835_SOC_I2S=m
|
||||
CONFIG_SND_SOC_SAMSUNG=y
|
||||
CONFIG_SND_SOC_RCAR=y
|
||||
CONFIG_SND_SOC_AK4613=y
|
||||
CONFIG_SND_SOC_RCAR=m
|
||||
CONFIG_SND_SOC_AK4613=m
|
||||
CONFIG_SND_SIMPLE_CARD=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_OTG=y
|
||||
|
@ -404,6 +425,7 @@ CONFIG_USB_CHIPIDEA_UDC=y
|
|||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_ISP1760=y
|
||||
CONFIG_USB_HSIC_USB3503=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_USB_MSM_OTG=y
|
||||
CONFIG_USB_QCOM_8X16_PHY=y
|
||||
CONFIG_USB_ULPI=y
|
||||
|
@ -452,6 +474,7 @@ CONFIG_RTC_DRV_TEGRA=y
|
|||
CONFIG_RTC_DRV_XGENE=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_BCM2835=m
|
||||
CONFIG_K3_DMA=y
|
||||
CONFIG_MV_XOR_V2=y
|
||||
CONFIG_PL330_DMA=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
|
@ -474,6 +497,7 @@ CONFIG_CLK_QORIQ=y
|
|||
CONFIG_COMMON_CLK_PWM=y
|
||||
CONFIG_COMMON_CLK_QCOM=y
|
||||
CONFIG_QCOM_CLK_SMD_RPM=y
|
||||
CONFIG_IPQ_GCC_8074=y
|
||||
CONFIG_MSM_GCC_8916=y
|
||||
CONFIG_MSM_GCC_8994=y
|
||||
CONFIG_MSM_MMCC_8996=y
|
||||
|
@ -483,6 +507,7 @@ CONFIG_ARM_MHU=y
|
|||
CONFIG_PLATFORM_MHU=y
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
CONFIG_HI6220_MBOX=y
|
||||
CONFIG_ROCKCHIP_IOMMU=y
|
||||
CONFIG_ARM_SMMU=y
|
||||
CONFIG_ARM_SMMU_V3=y
|
||||
CONFIG_RPMSG_QCOM_SMD=y
|
||||
|
@ -516,6 +541,8 @@ CONFIG_PHY_XGENE=y
|
|||
CONFIG_PHY_TEGRA_XUSB=y
|
||||
CONFIG_QCOM_L2_PMU=y
|
||||
CONFIG_QCOM_L3_PMU=y
|
||||
CONFIG_TEE=y
|
||||
CONFIG_OPTEE=y
|
||||
CONFIG_ARM_SCPI_PROTOCOL=y
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_EFI_CAPSULE_LOADER=y
|
||||
|
@ -564,8 +591,17 @@ CONFIG_SECURITY=y
|
|||
CONFIG_CRYPTO_ECHAINIV=y
|
||||
CONFIG_CRYPTO_ANSI_CPRNG=y
|
||||
CONFIG_ARM64_CRYPTO=y
|
||||
CONFIG_CRYPTO_SHA256_ARM64=m
|
||||
CONFIG_CRYPTO_SHA512_ARM64=m
|
||||
CONFIG_CRYPTO_SHA1_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA2_ARM64_CE=y
|
||||
CONFIG_CRYPTO_GHASH_ARM64_CE=y
|
||||
CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
|
||||
CONFIG_CRYPTO_CRC32_ARM64_CE=m
|
||||
CONFIG_CRYPTO_AES_ARM64=m
|
||||
CONFIG_CRYPTO_AES_ARM64_CE=m
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
|
||||
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m
|
||||
CONFIG_CRYPTO_CHACHA20_NEON=m
|
||||
CONFIG_CRYPTO_AES_ARM64_BS=m
|
||||
|
|
|
@ -70,8 +70,10 @@ static int omap_ocp2scp_probe(struct platform_device *pdev)
|
|||
if (!of_device_is_compatible(np, "ti,am437x-ocp2scp")) {
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(regs))
|
||||
goto err0;
|
||||
if (IS_ERR(regs)) {
|
||||
ret = PTR_ERR(regs);
|
||||
goto err1;
|
||||
}
|
||||
|
||||
pm_runtime_get_sync(&pdev->dev);
|
||||
reg = readl_relaxed(regs + OCP2SCP_TIMING);
|
||||
|
@ -83,6 +85,9 @@ static int omap_ocp2scp_probe(struct platform_device *pdev)
|
|||
|
||||
return 0;
|
||||
|
||||
err1:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
err0:
|
||||
device_for_each_child(&pdev->dev, NULL, ocp2scp_remove_devices);
|
||||
|
||||
|
|
|
@ -85,7 +85,7 @@ static struct device_attribute realview_build_attr =
|
|||
|
||||
static int realview_soc_probe(struct platform_device *pdev)
|
||||
{
|
||||
static struct regmap *syscon_regmap;
|
||||
struct regmap *syscon_regmap;
|
||||
struct soc_device *soc_dev;
|
||||
struct soc_device_attribute *soc_dev_attr;
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
|
|
|
@ -67,6 +67,9 @@ struct omap_hsmmc_platform_data {
|
|||
#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
|
||||
unsigned features;
|
||||
|
||||
/* string specifying a particular variant of hardware */
|
||||
char *version;
|
||||
|
||||
int gpio_cd; /* gpio (card detect) */
|
||||
int gpio_cod; /* gpio (cover detect) */
|
||||
int gpio_wp; /* gpio (write protect) */
|
||||
|
|
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