Merge remote-tracking branches 'asoc/topic/sun4i-i2s', 'asoc/topic/sunxi', 'asoc/topic/symmetry', 'asoc/topic/tas5720' and 'asoc/topic/tas6424' into asoc-next
This commit is contained in:
Mark Brown
Коммит
7f4b875032
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@ -8,6 +8,7 @@ Required properties:
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- compatible: should be one of the following:
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- "allwinner,sun4i-a10-i2s"
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- "allwinner,sun6i-a31-i2s"
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- "allwinner,sun8i-a83t-i2s"
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- "allwinner,sun8i-h3-i2s"
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- reg: physical base address of the controller and length of memory mapped
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region.
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@ -23,6 +24,7 @@ Required properties:
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Required properties for the following compatibles:
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- "allwinner,sun6i-a31-i2s"
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- "allwinner,sun8i-a83t-i2s"
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- "allwinner,sun8i-h3-i2s"
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- resets: phandle to the reset line for this codec
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@ -6,10 +6,12 @@ audio playback. For more product information please see the links below:
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http://www.ti.com/product/TAS5720L
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http://www.ti.com/product/TAS5720M
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http://www.ti.com/product/TAS5722L
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Required properties:
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- compatible : "ti,tas5720"
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- compatible : "ti,tas5720",
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"ti,tas5722"
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- reg : I2C slave address
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- dvdd-supply : phandle to a 3.3-V supply for the digital circuitry
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- pvdd-supply : phandle to a supply used for the Class-D amp and the analog
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@ -0,0 +1,20 @@
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Texas Instruments TAS6424 Quad-Channel Audio amplifier
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The TAS6424 serial control bus communicates through I2C protocols.
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Required properties:
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- compatible: "ti,tas6424" - TAS6424
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- reg: I2C slave address
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- sound-dai-cells: must be equal to 0
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Example:
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tas6424: tas6424@6a {
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compatible = "ti,tas6424";
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reg = <0x6a>;
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#sound-dai-cells = <0>;
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};
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For more product information please see the link below:
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http://www.ti.com/product/TAS6424-Q1
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@ -296,9 +296,6 @@ struct snd_soc_dai {
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/* DAI runtime info */
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unsigned int capture_active:1; /* stream is in use */
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unsigned int playback_active:1; /* stream is in use */
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unsigned int symmetric_rates:1;
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unsigned int symmetric_channels:1;
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unsigned int symmetric_samplebits:1;
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unsigned int probed:1;
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unsigned int active;
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@ -151,6 +151,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_TAS5086 if I2C
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select SND_SOC_TAS571X if I2C
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select SND_SOC_TAS5720 if I2C
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select SND_SOC_TAS6424 if I2C
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select SND_SOC_TFA9879 if I2C
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select SND_SOC_TLV320AIC23_I2C if I2C
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select SND_SOC_TLV320AIC23_SPI if SPI_MASTER
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@ -905,6 +906,13 @@ config SND_SOC_TAS5720
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Enable support for Texas Instruments TAS5720L/M high-efficiency mono
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Class-D audio power amplifiers.
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config SND_SOC_TAS6424
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tristate "Texas Instruments TAS6424 Quad-Channel Audio amplifier"
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depends on I2C
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help
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Enable support for Texas Instruments TAS6424 high-efficiency
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digital input quad-channel Class-D audio power amplifiers.
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config SND_SOC_TFA9879
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tristate "NXP Semiconductors TFA9879 amplifier"
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depends on I2C
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@ -160,6 +160,7 @@ snd-soc-sti-sas-objs := sti-sas.o
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snd-soc-tas5086-objs := tas5086.o
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snd-soc-tas571x-objs := tas571x.o
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snd-soc-tas5720-objs := tas5720.o
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snd-soc-tas6424-objs := tas6424.o
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snd-soc-tfa9879-objs := tfa9879.o
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snd-soc-tlv320aic23-objs := tlv320aic23.o
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snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
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@ -403,6 +404,7 @@ obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
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obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
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obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
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obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc-tas5720.o
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obj-$(CONFIG_SND_SOC_TAS6424) += snd-soc-tas6424.o
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obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
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@ -36,6 +36,11 @@
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/* Define how often to check (and clear) the fault status register (in ms) */
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#define TAS5720_FAULT_CHECK_INTERVAL 200
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enum tas572x_type {
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TAS5720,
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TAS5722,
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};
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static const char * const tas5720_supply_names[] = {
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"dvdd", /* Digital power supply. Connect to 3.3-V supply. */
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"pvdd", /* Class-D amp and analog power supply (connected). */
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@ -47,6 +52,7 @@ struct tas5720_data {
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struct snd_soc_codec *codec;
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struct regmap *regmap;
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struct i2c_client *tas5720_client;
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enum tas572x_type devtype;
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struct regulator_bulk_data supplies[TAS5720_NUM_SUPPLIES];
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struct delayed_work fault_check_work;
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unsigned int last_fault;
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@ -264,7 +270,7 @@ out:
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static int tas5720_codec_probe(struct snd_soc_codec *codec)
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{
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struct tas5720_data *tas5720 = snd_soc_codec_get_drvdata(codec);
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unsigned int device_id;
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unsigned int device_id, expected_device_id;
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int ret;
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tas5720->codec = codec;
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@ -276,6 +282,11 @@ static int tas5720_codec_probe(struct snd_soc_codec *codec)
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return ret;
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}
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/*
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* Take a liberal approach to checking the device ID to allow the
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* driver to be used even if the device ID does not match, however
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* issue a warning if there is a mismatch.
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*/
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ret = regmap_read(tas5720->regmap, TAS5720_DEVICE_ID_REG, &device_id);
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if (ret < 0) {
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dev_err(codec->dev, "failed to read device ID register: %d\n",
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@ -283,13 +294,22 @@ static int tas5720_codec_probe(struct snd_soc_codec *codec)
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goto probe_fail;
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}
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if (device_id != TAS5720_DEVICE_ID) {
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dev_err(codec->dev, "wrong device ID. expected: %u read: %u\n",
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TAS5720_DEVICE_ID, device_id);
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ret = -ENODEV;
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goto probe_fail;
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switch (tas5720->devtype) {
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case TAS5720:
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expected_device_id = TAS5720_DEVICE_ID;
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break;
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case TAS5722:
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expected_device_id = TAS5722_DEVICE_ID;
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break;
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default:
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dev_err(codec->dev, "unexpected private driver data\n");
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return -EINVAL;
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}
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if (device_id != expected_device_id)
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dev_warn(codec->dev, "wrong device ID. expected: %u read: %u\n",
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expected_device_id, device_id);
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/* Set device to mute */
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ret = snd_soc_update_bits(codec, TAS5720_DIGITAL_CTRL2_REG,
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TAS5720_MUTE, TAS5720_MUTE);
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@ -446,6 +466,15 @@ static const struct regmap_config tas5720_regmap_config = {
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.volatile_reg = tas5720_is_volatile_reg,
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};
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static const struct regmap_config tas5722_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = TAS5722_MAX_REG,
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.cache_type = REGCACHE_RBTREE,
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.volatile_reg = tas5720_is_volatile_reg,
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};
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/*
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* DAC analog gain. There are four discrete values to select from, ranging
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* from 19.2 dB to 26.3dB.
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@ -544,6 +573,7 @@ static int tas5720_probe(struct i2c_client *client,
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{
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struct device *dev = &client->dev;
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struct tas5720_data *data;
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const struct regmap_config *regmap_config;
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int ret;
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int i;
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@ -552,7 +582,20 @@ static int tas5720_probe(struct i2c_client *client,
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return -ENOMEM;
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data->tas5720_client = client;
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data->regmap = devm_regmap_init_i2c(client, &tas5720_regmap_config);
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data->devtype = id->driver_data;
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switch (id->driver_data) {
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case TAS5720:
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regmap_config = &tas5720_regmap_config;
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break;
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case TAS5722:
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regmap_config = &tas5722_regmap_config;
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break;
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default:
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dev_err(dev, "unexpected private driver data\n");
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return -EINVAL;
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}
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data->regmap = devm_regmap_init_i2c(client, regmap_config);
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if (IS_ERR(data->regmap)) {
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ret = PTR_ERR(data->regmap);
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dev_err(dev, "failed to allocate register map: %d\n", ret);
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@ -592,7 +635,8 @@ static int tas5720_remove(struct i2c_client *client)
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}
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static const struct i2c_device_id tas5720_id[] = {
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{ "tas5720", 0 },
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{ "tas5720", TAS5720 },
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{ "tas5722", TAS5722 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, tas5720_id);
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@ -600,6 +644,7 @@ MODULE_DEVICE_TABLE(i2c, tas5720_id);
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#if IS_ENABLED(CONFIG_OF)
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static const struct of_device_id tas5720_of_match[] = {
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{ .compatible = "ti,tas5720", },
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{ .compatible = "ti,tas5722", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, tas5720_of_match);
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@ -30,8 +30,14 @@
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#define TAS5720_DIGITAL_CLIP1_REG 0x11
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#define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG
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/* Additional TAS5722-specific Registers */
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#define TAS5722_DIGITAL_CTRL2_REG 0x13
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#define TAS5722_ANALOG_CTRL2_REG 0x14
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#define TAS5722_MAX_REG TAS5722_ANALOG_CTRL2_REG
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/* TAS5720_DEVICE_ID_REG */
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#define TAS5720_DEVICE_ID 0x01
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#define TAS5722_DEVICE_ID 0x12
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/* TAS5720_POWER_CTRL_REG */
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#define TAS5720_DIG_CLIP_MASK GENMASK(7, 2)
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@ -51,6 +57,7 @@
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#define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0)
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/* TAS5720_DIGITAL_CTRL2_REG */
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#define TAS5722_VOL_RAMP_RATE BIT(6)
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#define TAS5720_MUTE BIT(4)
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#define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0)
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@ -87,4 +94,28 @@
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#define TAS5720_CLIP1_MASK GENMASK(7, 2)
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#define TAS5720_CLIP1_SHIFT (0x2)
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/* TAS5722_DIGITAL_CTRL2_REG */
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#define TAS5722_HPF_3_7HZ (0x0 << 5)
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#define TAS5722_HPF_7_4HZ (0x1 << 5)
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#define TAS5722_HPF_14_9HZ (0x2 << 5)
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#define TAS5722_HPF_29_7HZ (0x3 << 5)
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#define TAS5722_HPF_59_4HZ (0x4 << 5)
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#define TAS5722_HPF_118_4HZ (0x5 << 5)
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#define TAS5722_HPF_235_0HZ (0x6 << 5)
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#define TAS5722_HPF_463_2HZ (0x7 << 5)
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#define TAS5722_HPF_MASK GENMASK(7, 5)
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#define TAS5722_AUTO_SLEEP_OFF (0x0 << 3)
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#define TAS5722_AUTO_SLEEP_1024LR (0x1 << 3)
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#define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3)
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#define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3)
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#define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3)
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#define TAS5722_TDM_SLOT_16B BIT(2)
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#define TAS5722_MCLK_PIN_CFG BIT(1)
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#define TAS5722_VOL_CONTROL_LSB BIT(0)
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|
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/* TAS5722_ANALOG_CTRL2_REG */
|
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#define TAS5722_FAULTZ_PU BIT(3)
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#define TAS5722_VREG_LVL BIT(2)
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#define TAS5722_PWR_TUNE BIT(0)
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|
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#endif /* __TAS5720_H__ */
|
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|
|
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|
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@ -0,0 +1,707 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
|
||||
*
|
||||
* Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Author: Andreas Dannenberg <dannenberg@ti.com>
|
||||
* Andrew F. Davis <afd@ti.com>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <sound/pcm.h>
|
||||
#include <sound/pcm_params.h>
|
||||
#include <sound/soc.h>
|
||||
#include <sound/soc-dapm.h>
|
||||
#include <sound/tlv.h>
|
||||
|
||||
#include "tas6424.h"
|
||||
|
||||
/* Define how often to check (and clear) the fault status register (in ms) */
|
||||
#define TAS6424_FAULT_CHECK_INTERVAL 200
|
||||
|
||||
static const char * const tas6424_supply_names[] = {
|
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"dvdd", /* Digital power supply. Connect to 3.3-V supply. */
|
||||
"vbat", /* Supply used for higher voltage analog circuits. */
|
||||
"pvdd", /* Class-D amp output FETs supply. */
|
||||
};
|
||||
#define TAS6424_NUM_SUPPLIES ARRAY_SIZE(tas6424_supply_names)
|
||||
|
||||
struct tas6424_data {
|
||||
struct device *dev;
|
||||
struct regmap *regmap;
|
||||
struct regulator_bulk_data supplies[TAS6424_NUM_SUPPLIES];
|
||||
struct delayed_work fault_check_work;
|
||||
unsigned int last_fault1;
|
||||
unsigned int last_fault2;
|
||||
unsigned int last_warn;
|
||||
};
|
||||
|
||||
/*
|
||||
* DAC digital volumes. From -103.5 to 24 dB in 0.5 dB steps. Note that
|
||||
* setting the gain below -100 dB (register value <0x7) is effectively a MUTE
|
||||
* as per device datasheet.
|
||||
*/
|
||||
static DECLARE_TLV_DB_SCALE(dac_tlv, -10350, 50, 0);
|
||||
|
||||
static const struct snd_kcontrol_new tas6424_snd_controls[] = {
|
||||
SOC_SINGLE_TLV("Speaker Driver CH1 Playback Volume",
|
||||
TAS6424_CH1_VOL_CTRL, 0, 0xff, 0, dac_tlv),
|
||||
SOC_SINGLE_TLV("Speaker Driver CH2 Playback Volume",
|
||||
TAS6424_CH2_VOL_CTRL, 0, 0xff, 0, dac_tlv),
|
||||
SOC_SINGLE_TLV("Speaker Driver CH3 Playback Volume",
|
||||
TAS6424_CH3_VOL_CTRL, 0, 0xff, 0, dac_tlv),
|
||||
SOC_SINGLE_TLV("Speaker Driver CH4 Playback Volume",
|
||||
TAS6424_CH4_VOL_CTRL, 0, 0xff, 0, dac_tlv),
|
||||
};
|
||||
|
||||
static int tas6424_dac_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct tas6424_data *tas6424 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
dev_dbg(codec->dev, "%s() event=0x%0x\n", __func__, event);
|
||||
|
||||
if (event & SND_SOC_DAPM_POST_PMU) {
|
||||
/* Observe codec shutdown-to-active time */
|
||||
msleep(12);
|
||||
|
||||
/* Turn on TAS6424 periodic fault checking/handling */
|
||||
tas6424->last_fault1 = 0;
|
||||
tas6424->last_fault2 = 0;
|
||||
tas6424->last_warn = 0;
|
||||
schedule_delayed_work(&tas6424->fault_check_work,
|
||||
msecs_to_jiffies(TAS6424_FAULT_CHECK_INTERVAL));
|
||||
} else if (event & SND_SOC_DAPM_PRE_PMD) {
|
||||
/* Disable TAS6424 periodic fault checking/handling */
|
||||
cancel_delayed_work_sync(&tas6424->fault_check_work);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_soc_dapm_widget tas6424_dapm_widgets[] = {
|
||||
SND_SOC_DAPM_AIF_IN("DAC IN", "Playback", 0, SND_SOC_NOPM, 0, 0),
|
||||
SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas6424_dac_event,
|
||||
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
|
||||
SND_SOC_DAPM_OUTPUT("OUT")
|
||||
};
|
||||
|
||||
static const struct snd_soc_dapm_route tas6424_audio_map[] = {
|
||||
{ "DAC", NULL, "DAC IN" },
|
||||
{ "OUT", NULL, "DAC" },
|
||||
};
|
||||
|
||||
static int tas6424_hw_params(struct snd_pcm_substream *substream,
|
||||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
unsigned int rate = params_rate(params);
|
||||
unsigned int width = params_width(params);
|
||||
u8 sap_ctrl = 0;
|
||||
|
||||
dev_dbg(codec->dev, "%s() rate=%u width=%u\n", __func__, rate, width);
|
||||
|
||||
switch (rate) {
|
||||
case 44100:
|
||||
sap_ctrl |= TAS6424_SAP_RATE_44100;
|
||||
break;
|
||||
case 48000:
|
||||
sap_ctrl |= TAS6424_SAP_RATE_48000;
|
||||
break;
|
||||
case 96000:
|
||||
sap_ctrl |= TAS6424_SAP_RATE_96000;
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "unsupported sample rate: %u\n", rate);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (width) {
|
||||
case 16:
|
||||
sap_ctrl |= TAS6424_SAP_TDM_SLOT_SZ_16;
|
||||
break;
|
||||
case 24:
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "unsupported sample width: %u\n", width);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, TAS6424_SAP_CTRL,
|
||||
TAS6424_SAP_RATE_MASK |
|
||||
TAS6424_SAP_TDM_SLOT_SZ_16,
|
||||
sap_ctrl);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
u8 serial_format = 0;
|
||||
|
||||
dev_dbg(codec->dev, "%s() fmt=0x%0x\n", __func__, fmt);
|
||||
|
||||
/* clock masters */
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
case SND_SOC_DAIFMT_CBS_CFS:
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "Invalid DAI master/slave interface\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* signal polarity */
|
||||
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
||||
case SND_SOC_DAIFMT_NB_NF:
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "Invalid DAI clock signal polarity\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* interface format */
|
||||
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
||||
case SND_SOC_DAIFMT_I2S:
|
||||
serial_format |= TAS6424_SAP_I2S;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_DSP_A:
|
||||
serial_format |= TAS6424_SAP_DSP;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_DSP_B:
|
||||
/*
|
||||
* We can use the fact that the TAS6424 does not care about the
|
||||
* LRCLK duty cycle during TDM to receive DSP_B formatted data
|
||||
* in LEFTJ mode (no delaying of the 1st data bit).
|
||||
*/
|
||||
serial_format |= TAS6424_SAP_LEFTJ;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_LEFT_J:
|
||||
serial_format |= TAS6424_SAP_LEFTJ;
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "Invalid DAI interface format\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, TAS6424_SAP_CTRL,
|
||||
TAS6424_SAP_FMT_MASK, serial_format);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_set_dai_tdm_slot(struct snd_soc_dai *dai,
|
||||
unsigned int tx_mask, unsigned int rx_mask,
|
||||
int slots, int slot_width)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
unsigned int first_slot, last_slot;
|
||||
bool sap_tdm_slot_last;
|
||||
|
||||
dev_dbg(codec->dev, "%s() tx_mask=%d rx_mask=%d\n", __func__,
|
||||
tx_mask, rx_mask);
|
||||
|
||||
if (!tx_mask || !rx_mask)
|
||||
return 0; /* nothing needed to disable TDM mode */
|
||||
|
||||
/*
|
||||
* Determine the first slot and last slot that is being requested so
|
||||
* we'll be able to more easily enforce certain constraints as the
|
||||
* TAS6424's TDM interface is not fully configurable.
|
||||
*/
|
||||
first_slot = __ffs(tx_mask);
|
||||
last_slot = __fls(rx_mask);
|
||||
|
||||
if (last_slot - first_slot != 4) {
|
||||
dev_err(codec->dev, "tdm mask must cover 4 contiguous slots\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (first_slot) {
|
||||
case 0:
|
||||
sap_tdm_slot_last = false;
|
||||
break;
|
||||
case 4:
|
||||
sap_tdm_slot_last = true;
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "tdm mask must start at slot 0 or 4\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, TAS6424_SAP_CTRL, TAS6424_SAP_TDM_SLOT_LAST,
|
||||
sap_tdm_slot_last ? TAS6424_SAP_TDM_SLOT_LAST : 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_mute(struct snd_soc_dai *dai, int mute)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
unsigned int val;
|
||||
|
||||
dev_dbg(codec->dev, "%s() mute=%d\n", __func__, mute);
|
||||
|
||||
if (mute)
|
||||
val = TAS6424_ALL_STATE_MUTE;
|
||||
else
|
||||
val = TAS6424_ALL_STATE_PLAY;
|
||||
|
||||
snd_soc_write(codec, TAS6424_CH_STATE_CTRL, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_power_off(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct tas6424_data *tas6424 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
snd_soc_write(codec, TAS6424_CH_STATE_CTRL, TAS6424_ALL_STATE_HIZ);
|
||||
|
||||
regcache_cache_only(tas6424->regmap, true);
|
||||
regcache_mark_dirty(tas6424->regmap);
|
||||
|
||||
ret = regulator_bulk_disable(ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "failed to disable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_power_on(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct tas6424_data *tas6424 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "failed to enable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
regcache_cache_only(tas6424->regmap, false);
|
||||
|
||||
ret = regcache_sync(tas6424->regmap);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "failed to sync regcache: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, TAS6424_CH_STATE_CTRL, TAS6424_ALL_STATE_MUTE);
|
||||
|
||||
/* any time we come out of HIZ, the output channels automatically run DC
|
||||
* load diagnostics, wait here until this completes
|
||||
*/
|
||||
msleep(230);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_set_bias_level(struct snd_soc_codec *codec,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
dev_dbg(codec->dev, "%s() level=%d\n", __func__, level);
|
||||
|
||||
switch (level) {
|
||||
case SND_SOC_BIAS_ON:
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
break;
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
|
||||
tas6424_power_on(codec);
|
||||
break;
|
||||
case SND_SOC_BIAS_OFF:
|
||||
tas6424_power_off(codec);
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct snd_soc_codec_driver soc_codec_dev_tas6424 = {
|
||||
.set_bias_level = tas6424_set_bias_level,
|
||||
.idle_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = tas6424_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(tas6424_snd_controls),
|
||||
.dapm_widgets = tas6424_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(tas6424_dapm_widgets),
|
||||
.dapm_routes = tas6424_audio_map,
|
||||
.num_dapm_routes = ARRAY_SIZE(tas6424_audio_map),
|
||||
},
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_ops tas6424_speaker_dai_ops = {
|
||||
.hw_params = tas6424_hw_params,
|
||||
.set_fmt = tas6424_set_dai_fmt,
|
||||
.set_tdm_slot = tas6424_set_dai_tdm_slot,
|
||||
.digital_mute = tas6424_mute,
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_driver tas6424_dai[] = {
|
||||
{
|
||||
.name = "tas6424-amplifier",
|
||||
.playback = {
|
||||
.stream_name = "Playback",
|
||||
.channels_min = 1,
|
||||
.channels_max = 4,
|
||||
.rates = TAS6424_RATES,
|
||||
.formats = TAS6424_FORMATS,
|
||||
},
|
||||
.ops = &tas6424_speaker_dai_ops,
|
||||
},
|
||||
};
|
||||
|
||||
static void tas6424_fault_check_work(struct work_struct *work)
|
||||
{
|
||||
struct tas6424_data *tas6424 = container_of(work, struct tas6424_data,
|
||||
fault_check_work.work);
|
||||
struct device *dev = tas6424->dev;
|
||||
unsigned int reg;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(tas6424->regmap, TAS6424_GLOB_FAULT1, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to read FAULT1 register: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* Ignore any clock faults as there is no clean way to check for them.
|
||||
* We would need to start checking for those faults *after* the SAIF
|
||||
* stream has been setup, and stop checking *before* the stream is
|
||||
* stopped to avoid any false-positives. However there are no
|
||||
* appropriate hooks to monitor these events.
|
||||
*/
|
||||
reg &= TAS6424_FAULT_PVDD_OV |
|
||||
TAS6424_FAULT_VBAT_OV |
|
||||
TAS6424_FAULT_PVDD_UV |
|
||||
TAS6424_FAULT_VBAT_UV;
|
||||
|
||||
if (reg)
|
||||
goto check_global_fault2_reg;
|
||||
|
||||
/*
|
||||
* Only flag errors once for a given occurrence. This is needed as
|
||||
* the TAS6424 will take time clearing the fault condition internally
|
||||
* during which we don't want to bombard the system with the same
|
||||
* error message over and over.
|
||||
*/
|
||||
if ((reg & TAS6424_FAULT_PVDD_OV) && !(tas6424->last_fault1 & TAS6424_FAULT_PVDD_OV))
|
||||
dev_crit(dev, "experienced a PVDD overvoltage fault\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_VBAT_OV) && !(tas6424->last_fault1 & TAS6424_FAULT_VBAT_OV))
|
||||
dev_crit(dev, "experienced a VBAT overvoltage fault\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_PVDD_UV) && !(tas6424->last_fault1 & TAS6424_FAULT_PVDD_UV))
|
||||
dev_crit(dev, "experienced a PVDD undervoltage fault\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_VBAT_UV) && !(tas6424->last_fault1 & TAS6424_FAULT_VBAT_UV))
|
||||
dev_crit(dev, "experienced a VBAT undervoltage fault\n");
|
||||
|
||||
/* Store current fault1 value so we can detect any changes next time */
|
||||
tas6424->last_fault1 = reg;
|
||||
|
||||
check_global_fault2_reg:
|
||||
ret = regmap_read(tas6424->regmap, TAS6424_GLOB_FAULT2, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to read FAULT2 register: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
reg &= TAS6424_FAULT_OTSD |
|
||||
TAS6424_FAULT_OTSD_CH1 |
|
||||
TAS6424_FAULT_OTSD_CH2 |
|
||||
TAS6424_FAULT_OTSD_CH3 |
|
||||
TAS6424_FAULT_OTSD_CH4;
|
||||
|
||||
if (!reg)
|
||||
goto check_warn_reg;
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD))
|
||||
dev_crit(dev, "experienced a global overtemp shutdown\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH1) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH1))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH1\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH2) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH2))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH2\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH3) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH3))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH3\n");
|
||||
|
||||
if ((reg & TAS6424_FAULT_OTSD_CH4) && !(tas6424->last_fault2 & TAS6424_FAULT_OTSD_CH4))
|
||||
dev_crit(dev, "experienced an overtemp shutdown on CH4\n");
|
||||
|
||||
/* Store current fault2 value so we can detect any changes next time */
|
||||
tas6424->last_fault2 = reg;
|
||||
|
||||
check_warn_reg:
|
||||
ret = regmap_read(tas6424->regmap, TAS6424_WARN, ®);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to read WARN register: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
reg &= TAS6424_WARN_VDD_UV |
|
||||
TAS6424_WARN_VDD_POR |
|
||||
TAS6424_WARN_VDD_OTW |
|
||||
TAS6424_WARN_VDD_OTW_CH1 |
|
||||
TAS6424_WARN_VDD_OTW_CH2 |
|
||||
TAS6424_WARN_VDD_OTW_CH3 |
|
||||
TAS6424_WARN_VDD_OTW_CH4;
|
||||
|
||||
if (!reg)
|
||||
goto out;
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_UV) && !(tas6424->last_warn & TAS6424_WARN_VDD_UV))
|
||||
dev_warn(dev, "experienced a VDD under voltage condition\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_POR) && !(tas6424->last_warn & TAS6424_WARN_VDD_POR))
|
||||
dev_warn(dev, "experienced a VDD POR condition\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW))
|
||||
dev_warn(dev, "experienced a global overtemp warning\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH1) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH1))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH1\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH2) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH2))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH2\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH3) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH3))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH3\n");
|
||||
|
||||
if ((reg & TAS6424_WARN_VDD_OTW_CH4) && !(tas6424->last_warn & TAS6424_WARN_VDD_OTW_CH4))
|
||||
dev_warn(dev, "experienced an overtemp warning on CH4\n");
|
||||
|
||||
/* Store current warn value so we can detect any changes next time */
|
||||
tas6424->last_warn = reg;
|
||||
|
||||
/* Clear any faults by toggling the CLEAR_FAULT control bit */
|
||||
ret = regmap_write_bits(tas6424->regmap, TAS6424_MISC_CTRL3,
|
||||
TAS6424_CLEAR_FAULT, TAS6424_CLEAR_FAULT);
|
||||
if (ret < 0)
|
||||
dev_err(dev, "failed to write MISC_CTRL3 register: %d\n", ret);
|
||||
|
||||
ret = regmap_write_bits(tas6424->regmap, TAS6424_MISC_CTRL3,
|
||||
TAS6424_CLEAR_FAULT, 0);
|
||||
if (ret < 0)
|
||||
dev_err(dev, "failed to write MISC_CTRL3 register: %d\n", ret);
|
||||
|
||||
out:
|
||||
/* Schedule the next fault check at the specified interval */
|
||||
schedule_delayed_work(&tas6424->fault_check_work,
|
||||
msecs_to_jiffies(TAS6424_FAULT_CHECK_INTERVAL));
|
||||
}
|
||||
|
||||
static const struct reg_default tas6424_reg_defaults[] = {
|
||||
{ TAS6424_MODE_CTRL, 0x00 },
|
||||
{ TAS6424_MISC_CTRL1, 0x32 },
|
||||
{ TAS6424_MISC_CTRL2, 0x62 },
|
||||
{ TAS6424_SAP_CTRL, 0x04 },
|
||||
{ TAS6424_CH_STATE_CTRL, 0x55 },
|
||||
{ TAS6424_CH1_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_CH2_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_CH3_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_CH4_VOL_CTRL, 0xcf },
|
||||
{ TAS6424_DC_DIAG_CTRL1, 0x00 },
|
||||
{ TAS6424_DC_DIAG_CTRL2, 0x11 },
|
||||
{ TAS6424_DC_DIAG_CTRL3, 0x11 },
|
||||
{ TAS6424_PIN_CTRL, 0xff },
|
||||
{ TAS6424_AC_DIAG_CTRL1, 0x00 },
|
||||
{ TAS6424_MISC_CTRL3, 0x00 },
|
||||
{ TAS6424_CLIP_CTRL, 0x01 },
|
||||
{ TAS6424_CLIP_WINDOW, 0x14 },
|
||||
{ TAS6424_CLIP_WARN, 0x00 },
|
||||
{ TAS6424_CBC_STAT, 0x00 },
|
||||
{ TAS6424_MISC_CTRL4, 0x40 },
|
||||
};
|
||||
|
||||
static bool tas6424_is_writable_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case TAS6424_MODE_CTRL:
|
||||
case TAS6424_MISC_CTRL1:
|
||||
case TAS6424_MISC_CTRL2:
|
||||
case TAS6424_SAP_CTRL:
|
||||
case TAS6424_CH_STATE_CTRL:
|
||||
case TAS6424_CH1_VOL_CTRL:
|
||||
case TAS6424_CH2_VOL_CTRL:
|
||||
case TAS6424_CH3_VOL_CTRL:
|
||||
case TAS6424_CH4_VOL_CTRL:
|
||||
case TAS6424_DC_DIAG_CTRL1:
|
||||
case TAS6424_DC_DIAG_CTRL2:
|
||||
case TAS6424_DC_DIAG_CTRL3:
|
||||
case TAS6424_PIN_CTRL:
|
||||
case TAS6424_AC_DIAG_CTRL1:
|
||||
case TAS6424_MISC_CTRL3:
|
||||
case TAS6424_CLIP_CTRL:
|
||||
case TAS6424_CLIP_WINDOW:
|
||||
case TAS6424_CLIP_WARN:
|
||||
case TAS6424_CBC_STAT:
|
||||
case TAS6424_MISC_CTRL4:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool tas6424_is_volatile_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case TAS6424_DC_LOAD_DIAG_REP12:
|
||||
case TAS6424_DC_LOAD_DIAG_REP34:
|
||||
case TAS6424_DC_LOAD_DIAG_REPLO:
|
||||
case TAS6424_CHANNEL_STATE:
|
||||
case TAS6424_CHANNEL_FAULT:
|
||||
case TAS6424_GLOB_FAULT1:
|
||||
case TAS6424_GLOB_FAULT2:
|
||||
case TAS6424_WARN:
|
||||
case TAS6424_AC_LOAD_DIAG_REP1:
|
||||
case TAS6424_AC_LOAD_DIAG_REP2:
|
||||
case TAS6424_AC_LOAD_DIAG_REP3:
|
||||
case TAS6424_AC_LOAD_DIAG_REP4:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct regmap_config tas6424_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
|
||||
.writeable_reg = tas6424_is_writable_reg,
|
||||
.volatile_reg = tas6424_is_volatile_reg,
|
||||
|
||||
.max_register = TAS6424_MAX,
|
||||
.reg_defaults = tas6424_reg_defaults,
|
||||
.num_reg_defaults = ARRAY_SIZE(tas6424_reg_defaults),
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
};
|
||||
|
||||
#if IS_ENABLED(CONFIG_OF)
|
||||
static const struct of_device_id tas6424_of_ids[] = {
|
||||
{ .compatible = "ti,tas6424", },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tas6424_of_ids);
|
||||
#endif
|
||||
|
||||
static int tas6424_i2c_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
struct tas6424_data *tas6424;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
tas6424 = devm_kzalloc(dev, sizeof(*tas6424), GFP_KERNEL);
|
||||
if (!tas6424)
|
||||
return -ENOMEM;
|
||||
dev_set_drvdata(dev, tas6424);
|
||||
|
||||
tas6424->dev = dev;
|
||||
|
||||
tas6424->regmap = devm_regmap_init_i2c(client, &tas6424_regmap_config);
|
||||
if (IS_ERR(tas6424->regmap)) {
|
||||
ret = PTR_ERR(tas6424->regmap);
|
||||
dev_err(dev, "unable to allocate register map: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(tas6424->supplies); i++)
|
||||
tas6424->supplies[i].supply = tas6424_supply_names[i];
|
||||
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret) {
|
||||
dev_err(dev, "unable to request supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret) {
|
||||
dev_err(dev, "unable to enable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Reset device to establish well-defined startup state */
|
||||
ret = regmap_update_bits(tas6424->regmap, TAS6424_MODE_CTRL,
|
||||
TAS6424_RESET, TAS6424_RESET);
|
||||
if (ret) {
|
||||
dev_err(dev, "unable to reset device: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
INIT_DELAYED_WORK(&tas6424->fault_check_work, tas6424_fault_check_work);
|
||||
|
||||
ret = snd_soc_register_codec(dev, &soc_codec_dev_tas6424,
|
||||
tas6424_dai, ARRAY_SIZE(tas6424_dai));
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "unable to register codec: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas6424_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
struct tas6424_data *tas6424 = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
snd_soc_unregister_codec(dev);
|
||||
|
||||
cancel_delayed_work_sync(&tas6424->fault_check_work);
|
||||
|
||||
ret = regulator_bulk_disable(ARRAY_SIZE(tas6424->supplies),
|
||||
tas6424->supplies);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "unable to disable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id tas6424_i2c_ids[] = {
|
||||
{ "tas6424", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, tas6424_i2c_ids);
|
||||
|
||||
static struct i2c_driver tas6424_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "tas6424",
|
||||
.of_match_table = of_match_ptr(tas6424_of_ids),
|
||||
},
|
||||
.probe = tas6424_i2c_probe,
|
||||
.remove = tas6424_i2c_remove,
|
||||
.id_table = tas6424_i2c_ids,
|
||||
};
|
||||
module_i2c_driver(tas6424_i2c_driver);
|
||||
|
||||
MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
|
||||
MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
|
||||
MODULE_DESCRIPTION("TAS6424 Audio amplifier driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
|
||||
*
|
||||
* Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Author: Andreas Dannenberg <dannenberg@ti.com>
|
||||
* Andrew F. Davis <afd@ti.com>
|
||||
*/
|
||||
|
||||
#ifndef __TAS6424_H__
|
||||
#define __TAS6424_H__
|
||||
|
||||
#define TAS6424_RATES (SNDRV_PCM_RATE_44100 | \
|
||||
SNDRV_PCM_RATE_48000 | \
|
||||
SNDRV_PCM_RATE_96000)
|
||||
|
||||
#define TAS6424_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S24_LE)
|
||||
|
||||
/* Register Address Map */
|
||||
#define TAS6424_MODE_CTRL 0x00
|
||||
#define TAS6424_MISC_CTRL1 0x01
|
||||
#define TAS6424_MISC_CTRL2 0x02
|
||||
#define TAS6424_SAP_CTRL 0x03
|
||||
#define TAS6424_CH_STATE_CTRL 0x04
|
||||
#define TAS6424_CH1_VOL_CTRL 0x05
|
||||
#define TAS6424_CH2_VOL_CTRL 0x06
|
||||
#define TAS6424_CH3_VOL_CTRL 0x07
|
||||
#define TAS6424_CH4_VOL_CTRL 0x08
|
||||
#define TAS6424_DC_DIAG_CTRL1 0x09
|
||||
#define TAS6424_DC_DIAG_CTRL2 0x0a
|
||||
#define TAS6424_DC_DIAG_CTRL3 0x0b
|
||||
#define TAS6424_DC_LOAD_DIAG_REP12 0x0c
|
||||
#define TAS6424_DC_LOAD_DIAG_REP34 0x0d
|
||||
#define TAS6424_DC_LOAD_DIAG_REPLO 0x0e
|
||||
#define TAS6424_CHANNEL_STATE 0x0f
|
||||
#define TAS6424_CHANNEL_FAULT 0x10
|
||||
#define TAS6424_GLOB_FAULT1 0x11
|
||||
#define TAS6424_GLOB_FAULT2 0x12
|
||||
#define TAS6424_WARN 0x13
|
||||
#define TAS6424_PIN_CTRL 0x14
|
||||
#define TAS6424_AC_DIAG_CTRL1 0x15
|
||||
#define TAS6424_AC_DIAG_CTRL2 0x16
|
||||
#define TAS6424_AC_LOAD_DIAG_REP1 0x17
|
||||
#define TAS6424_AC_LOAD_DIAG_REP2 0x18
|
||||
#define TAS6424_AC_LOAD_DIAG_REP3 0x19
|
||||
#define TAS6424_AC_LOAD_DIAG_REP4 0x1a
|
||||
#define TAS6424_MISC_CTRL3 0x21
|
||||
#define TAS6424_CLIP_CTRL 0x22
|
||||
#define TAS6424_CLIP_WINDOW 0x23
|
||||
#define TAS6424_CLIP_WARN 0x24
|
||||
#define TAS6424_CBC_STAT 0x25
|
||||
#define TAS6424_MISC_CTRL4 0x26
|
||||
#define TAS6424_MAX TAS6424_MISC_CTRL4
|
||||
|
||||
/* TAS6424_MODE_CTRL_REG */
|
||||
#define TAS6424_RESET BIT(7)
|
||||
|
||||
/* TAS6424_SAP_CTRL_REG */
|
||||
#define TAS6424_SAP_RATE_MASK GENMASK(7, 6)
|
||||
#define TAS6424_SAP_RATE_44100 (0x00 << 6)
|
||||
#define TAS6424_SAP_RATE_48000 (0x01 << 6)
|
||||
#define TAS6424_SAP_RATE_96000 (0x02 << 6)
|
||||
#define TAS6424_SAP_TDM_SLOT_LAST BIT(5)
|
||||
#define TAS6424_SAP_TDM_SLOT_SZ_16 BIT(4)
|
||||
#define TAS6424_SAP_TDM_SLOT_SWAP BIT(3)
|
||||
#define TAS6424_SAP_FMT_MASK GENMASK(2, 0)
|
||||
#define TAS6424_SAP_RIGHTJ_24 (0x00 << 0)
|
||||
#define TAS6424_SAP_RIGHTJ_20 (0x01 << 0)
|
||||
#define TAS6424_SAP_RIGHTJ_18 (0x02 << 0)
|
||||
#define TAS6424_SAP_RIGHTJ_16 (0x03 << 0)
|
||||
#define TAS6424_SAP_I2S (0x04 << 0)
|
||||
#define TAS6424_SAP_LEFTJ (0x05 << 0)
|
||||
#define TAS6424_SAP_DSP (0x06 << 0)
|
||||
|
||||
/* TAS6424_CH_STATE_CTRL_REG */
|
||||
#define TAS6424_CH1_STATE_MASK GENMASK(7, 6)
|
||||
#define TAS6424_CH1_STATE_PLAY (0x00 << 6)
|
||||
#define TAS6424_CH1_STATE_HIZ (0x01 << 6)
|
||||
#define TAS6424_CH1_STATE_MUTE (0x02 << 6)
|
||||
#define TAS6424_CH1_STATE_DIAG (0x03 << 6)
|
||||
#define TAS6424_CH2_STATE_MASK GENMASK(5, 4)
|
||||
#define TAS6424_CH2_STATE_PLAY (0x00 << 4)
|
||||
#define TAS6424_CH2_STATE_HIZ (0x01 << 4)
|
||||
#define TAS6424_CH2_STATE_MUTE (0x02 << 4)
|
||||
#define TAS6424_CH2_STATE_DIAG (0x03 << 4)
|
||||
#define TAS6424_CH3_STATE_MASK GENMASK(3, 2)
|
||||
#define TAS6424_CH3_STATE_PLAY (0x00 << 2)
|
||||
#define TAS6424_CH3_STATE_HIZ (0x01 << 2)
|
||||
#define TAS6424_CH3_STATE_MUTE (0x02 << 2)
|
||||
#define TAS6424_CH3_STATE_DIAG (0x03 << 2)
|
||||
#define TAS6424_CH4_STATE_MASK GENMASK(1, 0)
|
||||
#define TAS6424_CH4_STATE_PLAY (0x00 << 0)
|
||||
#define TAS6424_CH4_STATE_HIZ (0x01 << 0)
|
||||
#define TAS6424_CH4_STATE_MUTE (0x02 << 0)
|
||||
#define TAS6424_CH4_STATE_DIAG (0x03 << 0)
|
||||
#define TAS6424_ALL_STATE_PLAY (TAS6424_CH1_STATE_PLAY | \
|
||||
TAS6424_CH2_STATE_PLAY | \
|
||||
TAS6424_CH3_STATE_PLAY | \
|
||||
TAS6424_CH4_STATE_PLAY)
|
||||
#define TAS6424_ALL_STATE_HIZ (TAS6424_CH1_STATE_HIZ | \
|
||||
TAS6424_CH2_STATE_HIZ | \
|
||||
TAS6424_CH3_STATE_HIZ | \
|
||||
TAS6424_CH4_STATE_HIZ)
|
||||
#define TAS6424_ALL_STATE_MUTE (TAS6424_CH1_STATE_MUTE | \
|
||||
TAS6424_CH2_STATE_MUTE | \
|
||||
TAS6424_CH3_STATE_MUTE | \
|
||||
TAS6424_CH4_STATE_MUTE)
|
||||
#define TAS6424_ALL_STATE_DIAG (TAS6424_CH1_STATE_DIAG | \
|
||||
TAS6424_CH2_STATE_DIAG | \
|
||||
TAS6424_CH3_STATE_DIAG | \
|
||||
TAS6424_CH4_STATE_DIAG)
|
||||
|
||||
/* TAS6424_GLOB_FAULT1_REG */
|
||||
#define TAS6424_FAULT_CLOCK BIT(4)
|
||||
#define TAS6424_FAULT_PVDD_OV BIT(3)
|
||||
#define TAS6424_FAULT_VBAT_OV BIT(2)
|
||||
#define TAS6424_FAULT_PVDD_UV BIT(1)
|
||||
#define TAS6424_FAULT_VBAT_UV BIT(0)
|
||||
|
||||
/* TAS6424_GLOB_FAULT2_REG */
|
||||
#define TAS6424_FAULT_OTSD BIT(4)
|
||||
#define TAS6424_FAULT_OTSD_CH1 BIT(3)
|
||||
#define TAS6424_FAULT_OTSD_CH2 BIT(2)
|
||||
#define TAS6424_FAULT_OTSD_CH3 BIT(1)
|
||||
#define TAS6424_FAULT_OTSD_CH4 BIT(0)
|
||||
|
||||
/* TAS6424_WARN_REG */
|
||||
#define TAS6424_WARN_VDD_UV BIT(6)
|
||||
#define TAS6424_WARN_VDD_POR BIT(5)
|
||||
#define TAS6424_WARN_VDD_OTW BIT(4)
|
||||
#define TAS6424_WARN_VDD_OTW_CH1 BIT(3)
|
||||
#define TAS6424_WARN_VDD_OTW_CH2 BIT(2)
|
||||
#define TAS6424_WARN_VDD_OTW_CH3 BIT(1)
|
||||
#define TAS6424_WARN_VDD_OTW_CH4 BIT(0)
|
||||
|
||||
/* TAS6424_MISC_CTRL3_REG */
|
||||
#define TAS6424_CLEAR_FAULT BIT(7)
|
||||
#define TAS6424_PBTL_CH_SEL BIT(6)
|
||||
#define TAS6424_MASK_CBC_WARN BIT(5)
|
||||
#define TAS6424_MASK_VDD_UV BIT(4)
|
||||
#define TAS6424_OTSD_AUTO_RECOVERY BIT(3)
|
||||
|
||||
#endif /* __TAS6424_H__ */
|
||||
|
|
@ -98,6 +98,8 @@ struct wm2200_priv {
|
|||
|
||||
int rev;
|
||||
int sysclk;
|
||||
|
||||
unsigned int symmetric_rates:1;
|
||||
};
|
||||
|
||||
#define WM2200_DSP_RANGE_BASE (WM2200_MAX_REGISTER + 1)
|
||||
|
|
@ -1550,7 +1552,7 @@ static const struct snd_soc_dapm_route wm2200_dapm_routes[] = {
|
|||
|
||||
static int wm2200_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm2200_priv *wm2200 = dev_get_drvdata(codec->dev);
|
||||
struct wm2200_priv *wm2200 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
wm2200->codec = codec;
|
||||
|
|
@ -1758,7 +1760,7 @@ static int wm2200_hw_params(struct snd_pcm_substream *substream,
|
|||
lrclk = bclk_rates[bclk] / params_rate(params);
|
||||
dev_dbg(codec->dev, "Setting %dHz LRCLK\n", bclk_rates[bclk] / lrclk);
|
||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
|
||||
dai->symmetric_rates)
|
||||
wm2200->symmetric_rates)
|
||||
snd_soc_update_bits(codec, WM2200_AUDIO_IF_1_7,
|
||||
WM2200_AIF1RX_BCPF_MASK, lrclk);
|
||||
else
|
||||
|
|
@ -2059,13 +2061,14 @@ static int wm2200_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
|
|||
static int wm2200_dai_probe(struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm2200_priv *wm2200 = snd_soc_codec_get_drvdata(codec);
|
||||
unsigned int val = 0;
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_read(codec, WM2200_GPIO_CTRL_1);
|
||||
if (ret >= 0) {
|
||||
if ((ret & WM2200_GP1_FN_MASK) != 0) {
|
||||
dai->symmetric_rates = true;
|
||||
wm2200->symmetric_rates = true;
|
||||
val = WM2200_AIF1TX_LRCLK_SRC;
|
||||
}
|
||||
} else {
|
||||
|
|
|
|||
|
|
@ -590,12 +590,28 @@ static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
|
|||
hwrate);
|
||||
}
|
||||
|
||||
|
||||
static unsigned int sun4i_codec_src_rates[] = {
|
||||
8000, 11025, 12000, 16000, 22050, 24000, 32000,
|
||||
44100, 48000, 96000, 192000
|
||||
};
|
||||
|
||||
|
||||
static struct snd_pcm_hw_constraint_list sun4i_codec_constraints = {
|
||||
.count = ARRAY_SIZE(sun4i_codec_src_rates),
|
||||
.list = sun4i_codec_src_rates,
|
||||
};
|
||||
|
||||
|
||||
static int sun4i_codec_startup(struct snd_pcm_substream *substream,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
||||
struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
|
||||
|
||||
snd_pcm_hw_constraint_list(substream->runtime, 0,
|
||||
SNDRV_PCM_HW_PARAM_RATE, &sun4i_codec_constraints);
|
||||
|
||||
/*
|
||||
* Stop issuing DRQ when we have room for less than 16 samples
|
||||
* in our TX FIFO
|
||||
|
|
@ -633,9 +649,7 @@ static struct snd_soc_dai_driver sun4i_codec_dai = {
|
|||
.channels_max = 2,
|
||||
.rate_min = 8000,
|
||||
.rate_max = 192000,
|
||||
.rates = SNDRV_PCM_RATE_8000_48000 |
|
||||
SNDRV_PCM_RATE_96000 |
|
||||
SNDRV_PCM_RATE_192000,
|
||||
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE |
|
||||
SNDRV_PCM_FMTBIT_S32_LE,
|
||||
.sig_bits = 24,
|
||||
|
|
@ -645,11 +659,8 @@ static struct snd_soc_dai_driver sun4i_codec_dai = {
|
|||
.channels_min = 1,
|
||||
.channels_max = 2,
|
||||
.rate_min = 8000,
|
||||
.rate_max = 192000,
|
||||
.rates = SNDRV_PCM_RATE_8000_48000 |
|
||||
SNDRV_PCM_RATE_96000 |
|
||||
SNDRV_PCM_RATE_192000 |
|
||||
SNDRV_PCM_RATE_KNOT,
|
||||
.rate_max = 48000,
|
||||
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE |
|
||||
SNDRV_PCM_FMTBIT_S32_LE,
|
||||
.sig_bits = 24,
|
||||
|
|
@ -1128,7 +1139,7 @@ static const struct snd_soc_component_driver sun4i_codec_component = {
|
|||
.name = "sun4i-codec",
|
||||
};
|
||||
|
||||
#define SUN4I_CODEC_RATES SNDRV_PCM_RATE_8000_192000
|
||||
#define SUN4I_CODEC_RATES SNDRV_PCM_RATE_CONTINUOUS
|
||||
#define SUN4I_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S32_LE)
|
||||
|
||||
|
|
|
|||
|
|
@ -269,10 +269,11 @@ static bool sun4i_i2s_oversample_is_valid(unsigned int oversample)
|
|||
return false;
|
||||
}
|
||||
|
||||
static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
|
||||
static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai,
|
||||
unsigned int rate,
|
||||
unsigned int word_size)
|
||||
{
|
||||
struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai);
|
||||
unsigned int oversample_rate, clk_rate;
|
||||
int bclk_div, mclk_div;
|
||||
int ret;
|
||||
|
|
@ -300,6 +301,7 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
|
|||
break;
|
||||
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported sample rate: %u\n", rate);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -308,18 +310,25 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
|
|||
return ret;
|
||||
|
||||
oversample_rate = i2s->mclk_freq / rate;
|
||||
if (!sun4i_i2s_oversample_is_valid(oversample_rate))
|
||||
if (!sun4i_i2s_oversample_is_valid(oversample_rate)) {
|
||||
dev_err(dai->dev, "Unsupported oversample rate: %d\n",
|
||||
oversample_rate);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
bclk_div = sun4i_i2s_get_bclk_div(i2s, oversample_rate,
|
||||
word_size);
|
||||
if (bclk_div < 0)
|
||||
if (bclk_div < 0) {
|
||||
dev_err(dai->dev, "Unsupported BCLK divider: %d\n", bclk_div);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mclk_div = sun4i_i2s_get_mclk_div(i2s, oversample_rate,
|
||||
clk_rate, rate);
|
||||
if (mclk_div < 0)
|
||||
if (mclk_div < 0) {
|
||||
dev_err(dai->dev, "Unsupported MCLK divider: %d\n", mclk_div);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Adjust the clock division values if needed */
|
||||
bclk_div += i2s->variant->bclk_offset;
|
||||
|
|
@ -349,8 +358,11 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
u32 width;
|
||||
|
||||
channels = params_channels(params);
|
||||
if (channels != 2)
|
||||
if (channels != 2) {
|
||||
dev_err(dai->dev, "Unsupported number of channels: %d\n",
|
||||
channels);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (i2s->variant->has_chcfg) {
|
||||
regmap_update_bits(i2s->regmap, SUN8I_I2S_CHAN_CFG_REG,
|
||||
|
|
@ -382,6 +394,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported physical sample width: %d\n",
|
||||
params_physical_width(params));
|
||||
return -EINVAL;
|
||||
}
|
||||
i2s->playback_dma_data.addr_width = width;
|
||||
|
|
@ -393,6 +407,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
break;
|
||||
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported sample width: %d\n",
|
||||
params_width(params));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -401,7 +417,7 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
regmap_field_write(i2s->field_fmt_sr,
|
||||
sr + i2s->variant->fmt_offset);
|
||||
|
||||
return sun4i_i2s_set_clk_rate(i2s, params_rate(params),
|
||||
return sun4i_i2s_set_clk_rate(dai, params_rate(params),
|
||||
params_width(params));
|
||||
}
|
||||
|
||||
|
|
@ -426,6 +442,8 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
val = SUN4I_I2S_FMT0_FMT_RIGHT_J;
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported format: %d\n",
|
||||
fmt & SND_SOC_DAIFMT_FORMAT_MASK);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -464,6 +482,8 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
case SND_SOC_DAIFMT_NB_NF:
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported clock polarity: %d\n",
|
||||
fmt & SND_SOC_DAIFMT_INV_MASK);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -482,6 +502,8 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
val = SUN4I_I2S_CTRL_MODE_SLAVE;
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported slave setting: %d\n",
|
||||
fmt & SND_SOC_DAIFMT_MASTER_MASK);
|
||||
return -EINVAL;
|
||||
}
|
||||
regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
|
||||
|
|
@ -504,6 +526,8 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
val = 0;
|
||||
break;
|
||||
default:
|
||||
dev_err(dai->dev, "Unsupported slave setting: %d\n",
|
||||
fmt & SND_SOC_DAIFMT_MASTER_MASK);
|
||||
return -EINVAL;
|
||||
}
|
||||
regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
|
||||
|
|
@ -897,6 +921,23 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
|
|||
.field_rxchansel = REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
|
||||
};
|
||||
|
||||
static const struct sun4i_i2s_quirks sun8i_a83t_i2s_quirks = {
|
||||
.has_reset = true,
|
||||
.reg_offset_txdata = SUN8I_I2S_FIFO_TX_REG,
|
||||
.sun4i_i2s_regmap = &sun4i_i2s_regmap_config,
|
||||
.field_clkdiv_mclk_en = REG_FIELD(SUN4I_I2S_CLK_DIV_REG, 7, 7),
|
||||
.field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
|
||||
.field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
|
||||
.field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6),
|
||||
.field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
|
||||
.has_slave_select_bit = true,
|
||||
.field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
|
||||
.field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
|
||||
.field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
|
||||
.field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
|
||||
.field_rxchansel = REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
|
||||
};
|
||||
|
||||
static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = {
|
||||
.has_reset = true,
|
||||
.reg_offset_txdata = SUN8I_I2S_FIFO_TX_REG,
|
||||
|
|
@ -1120,6 +1161,10 @@ static const struct of_device_id sun4i_i2s_match[] = {
|
|||
.compatible = "allwinner,sun6i-a31-i2s",
|
||||
.data = &sun6i_a31_i2s_quirks,
|
||||
},
|
||||
{
|
||||
.compatible = "allwinner,sun8i-a83t-i2s",
|
||||
.data = &sun8i_a83t_i2s_quirks,
|
||||
},
|
||||
{
|
||||
.compatible = "allwinner,sun8i-h3-i2s",
|
||||
.data = &sun8i_h3_i2s_quirks,
|
||||
|
|
|
|||
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