Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6994/1: smp_twd: Fix typo in 'twd_timer_rate' printing ARM: 6987/1: l2x0: fix disabling function to avoid deadlock ARM: 6966/1: ep93xx: fix inverted RTS/DTR signals on uart1 ARM: 6980/1: mmci: use StartBitErr to detect bad connections ARM: 6979/1: mach-vt8500: add forgotten irq_data conversion ARM: move memory layout sanity checking before meminfo initialization ARM: 6990/1: MAINTAINERS: add entry for ARM PMU profiling and debugging ARM: 6989/1: perf: do not start the PMU when no events are present ARM: dmabounce: fix map_single() error return value
This commit is contained in:
Linus Torvalds
Коммит
7fc7693627
10
MAINTAINERS
10
MAINTAINERS
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@ -594,6 +594,16 @@ S: Maintained
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F: arch/arm/lib/floppydma.S
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F: arch/arm/include/asm/floppy.h
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ARM PMU PROFILING AND DEBUGGING
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M: Will Deacon <will.deacon@arm.com>
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S: Maintained
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F: arch/arm/kernel/perf_event*
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F: arch/arm/oprofile/common.c
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F: arch/arm/kernel/pmu.c
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F: arch/arm/include/asm/pmu.h
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F: arch/arm/kernel/hw_breakpoint.c
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F: arch/arm/include/asm/hw_breakpoint.h
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ARM PORT
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M: Russell King <linux@arm.linux.org.uk>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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@ -255,7 +255,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size,
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if (buf == 0) {
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dev_err(dev, "%s: unable to map unsafe buffer %p!\n",
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__func__, ptr);
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return 0;
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return ~0;
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}
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dev_dbg(dev,
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@ -583,7 +583,7 @@ static int armpmu_event_init(struct perf_event *event)
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static void armpmu_enable(struct pmu *pmu)
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{
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/* Enable all of the perf events on hardware. */
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int idx;
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int idx, enabled = 0;
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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if (!armpmu)
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@ -596,9 +596,11 @@ static void armpmu_enable(struct pmu *pmu)
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continue;
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armpmu->enable(&event->hw, idx);
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enabled = 1;
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}
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armpmu->start();
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if (enabled)
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armpmu->start();
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}
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static void armpmu_disable(struct pmu *pmu)
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@ -73,6 +73,7 @@ __setup("fpe=", fpe_setup);
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#endif
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extern void paging_init(struct machine_desc *desc);
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extern void sanity_check_meminfo(void);
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extern void reboot_setup(char *str);
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unsigned int processor_id;
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@ -900,6 +901,7 @@ void __init setup_arch(char **cmdline_p)
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parse_early_param();
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sanity_check_meminfo();
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arm_memblock_init(&meminfo, mdesc);
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paging_init(mdesc);
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@ -115,7 +115,7 @@ static void __cpuinit twd_calibrate_rate(void)
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twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
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printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
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(twd_timer_rate / 1000000) % 100);
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(twd_timer_rate / 10000) % 100);
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}
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}
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@ -251,9 +251,9 @@ static void ep93xx_uart_set_mctrl(struct amba_device *dev,
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unsigned int mcr;
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mcr = 0;
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if (!(mctrl & TIOCM_RTS))
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if (mctrl & TIOCM_RTS)
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mcr |= 2;
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if (!(mctrl & TIOCM_DTR))
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if (mctrl & TIOCM_DTR)
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mcr |= 1;
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__raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
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@ -39,9 +39,10 @@
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static void __iomem *ic_regbase;
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static void __iomem *sic_regbase;
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static void vt8500_irq_mask(unsigned int irq)
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static void vt8500_irq_mask(struct irq_data *d)
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{
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void __iomem *base = ic_regbase;
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unsigned irq = d->irq;
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u8 edge;
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if (irq >= 64) {
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@ -64,9 +65,10 @@ static void vt8500_irq_mask(unsigned int irq)
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}
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}
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static void vt8500_irq_unmask(unsigned int irq)
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static void vt8500_irq_unmask(struct irq_data *d)
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{
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void __iomem *base = ic_regbase;
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unsigned irq = d->irq;
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u8 dctr;
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if (irq >= 64) {
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@ -78,10 +80,11 @@ static void vt8500_irq_unmask(unsigned int irq)
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writeb(dctr, base + VT8500_IC_DCTR + irq);
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}
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static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type)
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static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
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{
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void __iomem *base = ic_regbase;
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unsigned int orig_irq = irq;
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unsigned irq = d->irq;
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unsigned orig_irq = irq;
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u8 dctr;
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if (irq >= 64) {
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@ -114,11 +117,11 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type)
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}
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static struct irq_chip vt8500_irq_chip = {
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.name = "vt8500",
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.ack = vt8500_irq_mask,
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.mask = vt8500_irq_mask,
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.unmask = vt8500_irq_unmask,
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.set_type = vt8500_irq_set_type,
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.name = "vt8500",
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.irq_ack = vt8500_irq_mask,
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.irq_mask = vt8500_irq_mask,
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.irq_unmask = vt8500_irq_unmask,
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.irq_set_type = vt8500_irq_set_type,
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};
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void __init vt8500_init_irq(void)
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@ -120,17 +120,22 @@ static void l2x0_cache_sync(void)
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spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void __l2x0_flush_all(void)
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{
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debug_writel(0x03);
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writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY);
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cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask);
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cache_sync();
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debug_writel(0x00);
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}
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static void l2x0_flush_all(void)
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{
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unsigned long flags;
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/* clean all ways */
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spin_lock_irqsave(&l2x0_lock, flags);
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debug_writel(0x03);
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writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY);
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cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask);
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cache_sync();
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debug_writel(0x00);
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__l2x0_flush_all();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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@ -266,7 +271,9 @@ static void l2x0_disable(void)
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unsigned long flags;
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spin_lock_irqsave(&l2x0_lock, flags);
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writel(0, l2x0_base + L2X0_CTRL);
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__l2x0_flush_all();
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writel_relaxed(0, l2x0_base + L2X0_CTRL);
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dsb();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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@ -759,7 +759,7 @@ early_param("vmalloc", early_vmalloc);
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static phys_addr_t lowmem_limit __initdata = 0;
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static void __init sanity_check_meminfo(void)
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void __init sanity_check_meminfo(void)
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{
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int i, j, highmem = 0;
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@ -1032,8 +1032,9 @@ void __init paging_init(struct machine_desc *mdesc)
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{
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void *zero_page;
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memblock_set_current_limit(lowmem_limit);
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build_mem_type_table();
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sanity_check_meminfo();
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prepare_page_table();
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map_lowmem();
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devicemaps_init(mdesc);
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@ -27,6 +27,10 @@ void __init arm_mm_memblock_reserve(void)
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memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE);
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}
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void __init sanity_check_meminfo(void)
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{
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}
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/*
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* paging_init() sets up the page tables, initialises the zone memory
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* maps, and sets up the zero page, bad page and bad page tables.
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@ -582,6 +582,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
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data->error = -EILSEQ;
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} else if (status & MCI_DATATIMEOUT) {
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data->error = -ETIMEDOUT;
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} else if (status & MCI_STARTBITERR) {
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data->error = -ECOMM;
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} else if (status & MCI_TXUNDERRUN) {
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data->error = -EIO;
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} else if (status & MCI_RXOVERRUN) {
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@ -86,6 +86,7 @@
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#define MCI_CMDRESPEND (1 << 6)
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#define MCI_CMDSENT (1 << 7)
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#define MCI_DATAEND (1 << 8)
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#define MCI_STARTBITERR (1 << 9)
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#define MCI_DATABLOCKEND (1 << 10)
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#define MCI_CMDACTIVE (1 << 11)
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#define MCI_TXACTIVE (1 << 12)
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@ -112,6 +113,7 @@
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#define MCI_CMDRESPENDCLR (1 << 6)
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#define MCI_CMDSENTCLR (1 << 7)
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#define MCI_DATAENDCLR (1 << 8)
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#define MCI_STARTBITERRCLR (1 << 9)
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#define MCI_DATABLOCKENDCLR (1 << 10)
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/* Extended status bits for the ST Micro variants */
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#define MCI_ST_SDIOITC (1 << 22)
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@ -127,6 +129,7 @@
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#define MCI_CMDRESPENDMASK (1 << 6)
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#define MCI_CMDSENTMASK (1 << 7)
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#define MCI_DATAENDMASK (1 << 8)
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#define MCI_STARTBITERRMASK (1 << 9)
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#define MCI_DATABLOCKENDMASK (1 << 10)
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#define MCI_CMDACTIVEMASK (1 << 11)
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#define MCI_TXACTIVEMASK (1 << 12)
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@ -150,7 +153,7 @@
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#define MCI_IRQENABLE \
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(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
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MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
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MCI_CMDRESPENDMASK|MCI_CMDSENTMASK)
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MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK)
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/* These interrupts are directed to IRQ1 when two IRQ lines are available */
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#define MCI_IRQ1MASK \
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