Merge tag 'misc-habanalabs-fixes-2019-03-26' of git://people.freedesktop.org/~gabbayo/linux into char-misc-next:
Oded writes: The following bug fixes are included in this tag: - Fix host crash upon resume after suspend - Fix MMU related bugs which result in user's jobs getting stuck - Fix race between user context cleanup and hard-reset which results in host crash - Fix sparse warning * tag 'misc-habanalabs-fixes-2019-03-26' of git://people.freedesktop.org/~gabbayo/linux: (265 commits) habanalabs: cast to expected type habanalabs: prevent host crash during suspend/resume habanalabs: perform accounting for active CS habanalabs: fix mapping with page size bigger than 4KB habanalabs: complete user context cleanup before hard reset habanalabs: fix bug when mapping very large memory area habanalabs: fix MMU number of pages calculation Linux 5.1-rc2 clocksource/drivers/clps711x: Remove board support ext4: prohibit fstrim in norecovery mode ext4: cleanup bh release code in ext4_ind_remove_space() ext4: brelse all indirect buffer in ext4_ind_remove_space() genirq: Mark expected switch case fall-through clocksource/drivers/riscv: Fix clocksource mask x86/gart: Exclude GART aperture from kcore cifs: update internal module version number SMB3: Fix SMB3.1.1 guest mounts to Samba cifs: Fix slab-out-of-bounds when tracing SMB tcon cifs: allow guest mounts to work for smb3.11 fix incorrect error code mapping for OBJECTID_NOT_FOUND ...
This commit is contained in:
Коммит
80045e1442
|
@ -16,6 +16,7 @@ Required properties:
|
|||
- "renesas,irqc-r8a7793" (R-Car M2-N)
|
||||
- "renesas,irqc-r8a7794" (R-Car E2)
|
||||
- "renesas,intc-ex-r8a774a1" (RZ/G2M)
|
||||
- "renesas,intc-ex-r8a774c0" (RZ/G2E)
|
||||
- "renesas,intc-ex-r8a7795" (R-Car H3)
|
||||
- "renesas,intc-ex-r8a7796" (R-Car M3-W)
|
||||
- "renesas,intc-ex-r8a77965" (R-Car M3-N)
|
||||
|
|
10
MAINTAINERS
10
MAINTAINERS
|
@ -8096,6 +8096,16 @@ F: include/linux/iommu.h
|
|||
F: include/linux/of_iommu.h
|
||||
F: include/linux/iova.h
|
||||
|
||||
IO_URING
|
||||
M: Jens Axboe <axboe@kernel.dk>
|
||||
L: linux-block@vger.kernel.org
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
T: git git://git.kernel.dk/linux-block
|
||||
T: git git://git.kernel.dk/liburing
|
||||
S: Maintained
|
||||
F: fs/io_uring.c
|
||||
F: include/uapi/linux/io_uring.h
|
||||
|
||||
IP MASQUERADING
|
||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||
S: Maintained
|
||||
|
|
2
Makefile
2
Makefile
|
@ -2,7 +2,7 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 1
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc2
|
||||
NAME = Shy Crocodile
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -144,11 +144,11 @@ config ARC_CPU_770
|
|||
Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
|
||||
This core has a bunch of cool new features:
|
||||
-MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
|
||||
Shared Address Spaces (for sharing TLB entries in MMU)
|
||||
Shared Address Spaces (for sharing TLB entries in MMU)
|
||||
-Caches: New Prog Model, Region Flush
|
||||
-Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
|
||||
|
||||
endif #ISA_ARCOMPACT
|
||||
endif #ISA_ARCOMPACT
|
||||
|
||||
config ARC_CPU_HS
|
||||
bool "ARC-HS"
|
||||
|
@ -198,7 +198,7 @@ config ARC_SMP_HALT_ON_RESET
|
|||
at designated entry point. For other case, all jump to common
|
||||
entry point and spin wait for Master's signal.
|
||||
|
||||
endif #SMP
|
||||
endif #SMP
|
||||
|
||||
config ARC_MCIP
|
||||
bool "ARConnect Multicore IP (MCIP) Support "
|
||||
|
@ -249,7 +249,7 @@ config ARC_CACHE_VIPT_ALIASING
|
|||
bool "Support VIPT Aliasing D$"
|
||||
depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
|
||||
|
||||
endif #ARC_CACHE
|
||||
endif #ARC_CACHE
|
||||
|
||||
config ARC_HAS_ICCM
|
||||
bool "Use ICCM"
|
||||
|
@ -370,7 +370,7 @@ config ARC_FPU_SAVE_RESTORE
|
|||
based on actual usage of FPU by a task. Thus our implemn does
|
||||
this for all tasks in system.
|
||||
|
||||
endif #ISA_ARCOMPACT
|
||||
endif #ISA_ARCOMPACT
|
||||
|
||||
config ARC_CANT_LLSC
|
||||
def_bool n
|
||||
|
@ -386,6 +386,15 @@ config ARC_HAS_SWAPE
|
|||
|
||||
if ISA_ARCV2
|
||||
|
||||
config ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
bool "Enable unaligned access in HW"
|
||||
default y
|
||||
select HAVE_EFFICIENT_UNALIGNED_ACCESS
|
||||
help
|
||||
The ARC HS architecture supports unaligned memory access
|
||||
which is disabled by default. Enable unaligned access in
|
||||
hardware and use software to use it
|
||||
|
||||
config ARC_HAS_LL64
|
||||
bool "Insn: 64bit LDD/STD"
|
||||
help
|
||||
|
@ -414,7 +423,7 @@ config ARC_IRQ_NO_AUTOSAVE
|
|||
This is programmable and can be optionally disabled in which case
|
||||
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
|
||||
|
||||
endif # ISA_ARCV2
|
||||
endif # ISA_ARCV2
|
||||
|
||||
endmenu # "ARC CPU Configuration"
|
||||
|
||||
|
|
|
@ -28,6 +28,12 @@ cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
|
|||
|
||||
ifdef CONFIG_ISA_ARCV2
|
||||
|
||||
ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
cflags-y += -munaligned-access
|
||||
else
|
||||
cflags-y += -mno-unaligned-access
|
||||
endif
|
||||
|
||||
ifndef CONFIG_ARC_HAS_LL64
|
||||
cflags-y += -mno-ll64
|
||||
endif
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
clock-div = <6>;
|
||||
};
|
||||
|
||||
iomux: iomux@FF10601c {
|
||||
iomux: iomux@ff10601c {
|
||||
/* Port 1 */
|
||||
pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
|
||||
abilis,function = "mis0";
|
||||
|
@ -162,182 +162,182 @@
|
|||
};
|
||||
};
|
||||
|
||||
gpioa: gpio@FF140000 {
|
||||
gpioa: gpio@ff140000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF140000 0x1000>;
|
||||
reg = <0xff140000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioa";
|
||||
};
|
||||
gpiob: gpio@FF141000 {
|
||||
gpiob: gpio@ff141000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF141000 0x1000>;
|
||||
reg = <0xff141000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiob";
|
||||
};
|
||||
gpioc: gpio@FF142000 {
|
||||
gpioc: gpio@ff142000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF142000 0x1000>;
|
||||
reg = <0xff142000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioc";
|
||||
};
|
||||
gpiod: gpio@FF143000 {
|
||||
gpiod: gpio@ff143000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF143000 0x1000>;
|
||||
reg = <0xff143000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiod";
|
||||
};
|
||||
gpioe: gpio@FF144000 {
|
||||
gpioe: gpio@ff144000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF144000 0x1000>;
|
||||
reg = <0xff144000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioe";
|
||||
};
|
||||
gpiof: gpio@FF145000 {
|
||||
gpiof: gpio@ff145000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF145000 0x1000>;
|
||||
reg = <0xff145000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiof";
|
||||
};
|
||||
gpiog: gpio@FF146000 {
|
||||
gpiog: gpio@ff146000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF146000 0x1000>;
|
||||
reg = <0xff146000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiog";
|
||||
};
|
||||
gpioh: gpio@FF147000 {
|
||||
gpioh: gpio@ff147000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF147000 0x1000>;
|
||||
reg = <0xff147000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioh";
|
||||
};
|
||||
gpioi: gpio@FF148000 {
|
||||
gpioi: gpio@ff148000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF148000 0x1000>;
|
||||
reg = <0xff148000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <12>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioi";
|
||||
};
|
||||
gpioj: gpio@FF149000 {
|
||||
gpioj: gpio@ff149000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF149000 0x1000>;
|
||||
reg = <0xff149000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <32>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioj";
|
||||
};
|
||||
gpiok: gpio@FF14a000 {
|
||||
gpiok: gpio@ff14a000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14A000 0x1000>;
|
||||
reg = <0xff14a000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <22>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiok";
|
||||
};
|
||||
gpiol: gpio@FF14b000 {
|
||||
gpiol: gpio@ff14b000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14B000 0x1000>;
|
||||
reg = <0xff14b000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiol";
|
||||
};
|
||||
gpiom: gpio@FF14c000 {
|
||||
gpiom: gpio@ff14c000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14C000 0x1000>;
|
||||
reg = <0xff14c000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiom";
|
||||
};
|
||||
gpion: gpio@FF14d000 {
|
||||
gpion: gpio@ff14d000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14D000 0x1000>;
|
||||
reg = <0xff14d000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <5>;
|
||||
|
|
|
@ -37,27 +37,27 @@
|
|||
};
|
||||
|
||||
soc100 {
|
||||
uart@FF100000 {
|
||||
uart@ff100000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pctl_uart0>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
ethernet@fe100000 {
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
i2c0: i2c@FF120000 {
|
||||
i2c0: i2c@ff120000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c1: i2c@FF121000 {
|
||||
i2c1: i2c@ff121000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c2: i2c@FF122000 {
|
||||
i2c2: i2c@ff122000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c3: i2c@FF123000 {
|
||||
i2c3: i2c@ff123000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c4: i2c@FF124000 {
|
||||
i2c4: i2c@ff124000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
clock-div = <6>;
|
||||
};
|
||||
|
||||
iomux: iomux@FF10601c {
|
||||
iomux: iomux@ff10601c {
|
||||
/* Port 1 */
|
||||
pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
|
||||
abilis,function = "mis0";
|
||||
|
@ -171,182 +171,182 @@
|
|||
};
|
||||
};
|
||||
|
||||
gpioa: gpio@FF140000 {
|
||||
gpioa: gpio@ff140000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF140000 0x1000>;
|
||||
reg = <0xff140000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioa";
|
||||
};
|
||||
gpiob: gpio@FF141000 {
|
||||
gpiob: gpio@ff141000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF141000 0x1000>;
|
||||
reg = <0xff141000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiob";
|
||||
};
|
||||
gpioc: gpio@FF142000 {
|
||||
gpioc: gpio@ff142000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF142000 0x1000>;
|
||||
reg = <0xff142000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioc";
|
||||
};
|
||||
gpiod: gpio@FF143000 {
|
||||
gpiod: gpio@ff143000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF143000 0x1000>;
|
||||
reg = <0xff143000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiod";
|
||||
};
|
||||
gpioe: gpio@FF144000 {
|
||||
gpioe: gpio@ff144000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF144000 0x1000>;
|
||||
reg = <0xff144000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioe";
|
||||
};
|
||||
gpiof: gpio@FF145000 {
|
||||
gpiof: gpio@ff145000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF145000 0x1000>;
|
||||
reg = <0xff145000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiof";
|
||||
};
|
||||
gpiog: gpio@FF146000 {
|
||||
gpiog: gpio@ff146000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF146000 0x1000>;
|
||||
reg = <0xff146000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiog";
|
||||
};
|
||||
gpioh: gpio@FF147000 {
|
||||
gpioh: gpio@ff147000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF147000 0x1000>;
|
||||
reg = <0xff147000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioh";
|
||||
};
|
||||
gpioi: gpio@FF148000 {
|
||||
gpioi: gpio@ff148000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF148000 0x1000>;
|
||||
reg = <0xff148000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <12>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioi";
|
||||
};
|
||||
gpioj: gpio@FF149000 {
|
||||
gpioj: gpio@ff149000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF149000 0x1000>;
|
||||
reg = <0xff149000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <32>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioj";
|
||||
};
|
||||
gpiok: gpio@FF14a000 {
|
||||
gpiok: gpio@ff14a000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14A000 0x1000>;
|
||||
reg = <0xff14a000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <22>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiok";
|
||||
};
|
||||
gpiol: gpio@FF14b000 {
|
||||
gpiol: gpio@ff14b000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14B000 0x1000>;
|
||||
reg = <0xff14b000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiol";
|
||||
};
|
||||
gpiom: gpio@FF14c000 {
|
||||
gpiom: gpio@ff14c000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14C000 0x1000>;
|
||||
reg = <0xff14c000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiom";
|
||||
};
|
||||
gpion: gpio@FF14d000 {
|
||||
gpion: gpio@ff14d000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14D000 0x1000>;
|
||||
reg = <0xff14d000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <5>;
|
||||
|
|
|
@ -37,27 +37,27 @@
|
|||
};
|
||||
|
||||
soc100 {
|
||||
uart@FF100000 {
|
||||
uart@ff100000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pctl_uart0>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
ethernet@fe100000 {
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
i2c0: i2c@FF120000 {
|
||||
i2c0: i2c@ff120000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c1: i2c@FF121000 {
|
||||
i2c1: i2c@ff121000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c2: i2c@FF122000 {
|
||||
i2c2: i2c@ff122000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c3: i2c@FF123000 {
|
||||
i2c3: i2c@ff123000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c4: i2c@FF124000 {
|
||||
i2c4: i2c@ff124000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
|
||||
|
|
|
@ -54,7 +54,7 @@
|
|||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
ranges = <0xfe000000 0xfe000000 0x02000000
|
||||
0x000F0000 0x000F0000 0x00010000>;
|
||||
0x000f0000 0x000f0000 0x00010000>;
|
||||
compatible = "abilis,tb10x", "simple-bus";
|
||||
|
||||
pll0: oscillator {
|
||||
|
@ -75,10 +75,10 @@
|
|||
clock-output-names = "ahb_clk";
|
||||
};
|
||||
|
||||
iomux: iomux@FF10601c {
|
||||
iomux: iomux@ff10601c {
|
||||
compatible = "abilis,tb10x-iomux";
|
||||
#gpio-range-cells = <3>;
|
||||
reg = <0xFF10601c 0x4>;
|
||||
reg = <0xff10601c 0x4>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
@ -88,7 +88,7 @@
|
|||
};
|
||||
tb10x_ictl: pic@fe002000 {
|
||||
compatible = "abilis,tb10x-ictl";
|
||||
reg = <0xFE002000 0x20>;
|
||||
reg = <0xfe002000 0x20>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
@ -96,27 +96,27 @@
|
|||
20 21 22 23 24 25 26 27 28 29 30 31>;
|
||||
};
|
||||
|
||||
uart@FF100000 {
|
||||
uart@ff100000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xFF100000 0x100>;
|
||||
reg = <0xff100000 0x100>;
|
||||
clock-frequency = <166666666>;
|
||||
interrupts = <25 8>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
ethernet@fe100000 {
|
||||
compatible = "snps,dwmac-3.70a","snps,dwmac";
|
||||
reg = <0xFE100000 0x1058>;
|
||||
reg = <0xfe100000 0x1058>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <6 8>;
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&ahb_clk>;
|
||||
clock-names = "stmmaceth";
|
||||
};
|
||||
dma@FE000000 {
|
||||
dma@fe000000 {
|
||||
compatible = "snps,dma-spear1340";
|
||||
reg = <0xFE000000 0x400>;
|
||||
reg = <0xfe000000 0x400>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <14 8>;
|
||||
dma-channels = <6>;
|
||||
|
@ -132,70 +132,70 @@
|
|||
multi-block = <1 1 1 1 1 1>;
|
||||
};
|
||||
|
||||
i2c0: i2c@FF120000 {
|
||||
i2c0: i2c@ff120000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF120000 0x1000>;
|
||||
reg = <0xff120000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c1: i2c@FF121000 {
|
||||
i2c1: i2c@ff121000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF121000 0x1000>;
|
||||
reg = <0xff121000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c2: i2c@FF122000 {
|
||||
i2c2: i2c@ff122000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF122000 0x1000>;
|
||||
reg = <0xff122000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c3: i2c@FF123000 {
|
||||
i2c3: i2c@ff123000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF123000 0x1000>;
|
||||
reg = <0xff123000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c4: i2c@FF124000 {
|
||||
i2c4: i2c@ff124000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF124000 0x1000>;
|
||||
reg = <0xff124000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
|
||||
spi0: spi@0xFE010000 {
|
||||
spi0: spi@fe010000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "abilis,tb100-spi";
|
||||
num-cs = <1>;
|
||||
reg = <0xFE010000 0x20>;
|
||||
reg = <0xfe010000 0x20>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <26 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
spi1: spi@0xFE011000 {
|
||||
spi1: spi@fe011000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "abilis,tb100-spi";
|
||||
num-cs = <2>;
|
||||
reg = <0xFE011000 0x20>;
|
||||
reg = <0xfe011000 0x20>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <10 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
|
@ -226,23 +226,23 @@
|
|||
interrupts = <20 2>, <19 2>;
|
||||
interrupt-names = "cmd_irq", "event_irq";
|
||||
};
|
||||
tb10x_mdsc0: tb10x-mdscr@FF300000 {
|
||||
tb10x_mdsc0: tb10x-mdscr@ff300000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF300000 0x7000>;
|
||||
reg = <0xff300000 0x7000>;
|
||||
tb100-mdscr-manage-tsin;
|
||||
};
|
||||
tb10x_mscr0: tb10x-mdscr@FF307000 {
|
||||
tb10x_mscr0: tb10x-mdscr@ff307000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF307000 0x7000>;
|
||||
reg = <0xff307000 0x7000>;
|
||||
};
|
||||
tb10x_scr0: tb10x-mdscr@ff30e000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF30e000 0x4000>;
|
||||
reg = <0xff30e000 0x4000>;
|
||||
tb100-mdscr-manage-tsin;
|
||||
};
|
||||
tb10x_scr1: tb10x-mdscr@ff312000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF312000 0x4000>;
|
||||
reg = <0xff312000 0x4000>;
|
||||
tb100-mdscr-manage-tsin;
|
||||
};
|
||||
tb10x_wfb: tb10x-wfb@ff319000 {
|
||||
|
|
|
@ -41,7 +41,7 @@
|
|||
* this GPIO block ORs all interrupts on CPU card (creg,..)
|
||||
* to uplink only 1 IRQ to ARC core intc
|
||||
*/
|
||||
dw-apb-gpio@0x2000 {
|
||||
dw-apb-gpio@2000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = < 0x2000 0x80 >;
|
||||
#address-cells = <1>;
|
||||
|
@ -60,7 +60,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <33333000>;
|
||||
|
@ -88,7 +88,7 @@
|
|||
* avoid duplicating the MB dtsi file given that IRQ from
|
||||
* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
|
|
|
@ -55,7 +55,7 @@
|
|||
* this GPIO block ORs all interrupts on CPU card (creg,..)
|
||||
* to uplink only 1 IRQ to ARC core intc
|
||||
*/
|
||||
dw-apb-gpio@0x2000 {
|
||||
dw-apb-gpio@2000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = < 0x2000 0x80 >;
|
||||
#address-cells = <1>;
|
||||
|
@ -74,7 +74,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <33333000>;
|
||||
|
@ -102,19 +102,19 @@
|
|||
* external DMA buffer located outside of IOC aperture.
|
||||
*/
|
||||
axs10x_mb {
|
||||
ethernet@0x18000 {
|
||||
ethernet@18000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
ohci@60000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
@ -132,7 +132,7 @@
|
|||
* avoid duplicating the MB dtsi file given that IRQ from
|
||||
* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
|
@ -153,7 +153,7 @@
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xAz).
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xaz).
|
||||
*/
|
||||
frame_buffer: frame_buffer@be000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
|
|
|
@ -62,7 +62,7 @@
|
|||
* this GPIO block ORs all interrupts on CPU card (creg,..)
|
||||
* to uplink only 1 IRQ to ARC core intc
|
||||
*/
|
||||
dw-apb-gpio@0x2000 {
|
||||
dw-apb-gpio@2000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = < 0x2000 0x80 >;
|
||||
#address-cells = <1>;
|
||||
|
@ -81,7 +81,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <33333000>;
|
||||
|
@ -109,19 +109,19 @@
|
|||
* external DMA buffer located outside of IOC aperture.
|
||||
*/
|
||||
axs10x_mb {
|
||||
ethernet@0x18000 {
|
||||
ethernet@18000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
ohci@60000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
@ -138,7 +138,7 @@
|
|||
* avoid duplicating the MB dtsi file given that IRQ from
|
||||
* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
|
@ -159,7 +159,7 @@
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xAz).
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xaz).
|
||||
*/
|
||||
frame_buffer: frame_buffer@be000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
|
|
|
@ -72,7 +72,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
gmac: ethernet@0x18000 {
|
||||
gmac: ethernet@18000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = < 0x18000 0x2000 >;
|
||||
|
@ -88,13 +88,13 @@
|
|||
mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = < 0x40000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
ohci@60000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = < 0x60000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
|
@ -118,7 +118,7 @@
|
|||
* dw_mci_pltfm_prepare_command() is used in generic platform
|
||||
* code.
|
||||
*/
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
compatible = "altr,socfpga-dw-mshc";
|
||||
reg = < 0x15000 0x400 >;
|
||||
fifo-depth = < 16 >;
|
||||
|
@ -129,7 +129,7 @@
|
|||
bus-width = < 4 >;
|
||||
};
|
||||
|
||||
uart@0x20000 {
|
||||
uart@20000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x20000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
|
@ -139,7 +139,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x21000 {
|
||||
uart@21000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x21000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
|
@ -150,7 +150,7 @@
|
|||
};
|
||||
|
||||
/* UART muxed with USB data port (ttyS3) */
|
||||
uart@0x22000 {
|
||||
uart@22000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x22000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
|
@ -160,7 +160,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
i2c@0x1d000 {
|
||||
i2c@1d000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0x1d000 0x100>;
|
||||
clock-frequency = <400000>;
|
||||
|
@ -177,7 +177,7 @@
|
|||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
i2c@0x1f000 {
|
||||
i2c@1f000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -218,13 +218,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
eeprom@0x54{
|
||||
eeprom@54{
|
||||
compatible = "atmel,24c01";
|
||||
reg = <0x54>;
|
||||
pagesize = <0x8>;
|
||||
};
|
||||
|
||||
eeprom@0x57{
|
||||
eeprom@57{
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x57>;
|
||||
pagesize = <0x8>;
|
||||
|
|
|
@ -110,12 +110,12 @@
|
|||
cgu_rst: reset-controller@8a0 {
|
||||
compatible = "snps,hsdk-reset";
|
||||
#reset-cells = <1>;
|
||||
reg = <0x8A0 0x4>, <0xFF0 0x4>;
|
||||
reg = <0x8a0 0x4>, <0xff0 0x4>;
|
||||
};
|
||||
|
||||
core_clk: core-clk@0 {
|
||||
compatible = "snps,hsdk-core-pll-clock";
|
||||
reg = <0x00 0x10>, <0x14B8 0x4>;
|
||||
reg = <0x00 0x10>, <0x14b8 0x4>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&input_clk>;
|
||||
|
||||
|
@ -167,6 +167,18 @@
|
|||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
dmac_core_clk: dmac-core-clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <400000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
dmac_cfg_clk: dmac-gpu-cfg-clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <200000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
gmac: ethernet@8000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
|
@ -200,6 +212,7 @@
|
|||
compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
|
||||
reg = <0x60000 0x100>;
|
||||
interrupts = <15>;
|
||||
resets = <&cgu_rst HSDK_USB_RESET>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
|
@ -207,6 +220,7 @@
|
|||
compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
|
||||
reg = <0x40000 0x100>;
|
||||
interrupts = <15>;
|
||||
resets = <&cgu_rst HSDK_USB_RESET>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
|
@ -237,6 +251,21 @@
|
|||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
dmac: dmac@80000 {
|
||||
compatible = "snps,axi-dma-1.01a";
|
||||
reg = <0x80000 0x400>;
|
||||
interrupts = <27>;
|
||||
clocks = <&dmac_core_clk>, <&dmac_cfg_clk>;
|
||||
clock-names = "core-clk", "cfgr-clk";
|
||||
|
||||
dma-channels = <4>;
|
||||
snps,dma-masters = <2>;
|
||||
snps,data-width = <3>;
|
||||
snps,block-size = <4096 4096 4096 4096>;
|
||||
snps,priority = <0 1 2 3>;
|
||||
snps,axi-max-burst-len = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
@ -49,7 +49,7 @@
|
|||
|
||||
};
|
||||
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
@ -57,7 +57,7 @@
|
|||
|
||||
};
|
||||
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
ethernet@0x18000 {
|
||||
ethernet@18000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = < 0x18000 0x2000 >;
|
||||
|
@ -49,13 +49,13 @@
|
|||
clock-names = "stmmaceth";
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = < 0x40000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
};
|
||||
|
||||
uart@0x20000 {
|
||||
uart@20000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x20000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
@ -65,7 +65,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x21000 {
|
||||
uart@21000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x21000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
@ -75,7 +75,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x22000 {
|
||||
uart@22000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x22000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
@ -101,7 +101,7 @@
|
|||
interrupt-names = "arc_ps2_irq";
|
||||
};
|
||||
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
compatible = "snps,dw-mshc";
|
||||
reg = <0x15000 0x400>;
|
||||
fifo-depth = <1024>;
|
||||
|
@ -117,11 +117,11 @@
|
|||
* Embedded Vision subsystem UIO mappings; only relevant for EV VDK
|
||||
*
|
||||
* This node is intentionally put outside of MB above becase
|
||||
* it maps areas outside of MB's 0xEz-0xFz.
|
||||
* it maps areas outside of MB's 0xez-0xfz.
|
||||
*/
|
||||
uio_ev: uio@0xD0000000 {
|
||||
uio_ev: uio@d0000000 {
|
||||
compatible = "generic-uio";
|
||||
reg = <0xD0000000 0x2000 0xD1000000 0x2000 0x90000000 0x10000000 0xC0000000 0x10000000>;
|
||||
reg = <0xd0000000 0x2000 0xd1000000 0x2000 0x90000000 0x10000000 0xc0000000 0x10000000>;
|
||||
reg-names = "ev_gsa", "ev_ctrl", "ev_shared_mem", "ev_code_mem";
|
||||
interrupt-parent = <&mb_intc>;
|
||||
interrupts = <23>;
|
||||
|
|
|
@ -8,6 +8,7 @@ CONFIG_NAMESPACES=y
|
|||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
|
|
|
@ -82,6 +82,7 @@
|
|||
#define ECR_V_DTLB_MISS 0x05
|
||||
#define ECR_V_PROTV 0x06
|
||||
#define ECR_V_TRAP 0x09
|
||||
#define ECR_V_MISALIGN 0x0d
|
||||
#endif
|
||||
|
||||
/* DTLB Miss and Protection Violation Cause Codes */
|
||||
|
@ -167,14 +168,6 @@ struct bcr_mpy {
|
|||
#endif
|
||||
};
|
||||
|
||||
struct bcr_extn_xymem {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int ram_org:2, num_banks:4, bank_sz:4, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, bank_sz:4, num_banks:4, ram_org:2;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct bcr_iccm_arcompact {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int base:16, pad:5, sz:3, ver:8;
|
||||
|
@ -312,7 +305,7 @@ struct cpuinfo_arc {
|
|||
struct cpuinfo_arc_bpu bpu;
|
||||
struct bcr_identity core;
|
||||
struct bcr_isa_arcv2 isa;
|
||||
const char *details, *name;
|
||||
const char *release, *name;
|
||||
unsigned int vec_base;
|
||||
struct cpuinfo_arc_ccm iccm, dccm;
|
||||
struct {
|
||||
|
@ -322,7 +315,6 @@ struct cpuinfo_arc {
|
|||
timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
|
||||
} extn;
|
||||
struct bcr_mpy extn_mpy;
|
||||
struct bcr_extn_xymem extn_xymem;
|
||||
};
|
||||
|
||||
extern struct cpuinfo_arc cpuinfo_arc700[];
|
||||
|
|
|
@ -44,7 +44,13 @@
|
|||
#define ARCV2_IRQ_DEF_PRIO 1
|
||||
|
||||
/* seed value for status register */
|
||||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
|
||||
#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
#define __AD_ENB STATUS_AD_MASK
|
||||
#else
|
||||
#define __AD_ENB 0
|
||||
#endif
|
||||
|
||||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | __AD_ENB | \
|
||||
(ARCV2_IRQ_DEF_PRIO << 1))
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
@ -105,10 +105,10 @@ static const char * const arc_pmu_ev_hw_map[] = {
|
|||
[PERF_COUNT_HW_INSTRUCTIONS] = "iall",
|
||||
/* All jump instructions that are taken */
|
||||
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmptak",
|
||||
[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
[PERF_COUNT_HW_BRANCH_MISSES] = "bpmp",
|
||||
#else
|
||||
[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
|
||||
[PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", /* NP-T, PT-NT, PNT-T */
|
||||
#endif
|
||||
[PERF_COUNT_ARC_LDC] = "imemrdc", /* Instr: mem read cached */
|
||||
|
|
|
@ -21,8 +21,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
{
|
||||
unsigned int val;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[slock]] \n"
|
||||
" breq %[val], %[LOCKED], 1b \n" /* spin while LOCKED */
|
||||
|
@ -34,6 +32,14 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
|
||||
: "memory", "cc");
|
||||
|
||||
/*
|
||||
* ACQUIRE barrier to ensure load/store after taking the lock
|
||||
* don't "bleed-up" out of the critical section (leak-in is allowed)
|
||||
* http://www.spinics.net/lists/kernel/msg2010409.html
|
||||
*
|
||||
* ARCv2 only has load-load, store-store and all-all barrier
|
||||
* thus need the full all-all barrier
|
||||
*/
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
|
@ -42,8 +48,6 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
|||
{
|
||||
unsigned int val, got_it = 0;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[slock]] \n"
|
||||
" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
|
||||
|
@ -67,9 +71,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
|||
{
|
||||
smp_mb();
|
||||
|
||||
lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||
|
||||
smp_mb();
|
||||
WRITE_ONCE(lock->slock, __ARCH_SPIN_LOCK_UNLOCKED__);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -81,8 +83,6 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val;
|
||||
|
||||
smp_mb();
|
||||
|
||||
/*
|
||||
* zero means writer holds the lock exclusively, deny Reader.
|
||||
* Otherwise grant lock to first/subseq reader
|
||||
|
@ -113,8 +113,6 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val, got_it = 0;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[rwlock]] \n"
|
||||
" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
|
||||
|
@ -140,8 +138,6 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val;
|
||||
|
||||
smp_mb();
|
||||
|
||||
/*
|
||||
* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
|
||||
* deny writer. Otherwise if unlocked grant to writer
|
||||
|
@ -175,8 +171,6 @@ static inline int arch_write_trylock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val, got_it = 0;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[rwlock]] \n"
|
||||
" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
|
||||
|
@ -217,17 +211,13 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
|
|||
: [val] "=&r" (val)
|
||||
: [rwlock] "r" (&(rw->counter))
|
||||
: "memory", "cc");
|
||||
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
static inline void arch_write_unlock(arch_rwlock_t *rw)
|
||||
{
|
||||
smp_mb();
|
||||
|
||||
rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
|
||||
|
||||
smp_mb();
|
||||
WRITE_ONCE(rw->counter, __ARCH_RW_LOCK_UNLOCKED__);
|
||||
}
|
||||
|
||||
#else /* !CONFIG_ARC_HAS_LLSC */
|
||||
|
@ -237,10 +227,9 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
|
||||
|
||||
/*
|
||||
* This smp_mb() is technically superfluous, we only need the one
|
||||
* after the lock for providing the ACQUIRE semantics.
|
||||
* However doing the "right" thing was regressing hackbench
|
||||
* so keeping this, pending further investigation
|
||||
* Per lkmm, smp_mb() is only required after _lock (and before_unlock)
|
||||
* for ACQ and REL semantics respectively. However EX based spinlocks
|
||||
* need the extra smp_mb to workaround a hardware quirk.
|
||||
*/
|
||||
smp_mb();
|
||||
|
||||
|
@ -257,14 +246,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
#endif
|
||||
: "memory");
|
||||
|
||||
/*
|
||||
* ACQUIRE barrier to ensure load/store after taking the lock
|
||||
* don't "bleed-up" out of the critical section (leak-in is allowed)
|
||||
* http://www.spinics.net/lists/kernel/msg2010409.html
|
||||
*
|
||||
* ARCv2 only has load-load, store-store and all-all barrier
|
||||
* thus need the full all-all barrier
|
||||
*/
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
|
@ -309,8 +290,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
|||
: "memory");
|
||||
|
||||
/*
|
||||
* superfluous, but keeping for now - see pairing version in
|
||||
* arch_spin_lock above
|
||||
* see pairing version/comment in arch_spin_lock above
|
||||
*/
|
||||
smp_mb();
|
||||
}
|
||||
|
@ -344,7 +324,6 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
|
|||
arch_spin_unlock(&(rw->lock_mutex));
|
||||
local_irq_restore(flags);
|
||||
|
||||
smp_mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -54,7 +54,12 @@
|
|||
; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
|
||||
; by default
|
||||
lr r5, [status32]
|
||||
#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
bset r5, r5, STATUS_AD_BIT
|
||||
#else
|
||||
; Although disabled at reset, bootloader might have enabled it
|
||||
bclr r5, r5, STATUS_AD_BIT
|
||||
#endif
|
||||
kflag r5
|
||||
#endif
|
||||
.endm
|
||||
|
@ -106,6 +111,7 @@ ENTRY(stext)
|
|||
; r2 = pointer to uboot provided cmdline or external DTB in mem
|
||||
; These are handled later in handle_uboot_args()
|
||||
st r0, [@uboot_tag]
|
||||
st r1, [@uboot_magic]
|
||||
st r2, [@uboot_arg]
|
||||
|
||||
; setup "current" tsk and optionally cache it in dedicated r25
|
||||
|
|
|
@ -95,7 +95,7 @@ void arc_init_IRQ(void)
|
|||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
tmp = read_aux_reg(ARC_REG_STATUS32);
|
||||
tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
|
||||
tmp |= ARCV2_IRQ_DEF_PRIO << 1;
|
||||
tmp &= ~STATUS_IE_MASK;
|
||||
asm volatile("kflag %0 \n"::"r"(tmp));
|
||||
}
|
||||
|
|
|
@ -36,6 +36,7 @@ unsigned int intr_to_DE_cnt;
|
|||
|
||||
/* Part of U-boot ABI: see head.S */
|
||||
int __initdata uboot_tag;
|
||||
int __initdata uboot_magic;
|
||||
char __initdata *uboot_arg;
|
||||
|
||||
const struct machine_desc *machine_desc;
|
||||
|
@ -44,29 +45,24 @@ struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
|
|||
|
||||
struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
|
||||
|
||||
static const struct id_to_str arc_cpu_rel[] = {
|
||||
static const struct id_to_str arc_legacy_rel[] = {
|
||||
/* ID.ARCVER, Release */
|
||||
#ifdef CONFIG_ISA_ARCOMPACT
|
||||
{ 0x34, "R4.10"},
|
||||
{ 0x35, "R4.11"},
|
||||
{ 0x34, "R4.10"},
|
||||
{ 0x35, "R4.11"},
|
||||
#else
|
||||
{ 0x51, "R2.0" },
|
||||
{ 0x52, "R2.1" },
|
||||
{ 0x53, "R3.0" },
|
||||
{ 0x54, "R3.10a" },
|
||||
{ 0x51, "R2.0" },
|
||||
{ 0x52, "R2.1" },
|
||||
{ 0x53, "R3.0" },
|
||||
#endif
|
||||
{ 0x00, NULL }
|
||||
{ 0x00, NULL }
|
||||
};
|
||||
|
||||
static const struct id_to_str arc_cpu_nm[] = {
|
||||
#ifdef CONFIG_ISA_ARCOMPACT
|
||||
{ 0x20, "ARC 600" },
|
||||
{ 0x30, "ARC 770" }, /* 750 identified seperately */
|
||||
#else
|
||||
{ 0x40, "ARC EM" },
|
||||
{ 0x50, "ARC HS38" },
|
||||
{ 0x54, "ARC HS48" },
|
||||
#endif
|
||||
{ 0x00, "Unknown" }
|
||||
static const struct id_to_str arc_cpu_rel[] = {
|
||||
/* UARCH.MAJOR, Release */
|
||||
{ 0, "R3.10a"},
|
||||
{ 1, "R3.50a"},
|
||||
{ 0xFF, NULL }
|
||||
};
|
||||
|
||||
static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
|
||||
|
@ -116,31 +112,72 @@ static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
|
|||
}
|
||||
}
|
||||
|
||||
static void decode_arc_core(struct cpuinfo_arc *cpu)
|
||||
{
|
||||
struct bcr_uarch_build_arcv2 uarch;
|
||||
const struct id_to_str *tbl;
|
||||
|
||||
/*
|
||||
* Up until (including) the first core4 release (0x54) things were
|
||||
* simple: AUX IDENTITY.ARCVER was sufficient to identify arc family
|
||||
* and release: 0x50 to 0x53 was HS38, 0x54 was HS48 (dual issue)
|
||||
*/
|
||||
|
||||
if (cpu->core.family < 0x54) { /* includes arc700 */
|
||||
|
||||
for (tbl = &arc_legacy_rel[0]; tbl->id != 0; tbl++) {
|
||||
if (cpu->core.family == tbl->id) {
|
||||
cpu->release = tbl->str;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (is_isa_arcompact())
|
||||
cpu->name = "ARC700";
|
||||
else if (tbl->str)
|
||||
cpu->name = "HS38";
|
||||
else
|
||||
cpu->name = cpu->release = "Unknown";
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* However the subsequent HS release (same 0x54) allow HS38 or HS48
|
||||
* configurations and encode this info in a different BCR.
|
||||
* The BCR was introduced in 0x54 so can't be read unconditionally.
|
||||
*/
|
||||
|
||||
READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
|
||||
|
||||
if (uarch.prod == 4) {
|
||||
cpu->name = "HS48";
|
||||
cpu->extn.dual = 1;
|
||||
|
||||
} else {
|
||||
cpu->name = "HS38";
|
||||
}
|
||||
|
||||
for (tbl = &arc_cpu_rel[0]; tbl->id != 0xFF; tbl++) {
|
||||
if (uarch.maj == tbl->id) {
|
||||
cpu->release = tbl->str;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void read_arc_build_cfg_regs(void)
|
||||
{
|
||||
struct bcr_timer timer;
|
||||
struct bcr_generic bcr;
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
const struct id_to_str *tbl;
|
||||
struct bcr_isa_arcv2 isa;
|
||||
struct bcr_actionpoint ap;
|
||||
|
||||
FIX_PTR(cpu);
|
||||
|
||||
READ_BCR(AUX_IDENTITY, cpu->core);
|
||||
|
||||
for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
|
||||
if (cpu->core.family == tbl->id) {
|
||||
cpu->details = tbl->str;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
|
||||
if ((cpu->core.family & 0xF4) == tbl->id)
|
||||
break;
|
||||
}
|
||||
cpu->name = tbl->str;
|
||||
decode_arc_core(cpu);
|
||||
|
||||
READ_BCR(ARC_REG_TIMERS_BCR, timer);
|
||||
cpu->extn.timer0 = timer.t0;
|
||||
|
@ -151,16 +188,6 @@ static void read_arc_build_cfg_regs(void)
|
|||
|
||||
READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
|
||||
|
||||
cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
|
||||
cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
|
||||
cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
|
||||
cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
|
||||
cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
|
||||
cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
|
||||
IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
|
||||
|
||||
READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
|
||||
|
||||
/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
|
||||
read_decode_ccm_bcr(cpu);
|
||||
|
||||
|
@ -198,30 +225,12 @@ static void read_arc_build_cfg_regs(void)
|
|||
cpu->bpu.num_pred = 2048 << bpu.pte;
|
||||
cpu->bpu.ret_stk = 4 << bpu.rse;
|
||||
|
||||
if (cpu->core.family >= 0x54) {
|
||||
/* if dual issue hardware, is it enabled ? */
|
||||
if (cpu->extn.dual) {
|
||||
unsigned int exec_ctrl;
|
||||
|
||||
struct bcr_uarch_build_arcv2 uarch;
|
||||
|
||||
/*
|
||||
* The first 0x54 core (uarch maj:min 0:1 or 0:2) was
|
||||
* dual issue only (HS4x). But next uarch rev (1:0)
|
||||
* allows it be configured for single issue (HS3x)
|
||||
* Ensure we fiddle with dual issue only on HS4x
|
||||
*/
|
||||
READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
|
||||
|
||||
if (uarch.prod == 4) {
|
||||
unsigned int exec_ctrl;
|
||||
|
||||
/* dual issue hardware always present */
|
||||
cpu->extn.dual = 1;
|
||||
|
||||
READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
|
||||
|
||||
/* dual issue hardware enabled ? */
|
||||
cpu->extn.dual_enb = !(exec_ctrl & 1);
|
||||
|
||||
}
|
||||
READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
|
||||
cpu->extn.dual_enb = !(exec_ctrl & 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -263,7 +272,8 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
{
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
|
||||
struct bcr_identity *core = &cpu->core;
|
||||
int i, n = 0, ua = 0;
|
||||
char mpy_opt[16];
|
||||
int n = 0;
|
||||
|
||||
FIX_PTR(cpu);
|
||||
|
||||
|
@ -272,7 +282,7 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
core->family, core->cpu_id, core->chip_id);
|
||||
|
||||
n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
|
||||
cpu_id, cpu->name, cpu->details,
|
||||
cpu_id, cpu->name, cpu->release,
|
||||
is_isa_arcompact() ? "ARCompact" : "ARCv2",
|
||||
IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
|
||||
IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
|
||||
|
@ -283,61 +293,50 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
|
||||
IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
|
||||
|
||||
#ifdef __ARC_UNALIGNED__
|
||||
ua = 1;
|
||||
#endif
|
||||
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
|
||||
IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
|
||||
IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
|
||||
IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
|
||||
|
||||
if (i)
|
||||
n += scnprintf(buf + n, len - n, "\n\t\t: ");
|
||||
|
||||
if (cpu->extn_mpy.ver) {
|
||||
if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
|
||||
n += scnprintf(buf + n, len - n, "mpy ");
|
||||
if (is_isa_arcompact()) {
|
||||
scnprintf(mpy_opt, 16, "mpy");
|
||||
} else {
|
||||
|
||||
int opt = 2; /* stock MPY/MPYH */
|
||||
|
||||
if (cpu->extn_mpy.dsp) /* OPT 7-9 */
|
||||
opt = cpu->extn_mpy.dsp + 6;
|
||||
|
||||
n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
|
||||
scnprintf(mpy_opt, 16, "mpy[opt %d] ", opt);
|
||||
}
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
|
||||
IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
|
||||
IS_AVAIL1(cpu->extn.norm, "norm "),
|
||||
IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
|
||||
IS_AVAIL1(cpu->extn.swap, "swap "),
|
||||
IS_AVAIL1(cpu->extn.minmax, "minmax "),
|
||||
IS_AVAIL1(cpu->extn.crc, "crc "),
|
||||
IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
|
||||
IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
|
||||
IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
|
||||
IS_AVAIL2(cpu->isa.unalign, "unalign ", CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS),
|
||||
IS_AVAIL1(cpu->extn_mpy.ver, mpy_opt),
|
||||
IS_AVAIL1(cpu->isa.div_rem, "div_rem "));
|
||||
|
||||
if (cpu->bpu.ver)
|
||||
if (cpu->bpu.ver) {
|
||||
n += scnprintf(buf + n, len - n,
|
||||
"BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d",
|
||||
IS_AVAIL1(cpu->bpu.full, "full"),
|
||||
IS_AVAIL1(!cpu->bpu.full, "partial"),
|
||||
cpu->bpu.num_cache, cpu->bpu.num_pred, cpu->bpu.ret_stk);
|
||||
|
||||
if (is_isa_arcv2()) {
|
||||
struct bcr_lpb lpb;
|
||||
if (is_isa_arcv2()) {
|
||||
struct bcr_lpb lpb;
|
||||
|
||||
READ_BCR(ARC_REG_LPB_BUILD, lpb);
|
||||
if (lpb.ver) {
|
||||
unsigned int ctl;
|
||||
ctl = read_aux_reg(ARC_REG_LPB_CTRL);
|
||||
READ_BCR(ARC_REG_LPB_BUILD, lpb);
|
||||
if (lpb.ver) {
|
||||
unsigned int ctl;
|
||||
ctl = read_aux_reg(ARC_REG_LPB_CTRL);
|
||||
|
||||
n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
|
||||
lpb.entries,
|
||||
IS_DISABLED_RUN(!ctl));
|
||||
n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
|
||||
lpb.entries,
|
||||
IS_DISABLED_RUN(!ctl));
|
||||
}
|
||||
}
|
||||
n += scnprintf(buf + n, len - n, "\n");
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "\n");
|
||||
return buf;
|
||||
}
|
||||
|
||||
|
@ -390,11 +389,6 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
}
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
|
||||
EF_ARC_OSABI_CURRENT >> 8,
|
||||
EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
|
||||
"no-legacy-syscalls" : "64-bit data any register aligned");
|
||||
|
||||
return buf;
|
||||
}
|
||||
|
||||
|
@ -497,6 +491,8 @@ static inline bool uboot_arg_invalid(unsigned long addr)
|
|||
#define UBOOT_TAG_NONE 0
|
||||
#define UBOOT_TAG_CMDLINE 1
|
||||
#define UBOOT_TAG_DTB 2
|
||||
/* We always pass 0 as magic from U-boot */
|
||||
#define UBOOT_MAGIC_VALUE 0
|
||||
|
||||
void __init handle_uboot_args(void)
|
||||
{
|
||||
|
@ -511,6 +507,11 @@ void __init handle_uboot_args(void)
|
|||
goto ignore_uboot_args;
|
||||
}
|
||||
|
||||
if (uboot_magic != UBOOT_MAGIC_VALUE) {
|
||||
pr_warn(IGNORE_ARGS "non zero uboot magic\n");
|
||||
goto ignore_uboot_args;
|
||||
}
|
||||
|
||||
if (uboot_tag != UBOOT_TAG_NONE &&
|
||||
uboot_arg_invalid((unsigned long)uboot_arg)) {
|
||||
pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
|
||||
|
|
|
@ -145,7 +145,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
|
|||
} else if (vec == ECR_V_PROTV) {
|
||||
if (cause_code == ECR_C_PROTV_INST_FETCH)
|
||||
pr_cont("Execute from Non-exec Page\n");
|
||||
else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
|
||||
else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
|
||||
IS_ENABLED(CONFIG_ISA_ARCOMPACT))
|
||||
pr_cont("Misaligned r/w from 0x%08lx\n", address);
|
||||
else
|
||||
pr_cont("%s access not allowed on page\n",
|
||||
|
@ -161,6 +162,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
|
|||
pr_cont("Bus Error from Data Mem\n");
|
||||
else
|
||||
pr_cont("Bus Error, check PRM\n");
|
||||
} else if (vec == ECR_V_MISALIGN) {
|
||||
pr_cont("Misaligned r/w from 0x%08lx\n", address);
|
||||
#endif
|
||||
} else if (vec == ECR_V_TRAP) {
|
||||
if (regs->ecr_param == 5)
|
||||
|
|
|
@ -8,4 +8,10 @@
|
|||
lib-y := strchr-700.o strcpy-700.o strlen.o memcmp.o
|
||||
|
||||
lib-$(CONFIG_ISA_ARCOMPACT) += memcpy-700.o memset.o strcmp.o
|
||||
lib-$(CONFIG_ISA_ARCV2) += memcpy-archs.o memset-archs.o strcmp-archs.o
|
||||
lib-$(CONFIG_ISA_ARCV2) += memset-archs.o strcmp-archs.o
|
||||
|
||||
ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
lib-$(CONFIG_ISA_ARCV2) +=memcpy-archs-unaligned.o
|
||||
else
|
||||
lib-$(CONFIG_ISA_ARCV2) +=memcpy-archs.o
|
||||
endif
|
||||
|
|
|
@ -0,0 +1,47 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* ARCv2 memcpy implementation optimized for unaligned memory access using.
|
||||
*
|
||||
* Copyright (C) 2019 Synopsys
|
||||
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
# define LOADX(DST,RX) ldd.ab DST, [RX, 8]
|
||||
# define STOREX(SRC,RX) std.ab SRC, [RX, 8]
|
||||
# define ZOLSHFT 5
|
||||
# define ZOLAND 0x1F
|
||||
#else
|
||||
# define LOADX(DST,RX) ld.ab DST, [RX, 4]
|
||||
# define STOREX(SRC,RX) st.ab SRC, [RX, 4]
|
||||
# define ZOLSHFT 4
|
||||
# define ZOLAND 0xF
|
||||
#endif
|
||||
|
||||
ENTRY_CFI(memcpy)
|
||||
mov r3, r0 ; don;t clobber ret val
|
||||
|
||||
lsr.f lp_count, r2, ZOLSHFT
|
||||
lpnz @.Lcopy32_64bytes
|
||||
;; LOOP START
|
||||
LOADX (r6, r1)
|
||||
LOADX (r8, r1)
|
||||
LOADX (r10, r1)
|
||||
LOADX (r4, r1)
|
||||
STOREX (r6, r3)
|
||||
STOREX (r8, r3)
|
||||
STOREX (r10, r3)
|
||||
STOREX (r4, r3)
|
||||
.Lcopy32_64bytes:
|
||||
|
||||
and.f lp_count, r2, ZOLAND ;Last remaining 31 bytes
|
||||
lpnz @.Lcopyremainingbytes
|
||||
;; LOOP START
|
||||
ldb.ab r5, [r1, 1]
|
||||
stb.ab r5, [r3, 1]
|
||||
.Lcopyremainingbytes:
|
||||
|
||||
j [blink]
|
||||
END_CFI(memcpy)
|
|
@ -26,8 +26,8 @@ config EZNPS_MTM_EXT
|
|||
help
|
||||
Here we add new hierarchy for CPUs topology.
|
||||
We got:
|
||||
Core
|
||||
Thread
|
||||
Core
|
||||
Thread
|
||||
At the new thread level each CPU represent one HW thread.
|
||||
At highest hierarchy each core contain 16 threads,
|
||||
any of them seem like CPU from Linux point of view.
|
||||
|
@ -35,10 +35,10 @@ config EZNPS_MTM_EXT
|
|||
core and HW scheduler round robin between them.
|
||||
|
||||
config EZNPS_MEM_ERROR_ALIGN
|
||||
bool "ARC-EZchip Memory error as an exception"
|
||||
depends on EZNPS_MTM_EXT
|
||||
default n
|
||||
help
|
||||
bool "ARC-EZchip Memory error as an exception"
|
||||
depends on EZNPS_MTM_EXT
|
||||
default n
|
||||
help
|
||||
On the real chip of the NPS, user memory errors are handled
|
||||
as a machine check exception, which is fatal, whereas on
|
||||
simulator platform for NPS, is handled as a Level 2 interrupt
|
||||
|
|
|
@ -90,7 +90,7 @@ void __init cns3xxx_map_io(void)
|
|||
/* used by entry-macro.S */
|
||||
void __init cns3xxx_init_irq(void)
|
||||
{
|
||||
gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
|
||||
gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
|
||||
IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
|
||||
}
|
||||
|
||||
|
|
|
@ -159,7 +159,6 @@ config ARM64
|
|||
select IRQ_DOMAIN
|
||||
select IRQ_FORCED_THREADING
|
||||
select MODULES_USE_ELF_RELA
|
||||
select MULTI_IRQ_HANDLER
|
||||
select NEED_DMA_MAP_STATE
|
||||
select NEED_SG_DMA_LENGTH
|
||||
select OF
|
||||
|
|
|
@ -77,6 +77,7 @@
|
|||
#define ARM_CPU_IMP_QCOM 0x51
|
||||
#define ARM_CPU_IMP_NVIDIA 0x4E
|
||||
#define ARM_CPU_IMP_FUJITSU 0x46
|
||||
#define ARM_CPU_IMP_HISI 0x48
|
||||
|
||||
#define ARM_CPU_PART_AEM_V8 0xD0F
|
||||
#define ARM_CPU_PART_FOUNDATION 0xD00
|
||||
|
@ -107,6 +108,8 @@
|
|||
|
||||
#define FUJITSU_CPU_PART_A64FX 0x001
|
||||
|
||||
#define HISI_CPU_PART_TSV110 0xD01
|
||||
|
||||
#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
|
||||
#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
|
||||
#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)
|
||||
|
@ -126,10 +129,11 @@
|
|||
#define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)
|
||||
#define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)
|
||||
#define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)
|
||||
#define MIDR_HISI_TSV110 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV110)
|
||||
|
||||
/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
|
||||
#define MIDR_FUJITSU_ERRATUM_010001 MIDR_FUJITSU_A64FX
|
||||
#define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_VARIANT(1))
|
||||
#define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_CPU_VAR_REV(1, 0))
|
||||
#define TCR_CLEAR_FUJITSU_ERRATUM_010001 (TCR_NFD1 | TCR_NFD0)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
@ -963,6 +963,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
|
|||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
|
||||
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
char const *str = "command line option";
|
||||
|
|
|
@ -91,8 +91,6 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
|
|||
int __kprobes arch_prepare_kprobe(struct kprobe *p)
|
||||
{
|
||||
unsigned long probe_addr = (unsigned long)p->addr;
|
||||
extern char __start_rodata[];
|
||||
extern char __end_rodata[];
|
||||
|
||||
if (probe_addr & 0x3)
|
||||
return -EINVAL;
|
||||
|
@ -100,10 +98,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
|
|||
/* copy instruction */
|
||||
p->opcode = le32_to_cpu(*p->addr);
|
||||
|
||||
if (in_exception_text(probe_addr))
|
||||
return -EINVAL;
|
||||
if (probe_addr >= (unsigned long) __start_rodata &&
|
||||
probe_addr <= (unsigned long) __end_rodata)
|
||||
if (search_exception_tables(probe_addr))
|
||||
return -EINVAL;
|
||||
|
||||
/* decode instruction */
|
||||
|
@ -476,26 +471,37 @@ kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
|
|||
return DBG_HOOK_HANDLED;
|
||||
}
|
||||
|
||||
bool arch_within_kprobe_blacklist(unsigned long addr)
|
||||
/*
|
||||
* Provide a blacklist of symbols identifying ranges which cannot be kprobed.
|
||||
* This blacklist is exposed to userspace via debugfs (kprobes/blacklist).
|
||||
*/
|
||||
int __init arch_populate_kprobe_blacklist(void)
|
||||
{
|
||||
if ((addr >= (unsigned long)__kprobes_text_start &&
|
||||
addr < (unsigned long)__kprobes_text_end) ||
|
||||
(addr >= (unsigned long)__entry_text_start &&
|
||||
addr < (unsigned long)__entry_text_end) ||
|
||||
(addr >= (unsigned long)__idmap_text_start &&
|
||||
addr < (unsigned long)__idmap_text_end) ||
|
||||
(addr >= (unsigned long)__hyp_text_start &&
|
||||
addr < (unsigned long)__hyp_text_end) ||
|
||||
!!search_exception_tables(addr))
|
||||
return true;
|
||||
int ret;
|
||||
|
||||
if (!is_kernel_in_hyp_mode()) {
|
||||
if ((addr >= (unsigned long)__hyp_idmap_text_start &&
|
||||
addr < (unsigned long)__hyp_idmap_text_end))
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
ret = kprobe_add_area_blacklist((unsigned long)__entry_text_start,
|
||||
(unsigned long)__entry_text_end);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = kprobe_add_area_blacklist((unsigned long)__irqentry_text_start,
|
||||
(unsigned long)__irqentry_text_end);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = kprobe_add_area_blacklist((unsigned long)__exception_text_start,
|
||||
(unsigned long)__exception_text_end);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = kprobe_add_area_blacklist((unsigned long)__idmap_text_start,
|
||||
(unsigned long)__idmap_text_end);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = kprobe_add_area_blacklist((unsigned long)__hyp_text_start,
|
||||
(unsigned long)__hyp_text_end);
|
||||
if (ret || is_kernel_in_hyp_mode())
|
||||
return ret;
|
||||
ret = kprobe_add_area_blacklist((unsigned long)__hyp_idmap_text_start,
|
||||
(unsigned long)__hyp_idmap_text_end);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
|
||||
|
|
|
@ -143,6 +143,7 @@ void save_stack_trace_regs(struct pt_regs *regs, struct stack_trace *trace)
|
|||
if (trace->nr_entries < trace->max_entries)
|
||||
trace->entries[trace->nr_entries++] = ULONG_MAX;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(save_stack_trace_regs);
|
||||
|
||||
static noinline void __save_stack_trace(struct task_struct *tsk,
|
||||
struct stack_trace *trace, unsigned int nosched)
|
||||
|
|
|
@ -24,6 +24,7 @@ void __init bcm47xx_workarounds(void)
|
|||
case BCM47XX_BOARD_NETGEAR_WNR3500L:
|
||||
bcm47xx_workarounds_enable_usb_power(12);
|
||||
break;
|
||||
case BCM47XX_BOARD_NETGEAR_WNDR3400V2:
|
||||
case BCM47XX_BOARD_NETGEAR_WNDR3400_V3:
|
||||
bcm47xx_workarounds_enable_usb_power(21);
|
||||
break;
|
||||
|
|
|
@ -21,15 +21,15 @@
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_MICROMIPS
|
||||
#define NOP_INSN "nop32"
|
||||
#define B_INSN "b32"
|
||||
#else
|
||||
#define NOP_INSN "nop"
|
||||
#define B_INSN "b"
|
||||
#endif
|
||||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
|
||||
{
|
||||
asm_volatile_goto("1:\t" NOP_INSN "\n\t"
|
||||
"nop\n\t"
|
||||
asm_volatile_goto("1:\t" B_INSN " 2f\n\t"
|
||||
"2:\tnop\n\t"
|
||||
".pushsection __jump_table, \"aw\"\n\t"
|
||||
WORD_INSN " 1b, %l[l_yes], %0\n\t"
|
||||
".popsection\n\t"
|
||||
|
|
|
@ -21,13 +21,6 @@
|
|||
typedef long __kernel_daddr_t;
|
||||
#define __kernel_daddr_t __kernel_daddr_t
|
||||
|
||||
#if (_MIPS_SZLONG == 32)
|
||||
typedef struct {
|
||||
long val[2];
|
||||
} __kernel_fsid_t;
|
||||
#define __kernel_fsid_t __kernel_fsid_t
|
||||
#endif
|
||||
|
||||
#include <asm-generic/posix_types.h>
|
||||
|
||||
#endif /* _ASM_POSIX_TYPES_H */
|
||||
|
|
|
@ -140,6 +140,13 @@ SECTIONS
|
|||
PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
|
||||
.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
|
||||
*(.appended_dtb)
|
||||
KEEP(*(.appended_dtb))
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RELOCATABLE
|
||||
. = ALIGN(4);
|
||||
|
||||
|
@ -164,11 +171,6 @@ SECTIONS
|
|||
__appended_dtb = .;
|
||||
/* leave space for appended DTB */
|
||||
. += 0x100000;
|
||||
#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
|
||||
.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
|
||||
*(.appended_dtb)
|
||||
KEEP(*(.appended_dtb))
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* Align to 64K in attempt to eliminate holes before the
|
||||
|
|
|
@ -103,7 +103,7 @@ static struct irqaction ip6_irqaction = {
|
|||
static struct irqaction cascade_irqaction = {
|
||||
.handler = no_action,
|
||||
.name = "cascade",
|
||||
.flags = IRQF_NO_THREAD,
|
||||
.flags = IRQF_NO_THREAD | IRQF_NO_SUSPEND,
|
||||
};
|
||||
|
||||
void __init mach_init_irq(void)
|
||||
|
|
|
@ -352,7 +352,7 @@ static inline bool strict_kernel_rwx_enabled(void)
|
|||
#if defined(CONFIG_SPARSEMEM_VMEMMAP) && defined(CONFIG_SPARSEMEM_EXTREME) && \
|
||||
defined (CONFIG_PPC_64K_PAGES)
|
||||
#define MAX_PHYSMEM_BITS 51
|
||||
#else
|
||||
#elif defined(CONFIG_SPARSEMEM)
|
||||
#define MAX_PHYSMEM_BITS 46
|
||||
#endif
|
||||
|
||||
|
|
|
@ -82,10 +82,10 @@ struct vdso_data {
|
|||
__u32 icache_block_size; /* L1 i-cache block size */
|
||||
__u32 dcache_log_block_size; /* L1 d-cache log block size */
|
||||
__u32 icache_log_block_size; /* L1 i-cache log block size */
|
||||
__s32 wtom_clock_sec; /* Wall to monotonic clock */
|
||||
__s32 wtom_clock_nsec;
|
||||
struct timespec stamp_xtime; /* xtime as at tb_orig_stamp */
|
||||
__u32 stamp_sec_fraction; /* fractional seconds of stamp_xtime */
|
||||
__u32 stamp_sec_fraction; /* fractional seconds of stamp_xtime */
|
||||
__s32 wtom_clock_nsec; /* Wall to monotonic clock nsec */
|
||||
__s64 wtom_clock_sec; /* Wall to monotonic clock sec */
|
||||
struct timespec stamp_xtime; /* xtime as at tb_orig_stamp */
|
||||
__u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */
|
||||
__u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
|
||||
};
|
||||
|
|
|
@ -24,9 +24,6 @@ BEGIN_MMU_FTR_SECTION
|
|||
li r10,0
|
||||
mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
|
||||
END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
|
||||
lis r10, (swapper_pg_dir - PAGE_OFFSET)@h
|
||||
ori r10, r10, (swapper_pg_dir - PAGE_OFFSET)@l
|
||||
mtspr SPRN_SPRG_PGDIR, r10
|
||||
|
||||
BEGIN_FTR_SECTION
|
||||
bl __init_fpu_registers
|
||||
|
|
|
@ -855,6 +855,9 @@ __secondary_start:
|
|||
li r3,0
|
||||
stw r3, RTAS_SP(r4) /* 0 => not in RTAS */
|
||||
#endif
|
||||
lis r4, (swapper_pg_dir - PAGE_OFFSET)@h
|
||||
ori r4, r4, (swapper_pg_dir - PAGE_OFFSET)@l
|
||||
mtspr SPRN_SPRG_PGDIR, r4
|
||||
|
||||
/* enable MMU and jump to start_secondary */
|
||||
li r4,MSR_KERNEL
|
||||
|
@ -942,6 +945,9 @@ start_here:
|
|||
li r3,0
|
||||
stw r3, RTAS_SP(r4) /* 0 => not in RTAS */
|
||||
#endif
|
||||
lis r4, (swapper_pg_dir - PAGE_OFFSET)@h
|
||||
ori r4, r4, (swapper_pg_dir - PAGE_OFFSET)@l
|
||||
mtspr SPRN_SPRG_PGDIR, r4
|
||||
|
||||
/* stack */
|
||||
lis r1,init_thread_union@ha
|
||||
|
|
|
@ -190,29 +190,22 @@ ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, c
|
|||
bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
|
||||
ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
|
||||
|
||||
if (bcs || ccd || count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
|
||||
bool comma = false;
|
||||
if (bcs || ccd) {
|
||||
seq_buf_printf(&s, "Mitigation: ");
|
||||
|
||||
if (bcs) {
|
||||
if (bcs)
|
||||
seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
|
||||
comma = true;
|
||||
}
|
||||
|
||||
if (ccd) {
|
||||
if (comma)
|
||||
seq_buf_printf(&s, ", ");
|
||||
seq_buf_printf(&s, "Indirect branch cache disabled");
|
||||
comma = true;
|
||||
}
|
||||
|
||||
if (comma)
|
||||
if (bcs && ccd)
|
||||
seq_buf_printf(&s, ", ");
|
||||
|
||||
seq_buf_printf(&s, "Software count cache flush");
|
||||
if (ccd)
|
||||
seq_buf_printf(&s, "Indirect branch cache disabled");
|
||||
} else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
|
||||
seq_buf_printf(&s, "Mitigation: Software count cache flush");
|
||||
|
||||
if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
|
||||
seq_buf_printf(&s, "(hardware accelerated)");
|
||||
seq_buf_printf(&s, " (hardware accelerated)");
|
||||
} else if (btb_flush_enabled) {
|
||||
seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
|
||||
} else {
|
||||
|
|
|
@ -92,7 +92,7 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
|
|||
* At this point, r4,r5 contain our sec/nsec values.
|
||||
*/
|
||||
|
||||
lwa r6,WTOM_CLOCK_SEC(r3)
|
||||
ld r6,WTOM_CLOCK_SEC(r3)
|
||||
lwa r9,WTOM_CLOCK_NSEC(r3)
|
||||
|
||||
/* We now have our result in r6,r9. We create a fake dependency
|
||||
|
@ -125,7 +125,7 @@ V_FUNCTION_BEGIN(__kernel_clock_gettime)
|
|||
bne cr6,75f
|
||||
|
||||
/* CLOCK_MONOTONIC_COARSE */
|
||||
lwa r6,WTOM_CLOCK_SEC(r3)
|
||||
ld r6,WTOM_CLOCK_SEC(r3)
|
||||
lwa r9,WTOM_CLOCK_NSEC(r3)
|
||||
|
||||
/* check if counter has updated */
|
||||
|
|
|
@ -70,12 +70,12 @@ _GLOBAL(hash_page)
|
|||
lis r0,KERNELBASE@h /* check if kernel address */
|
||||
cmplw 0,r4,r0
|
||||
ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */
|
||||
mfspr r5, SPRN_SPRG_PGDIR /* virt page-table root */
|
||||
mfspr r5, SPRN_SPRG_PGDIR /* phys page-table root */
|
||||
blt+ 112f /* assume user more likely */
|
||||
lis r5,swapper_pg_dir@ha /* if kernel address, use */
|
||||
addi r5,r5,swapper_pg_dir@l /* kernel page table */
|
||||
lis r5, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
|
||||
addi r5 ,r5 ,(swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
|
||||
rlwimi r3,r9,32-12,29,29 /* MSR_PR -> _PAGE_USER */
|
||||
112: tophys(r5, r5)
|
||||
112:
|
||||
#ifndef CONFIG_PTE_64BIT
|
||||
rlwimi r5,r4,12,20,29 /* insert top 10 bits of address */
|
||||
lwz r8,0(r5) /* get pmd entry */
|
||||
|
|
|
@ -13,8 +13,9 @@
|
|||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/limits.h>
|
||||
#include <asm/asm.h>
|
||||
#include "ctype.h"
|
||||
#include "string.h"
|
||||
|
|
|
@ -103,9 +103,13 @@ static int hv_cpu_init(unsigned int cpu)
|
|||
u64 msr_vp_index;
|
||||
struct hv_vp_assist_page **hvp = &hv_vp_assist_page[smp_processor_id()];
|
||||
void **input_arg;
|
||||
struct page *pg;
|
||||
|
||||
input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
|
||||
*input_arg = page_address(alloc_page(GFP_KERNEL));
|
||||
pg = alloc_page(GFP_KERNEL);
|
||||
if (unlikely(!pg))
|
||||
return -ENOMEM;
|
||||
*input_arg = page_address(pg);
|
||||
|
||||
hv_get_vp_index(msr_vp_index);
|
||||
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _CPU_DEVICE_ID
|
||||
#define _CPU_DEVICE_ID 1
|
||||
#ifndef _ASM_X86_CPU_DEVICE_ID
|
||||
#define _ASM_X86_CPU_DEVICE_ID
|
||||
|
||||
/*
|
||||
* Declare drivers belonging to specific x86 CPUs
|
||||
|
@ -9,8 +9,6 @@
|
|||
|
||||
#include <linux/mod_devicetable.h>
|
||||
|
||||
extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match);
|
||||
|
||||
/*
|
||||
* Match specific microcode revisions.
|
||||
*
|
||||
|
@ -22,21 +20,22 @@ extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match);
|
|||
*/
|
||||
|
||||
struct x86_cpu_desc {
|
||||
__u8 x86_family;
|
||||
__u8 x86_vendor;
|
||||
__u8 x86_model;
|
||||
__u8 x86_stepping;
|
||||
__u32 x86_microcode_rev;
|
||||
u8 x86_family;
|
||||
u8 x86_vendor;
|
||||
u8 x86_model;
|
||||
u8 x86_stepping;
|
||||
u32 x86_microcode_rev;
|
||||
};
|
||||
|
||||
#define INTEL_CPU_DESC(mod, step, rev) { \
|
||||
.x86_family = 6, \
|
||||
.x86_vendor = X86_VENDOR_INTEL, \
|
||||
.x86_model = mod, \
|
||||
.x86_stepping = step, \
|
||||
.x86_microcode_rev = rev, \
|
||||
#define INTEL_CPU_DESC(model, stepping, revision) { \
|
||||
.x86_family = 6, \
|
||||
.x86_vendor = X86_VENDOR_INTEL, \
|
||||
.x86_model = (model), \
|
||||
.x86_stepping = (stepping), \
|
||||
.x86_microcode_rev = (revision), \
|
||||
}
|
||||
|
||||
extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match);
|
||||
extern bool x86_cpu_has_min_microcode_rev(const struct x86_cpu_desc *table);
|
||||
|
||||
#endif
|
||||
#endif /* _ASM_X86_CPU_DEVICE_ID */
|
||||
|
|
|
@ -3,19 +3,6 @@
|
|||
* NSC/Cyrix CPU indexed register access. Must be inlined instead of
|
||||
* macros to ensure correct access ordering
|
||||
* Access order is always 0x22 (=offset), 0x23 (=value)
|
||||
*
|
||||
* When using the old macros a line like
|
||||
* setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
|
||||
* gets expanded to:
|
||||
* do {
|
||||
* outb((CX86_CCR2), 0x22);
|
||||
* outb((({
|
||||
* outb((CX86_CCR2), 0x22);
|
||||
* inb(0x23);
|
||||
* }) | 0x88), 0x23);
|
||||
* } while (0);
|
||||
*
|
||||
* which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
|
||||
*/
|
||||
|
||||
static inline u8 getCx86(u8 reg)
|
||||
|
@ -29,11 +16,3 @@ static inline void setCx86(u8 reg, u8 data)
|
|||
outb(reg, 0x22);
|
||||
outb(data, 0x23);
|
||||
}
|
||||
|
||||
#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
|
||||
|
||||
#define setCx86_old(reg, data) do { \
|
||||
outb((reg), 0x22); \
|
||||
outb((data), 0x23); \
|
||||
} while (0)
|
||||
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#define pr_fmt(fmt) "AGP: " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/kcore.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/memblock.h>
|
||||
|
@ -57,7 +58,7 @@ int fallback_aper_force __initdata;
|
|||
|
||||
int fix_aperture __initdata = 1;
|
||||
|
||||
#ifdef CONFIG_PROC_VMCORE
|
||||
#if defined(CONFIG_PROC_VMCORE) || defined(CONFIG_PROC_KCORE)
|
||||
/*
|
||||
* If the first kernel maps the aperture over e820 RAM, the kdump kernel will
|
||||
* use the same range because it will remain configured in the northbridge.
|
||||
|
@ -66,20 +67,25 @@ int fix_aperture __initdata = 1;
|
|||
*/
|
||||
static unsigned long aperture_pfn_start, aperture_page_count;
|
||||
|
||||
static int gart_oldmem_pfn_is_ram(unsigned long pfn)
|
||||
static int gart_mem_pfn_is_ram(unsigned long pfn)
|
||||
{
|
||||
return likely((pfn < aperture_pfn_start) ||
|
||||
(pfn >= aperture_pfn_start + aperture_page_count));
|
||||
}
|
||||
|
||||
static void exclude_from_vmcore(u64 aper_base, u32 aper_order)
|
||||
static void __init exclude_from_core(u64 aper_base, u32 aper_order)
|
||||
{
|
||||
aperture_pfn_start = aper_base >> PAGE_SHIFT;
|
||||
aperture_page_count = (32 * 1024 * 1024) << aper_order >> PAGE_SHIFT;
|
||||
WARN_ON(register_oldmem_pfn_is_ram(&gart_oldmem_pfn_is_ram));
|
||||
#ifdef CONFIG_PROC_VMCORE
|
||||
WARN_ON(register_oldmem_pfn_is_ram(&gart_mem_pfn_is_ram));
|
||||
#endif
|
||||
#ifdef CONFIG_PROC_KCORE
|
||||
WARN_ON(register_mem_pfn_is_ram(&gart_mem_pfn_is_ram));
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
static void exclude_from_vmcore(u64 aper_base, u32 aper_order)
|
||||
static void exclude_from_core(u64 aper_base, u32 aper_order)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
@ -474,7 +480,7 @@ out:
|
|||
* may have allocated the range over its e820 RAM
|
||||
* and fixed up the northbridge
|
||||
*/
|
||||
exclude_from_vmcore(last_aper_base, last_aper_order);
|
||||
exclude_from_core(last_aper_base, last_aper_order);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
@ -520,7 +526,7 @@ out:
|
|||
* overlap with the first kernel's memory. We can't access the
|
||||
* range through vmcore even though it should be part of the dump.
|
||||
*/
|
||||
exclude_from_vmcore(aper_alloc, aper_order);
|
||||
exclude_from_core(aper_alloc, aper_order);
|
||||
|
||||
/* Fix up the north bridges */
|
||||
for (i = 0; i < amd_nb_bus_dev_ranges[i].dev_limit; i++) {
|
||||
|
|
|
@ -124,7 +124,7 @@ static void set_cx86_reorder(void)
|
|||
setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
|
||||
|
||||
/* Load/Store Serialize to mem access disable (=reorder it) */
|
||||
setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80);
|
||||
setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80);
|
||||
/* set load/store serialize from 1GB to 4GB */
|
||||
ccr3 |= 0xe0;
|
||||
setCx86(CX86_CCR3, ccr3);
|
||||
|
@ -135,11 +135,11 @@ static void set_cx86_memwb(void)
|
|||
pr_info("Enable Memory-Write-back mode on Cyrix/NSC processor.\n");
|
||||
|
||||
/* CCR2 bit 2: unlock NW bit */
|
||||
setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04);
|
||||
setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
|
||||
/* set 'Not Write-through' */
|
||||
write_cr0(read_cr0() | X86_CR0_NW);
|
||||
/* CCR2 bit 2: lock NW bit and set WT1 */
|
||||
setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14);
|
||||
setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -153,14 +153,14 @@ static void geode_configure(void)
|
|||
local_irq_save(flags);
|
||||
|
||||
/* Suspend on halt power saving and enable #SUSP pin */
|
||||
setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88);
|
||||
setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
|
||||
|
||||
ccr3 = getCx86(CX86_CCR3);
|
||||
setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
|
||||
|
||||
|
||||
/* FPU fast, DTE cache, Mem bypass */
|
||||
setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38);
|
||||
setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38);
|
||||
setCx86(CX86_CCR3, ccr3); /* disable MAPEN */
|
||||
|
||||
set_cx86_memwb();
|
||||
|
@ -296,7 +296,7 @@ static void init_cyrix(struct cpuinfo_x86 *c)
|
|||
/* GXm supports extended cpuid levels 'ala' AMD */
|
||||
if (c->cpuid_level == 2) {
|
||||
/* Enable cxMMX extensions (GX1 Datasheet 54) */
|
||||
setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1);
|
||||
setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1);
|
||||
|
||||
/*
|
||||
* GXm : 0x30 ... 0x5f GXm datasheet 51
|
||||
|
@ -319,7 +319,7 @@ static void init_cyrix(struct cpuinfo_x86 *c)
|
|||
if (dir1 > 7) {
|
||||
dir0_msn++; /* M II */
|
||||
/* Enable MMX extensions (App note 108) */
|
||||
setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1);
|
||||
setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);
|
||||
} else {
|
||||
/* A 6x86MX - it has the bug. */
|
||||
set_cpu_bug(c, X86_BUG_COMA);
|
||||
|
|
|
@ -608,6 +608,8 @@ static int microcode_reload_late(void)
|
|||
if (ret > 0)
|
||||
microcode_check();
|
||||
|
||||
pr_info("Reload completed, microcode revision: 0x%x\n", boot_cpu_data.microcode);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -905,6 +905,8 @@ int __init hpet_enable(void)
|
|||
return 0;
|
||||
|
||||
hpet_set_mapping();
|
||||
if (!hpet_virt_address)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* Read the period and check for a sane value:
|
||||
|
|
|
@ -354,6 +354,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
|
|||
#endif
|
||||
default:
|
||||
WARN_ON_ONCE(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -598,8 +598,8 @@ static int __init smp_scan_config(unsigned long base, unsigned long length)
|
|||
mpf_base = base;
|
||||
mpf_found = true;
|
||||
|
||||
pr_info("found SMP MP-table at [mem %#010lx-%#010lx] mapped at [%p]\n",
|
||||
base, base + sizeof(*mpf) - 1, mpf);
|
||||
pr_info("found SMP MP-table at [mem %#010lx-%#010lx]\n",
|
||||
base, base + sizeof(*mpf) - 1);
|
||||
|
||||
memblock_reserve(base, sizeof(*mpf));
|
||||
if (mpf->physptr)
|
||||
|
|
|
@ -94,7 +94,7 @@ static unsigned do_csum(const unsigned char *buff, unsigned len)
|
|||
: "m" (*(unsigned long *)buff),
|
||||
"r" (zero), "0" (result));
|
||||
--count;
|
||||
buff += 8;
|
||||
buff += 8;
|
||||
}
|
||||
result = add32_with_carry(result>>32,
|
||||
result&0xffffffff);
|
||||
|
|
|
@ -77,7 +77,7 @@ static void __init pti_print_if_secure(const char *reason)
|
|||
pr_info("%s\n", reason);
|
||||
}
|
||||
|
||||
enum pti_mode {
|
||||
static enum pti_mode {
|
||||
PTI_AUTO = 0,
|
||||
PTI_FORCE_OFF,
|
||||
PTI_FORCE_ON
|
||||
|
@ -602,7 +602,7 @@ static void pti_clone_kernel_text(void)
|
|||
set_memory_global(start, (end_global - start) >> PAGE_SHIFT);
|
||||
}
|
||||
|
||||
void pti_set_kernel_image_nonglobal(void)
|
||||
static void pti_set_kernel_image_nonglobal(void)
|
||||
{
|
||||
/*
|
||||
* The identity map is created with PMDs, regardless of the
|
||||
|
|
43
block/bio.c
43
block/bio.c
|
@ -849,20 +849,14 @@ static int __bio_iov_bvec_add_pages(struct bio *bio, struct iov_iter *iter)
|
|||
size = bio_add_page(bio, bv->bv_page, len,
|
||||
bv->bv_offset + iter->iov_offset);
|
||||
if (size == len) {
|
||||
struct page *page;
|
||||
int i;
|
||||
if (!bio_flagged(bio, BIO_NO_PAGE_REF)) {
|
||||
struct page *page;
|
||||
int i;
|
||||
|
||||
mp_bvec_for_each_page(page, bv, i)
|
||||
get_page(page);
|
||||
}
|
||||
|
||||
/*
|
||||
* For the normal O_DIRECT case, we could skip grabbing this
|
||||
* reference and then not have to put them again when IO
|
||||
* completes. But this breaks some in-kernel users, like
|
||||
* splicing to/from a loop device, where we release the pipe
|
||||
* pages unconditionally. If we can fix that case, we can
|
||||
* get rid of the get here and the need to call
|
||||
* bio_release_pages() at IO completion time.
|
||||
*/
|
||||
mp_bvec_for_each_page(page, bv, i)
|
||||
get_page(page);
|
||||
iov_iter_advance(iter, size);
|
||||
return 0;
|
||||
}
|
||||
|
@ -925,10 +919,12 @@ static int __bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter)
|
|||
* This takes either an iterator pointing to user memory, or one pointing to
|
||||
* kernel pages (BVEC iterator). If we're adding user pages, we pin them and
|
||||
* map them into the kernel. On IO completion, the caller should put those
|
||||
* pages. For now, when adding kernel pages, we still grab a reference to the
|
||||
* page. This isn't strictly needed for the common case, but some call paths
|
||||
* end up releasing pages from eg a pipe and we can't easily control these.
|
||||
* See comment in __bio_iov_bvec_add_pages().
|
||||
* pages. If we're adding kernel pages, and the caller told us it's safe to
|
||||
* do so, we just have to add the pages to the bio directly. We don't grab an
|
||||
* extra reference to those pages (the user should already have that), and we
|
||||
* don't put the page on IO completion. The caller needs to check if the bio is
|
||||
* flagged BIO_NO_PAGE_REF on IO completion. If it isn't, then pages should be
|
||||
* released.
|
||||
*
|
||||
* The function tries, but does not guarantee, to pin as many pages as
|
||||
* fit into the bio, or are requested in *iter, whatever is smaller. If
|
||||
|
@ -940,6 +936,13 @@ int bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter)
|
|||
const bool is_bvec = iov_iter_is_bvec(iter);
|
||||
unsigned short orig_vcnt = bio->bi_vcnt;
|
||||
|
||||
/*
|
||||
* If this is a BVEC iter, then the pages are kernel pages. Don't
|
||||
* release them on IO completion, if the caller asked us to.
|
||||
*/
|
||||
if (is_bvec && iov_iter_bvec_no_ref(iter))
|
||||
bio_set_flag(bio, BIO_NO_PAGE_REF);
|
||||
|
||||
do {
|
||||
int ret;
|
||||
|
||||
|
@ -1696,7 +1699,8 @@ static void bio_dirty_fn(struct work_struct *work)
|
|||
next = bio->bi_private;
|
||||
|
||||
bio_set_pages_dirty(bio);
|
||||
bio_release_pages(bio);
|
||||
if (!bio_flagged(bio, BIO_NO_PAGE_REF))
|
||||
bio_release_pages(bio);
|
||||
bio_put(bio);
|
||||
}
|
||||
}
|
||||
|
@ -1713,7 +1717,8 @@ void bio_check_pages_dirty(struct bio *bio)
|
|||
goto defer;
|
||||
}
|
||||
|
||||
bio_release_pages(bio);
|
||||
if (!bio_flagged(bio, BIO_NO_PAGE_REF))
|
||||
bio_release_pages(bio);
|
||||
bio_put(bio);
|
||||
return;
|
||||
defer:
|
||||
|
|
|
@ -1736,8 +1736,8 @@ out:
|
|||
|
||||
/**
|
||||
* blkcg_schedule_throttle - this task needs to check for throttling
|
||||
* @q - the request queue IO was submitted on
|
||||
* @use_memdelay - do we charge this to memory delay for PSI
|
||||
* @q: the request queue IO was submitted on
|
||||
* @use_memdelay: do we charge this to memory delay for PSI
|
||||
*
|
||||
* This is called by the IO controller when we know there's delay accumulated
|
||||
* for the blkg for this task. We do not pass the blkg because there are places
|
||||
|
@ -1769,8 +1769,9 @@ void blkcg_schedule_throttle(struct request_queue *q, bool use_memdelay)
|
|||
|
||||
/**
|
||||
* blkcg_add_delay - add delay to this blkg
|
||||
* @now - the current time in nanoseconds
|
||||
* @delta - how many nanoseconds of delay to add
|
||||
* @blkg: blkg of interest
|
||||
* @now: the current time in nanoseconds
|
||||
* @delta: how many nanoseconds of delay to add
|
||||
*
|
||||
* Charge @delta to the blkg's current delay accumulation. This is used to
|
||||
* throttle tasks if an IO controller thinks we need more throttling.
|
||||
|
|
|
@ -75,6 +75,7 @@
|
|||
#include <linux/blk-mq.h>
|
||||
#include "blk-rq-qos.h"
|
||||
#include "blk-stat.h"
|
||||
#include "blk.h"
|
||||
|
||||
#define DEFAULT_SCALE_COOKIE 1000000U
|
||||
|
||||
|
|
|
@ -782,7 +782,6 @@ void blk_mq_add_to_requeue_list(struct request *rq, bool at_head,
|
|||
if (kick_requeue_list)
|
||||
blk_mq_kick_requeue_list(q);
|
||||
}
|
||||
EXPORT_SYMBOL(blk_mq_add_to_requeue_list);
|
||||
|
||||
void blk_mq_kick_requeue_list(struct request_queue *q)
|
||||
{
|
||||
|
@ -1093,8 +1092,7 @@ static bool blk_mq_mark_tag_wait(struct blk_mq_hw_ctx *hctx,
|
|||
bool ret;
|
||||
|
||||
if (!(hctx->flags & BLK_MQ_F_TAG_SHARED)) {
|
||||
if (!test_bit(BLK_MQ_S_SCHED_RESTART, &hctx->state))
|
||||
set_bit(BLK_MQ_S_SCHED_RESTART, &hctx->state);
|
||||
blk_mq_sched_mark_restart_hctx(hctx);
|
||||
|
||||
/*
|
||||
* It's possible that a tag was freed in the window between the
|
||||
|
@ -2857,7 +2855,7 @@ struct request_queue *blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,
|
|||
/*
|
||||
* Default to classic polling
|
||||
*/
|
||||
q->poll_nsec = -1;
|
||||
q->poll_nsec = BLK_MQ_POLL_CLASSIC;
|
||||
|
||||
blk_mq_init_cpu_queues(q, set->nr_hw_queues);
|
||||
blk_mq_add_queue_tag_set(set, q);
|
||||
|
@ -3392,7 +3390,7 @@ static bool blk_mq_poll_hybrid(struct request_queue *q,
|
|||
{
|
||||
struct request *rq;
|
||||
|
||||
if (q->poll_nsec == -1)
|
||||
if (q->poll_nsec == BLK_MQ_POLL_CLASSIC)
|
||||
return false;
|
||||
|
||||
if (!blk_qc_t_is_internal(cookie))
|
||||
|
|
|
@ -41,6 +41,8 @@ void blk_mq_free_queue(struct request_queue *q);
|
|||
int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr);
|
||||
void blk_mq_wake_waiters(struct request_queue *q);
|
||||
bool blk_mq_dispatch_rq_list(struct request_queue *, struct list_head *, bool);
|
||||
void blk_mq_add_to_requeue_list(struct request *rq, bool at_head,
|
||||
bool kick_requeue_list);
|
||||
void blk_mq_flush_busy_ctxs(struct blk_mq_hw_ctx *hctx, struct list_head *list);
|
||||
bool blk_mq_get_driver_tag(struct request *rq);
|
||||
struct request *blk_mq_dequeue_from_ctx(struct blk_mq_hw_ctx *hctx,
|
||||
|
|
|
@ -360,8 +360,8 @@ static ssize_t queue_poll_delay_show(struct request_queue *q, char *page)
|
|||
{
|
||||
int val;
|
||||
|
||||
if (q->poll_nsec == -1)
|
||||
val = -1;
|
||||
if (q->poll_nsec == BLK_MQ_POLL_CLASSIC)
|
||||
val = BLK_MQ_POLL_CLASSIC;
|
||||
else
|
||||
val = q->poll_nsec / 1000;
|
||||
|
||||
|
@ -380,10 +380,12 @@ static ssize_t queue_poll_delay_store(struct request_queue *q, const char *page,
|
|||
if (err < 0)
|
||||
return err;
|
||||
|
||||
if (val == -1)
|
||||
q->poll_nsec = -1;
|
||||
else
|
||||
if (val == BLK_MQ_POLL_CLASSIC)
|
||||
q->poll_nsec = BLK_MQ_POLL_CLASSIC;
|
||||
else if (val >= 0)
|
||||
q->poll_nsec = val * 1000;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
|
@ -800,6 +800,7 @@ bool acpi_dev_present(const char *hid, const char *uid, s64 hrv)
|
|||
match.hrv = hrv;
|
||||
|
||||
dev = bus_find_device(&acpi_bus_type, NULL, &match, acpi_dev_match_cb);
|
||||
put_device(dev);
|
||||
return !!dev;
|
||||
}
|
||||
EXPORT_SYMBOL(acpi_dev_present);
|
||||
|
|
|
@ -164,9 +164,7 @@ config ARM_CHARLCD
|
|||
line and the Linux version on the second line, but that's
|
||||
still useful.
|
||||
|
||||
endif # AUXDISPLAY
|
||||
|
||||
menuconfig PANEL
|
||||
menuconfig PARPORT_PANEL
|
||||
tristate "Parallel port LCD/Keypad Panel support"
|
||||
depends on PARPORT
|
||||
select CHARLCD
|
||||
|
@ -178,7 +176,7 @@ menuconfig PANEL
|
|||
compiled as a module, or linked into the kernel and started at boot.
|
||||
If you don't understand what all this is about, say N.
|
||||
|
||||
if PANEL
|
||||
if PARPORT_PANEL
|
||||
|
||||
config PANEL_PARPORT
|
||||
int "Default parallel port number (0=LPT1)"
|
||||
|
@ -419,8 +417,11 @@ config PANEL_LCD_PIN_BL
|
|||
|
||||
Default for the 'BL' pin in custom profile is '0' (uncontrolled).
|
||||
|
||||
endif # PARPORT_PANEL
|
||||
|
||||
config PANEL_CHANGE_MESSAGE
|
||||
bool "Change LCD initialization message ?"
|
||||
depends on CHARLCD
|
||||
default "n"
|
||||
---help---
|
||||
This allows you to replace the boot message indicating the kernel version
|
||||
|
@ -444,7 +445,34 @@ config PANEL_BOOT_MESSAGE
|
|||
An empty message will only clear the display at driver init time. Any other
|
||||
printf()-formatted message is valid with newline and escape codes.
|
||||
|
||||
endif # PANEL
|
||||
choice
|
||||
prompt "Backlight initial state"
|
||||
default CHARLCD_BL_FLASH
|
||||
|
||||
config CHARLCD_BL_OFF
|
||||
bool "Off"
|
||||
help
|
||||
Backlight is initially turned off
|
||||
|
||||
config CHARLCD_BL_ON
|
||||
bool "On"
|
||||
help
|
||||
Backlight is initially turned on
|
||||
|
||||
config CHARLCD_BL_FLASH
|
||||
bool "Flash"
|
||||
help
|
||||
Backlight is flashed briefly on init
|
||||
|
||||
endchoice
|
||||
|
||||
endif # AUXDISPLAY
|
||||
|
||||
config PANEL
|
||||
tristate "Parallel port LCD/Keypad Panel support (OLD OPTION)"
|
||||
depends on PARPORT
|
||||
select AUXDISPLAY
|
||||
select PARPORT_PANEL
|
||||
|
||||
config CHARLCD
|
||||
tristate "Character LCD core support" if COMPILE_TEST
|
||||
|
|
|
@ -10,4 +10,4 @@ obj-$(CONFIG_CFAG12864B) += cfag12864b.o cfag12864bfb.o
|
|||
obj-$(CONFIG_IMG_ASCII_LCD) += img-ascii-lcd.o
|
||||
obj-$(CONFIG_HD44780) += hd44780.o
|
||||
obj-$(CONFIG_HT16K33) += ht16k33.o
|
||||
obj-$(CONFIG_PANEL) += panel.o
|
||||
obj-$(CONFIG_PARPORT_PANEL) += panel.o
|
||||
|
|
|
@ -91,7 +91,7 @@ struct charlcd_priv {
|
|||
unsigned long long drvdata[0];
|
||||
};
|
||||
|
||||
#define to_priv(p) container_of(p, struct charlcd_priv, lcd)
|
||||
#define charlcd_to_priv(p) container_of(p, struct charlcd_priv, lcd)
|
||||
|
||||
/* Device single-open policy control */
|
||||
static atomic_t charlcd_available = ATOMIC_INIT(1);
|
||||
|
@ -105,7 +105,7 @@ static void long_sleep(int ms)
|
|||
/* turn the backlight on or off */
|
||||
static void charlcd_backlight(struct charlcd *lcd, int on)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
if (!lcd->ops->backlight)
|
||||
return;
|
||||
|
@ -134,7 +134,7 @@ static void charlcd_bl_off(struct work_struct *work)
|
|||
/* turn the backlight on for a little while */
|
||||
void charlcd_poke(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
if (!lcd->ops->backlight)
|
||||
return;
|
||||
|
@ -152,7 +152,7 @@ EXPORT_SYMBOL_GPL(charlcd_poke);
|
|||
|
||||
static void charlcd_gotoxy(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
unsigned int addr;
|
||||
|
||||
/*
|
||||
|
@ -170,7 +170,7 @@ static void charlcd_gotoxy(struct charlcd *lcd)
|
|||
|
||||
static void charlcd_home(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
priv->addr.x = 0;
|
||||
priv->addr.y = 0;
|
||||
|
@ -179,7 +179,7 @@ static void charlcd_home(struct charlcd *lcd)
|
|||
|
||||
static void charlcd_print(struct charlcd *lcd, char c)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
if (priv->addr.x < lcd->bwidth) {
|
||||
if (lcd->char_conv)
|
||||
|
@ -211,7 +211,7 @@ static void charlcd_clear_fast(struct charlcd *lcd)
|
|||
/* clears the display and resets X/Y */
|
||||
static void charlcd_clear_display(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
lcd->ops->write_cmd(lcd, LCD_CMD_DISPLAY_CLEAR);
|
||||
priv->addr.x = 0;
|
||||
|
@ -223,7 +223,7 @@ static void charlcd_clear_display(struct charlcd *lcd)
|
|||
static int charlcd_init_display(struct charlcd *lcd)
|
||||
{
|
||||
void (*write_cmd_raw)(struct charlcd *lcd, int cmd);
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
u8 init;
|
||||
|
||||
if (lcd->ifwidth != 4 && lcd->ifwidth != 8)
|
||||
|
@ -369,7 +369,7 @@ static bool parse_xy(const char *s, unsigned long *x, unsigned long *y)
|
|||
|
||||
static inline int handle_lcd_special_code(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
/* LCD special codes */
|
||||
|
||||
|
@ -580,7 +580,7 @@ static inline int handle_lcd_special_code(struct charlcd *lcd)
|
|||
|
||||
static void charlcd_write_char(struct charlcd *lcd, char c)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
/* first, we'll test if we're in escape mode */
|
||||
if ((c != '\n') && priv->esc_seq.len >= 0) {
|
||||
|
@ -705,7 +705,7 @@ static ssize_t charlcd_write(struct file *file, const char __user *buf,
|
|||
|
||||
static int charlcd_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(the_charlcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(the_charlcd);
|
||||
int ret;
|
||||
|
||||
ret = -EBUSY;
|
||||
|
@ -763,10 +763,24 @@ static void charlcd_puts(struct charlcd *lcd, const char *s)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PANEL_BOOT_MESSAGE
|
||||
#define LCD_INIT_TEXT CONFIG_PANEL_BOOT_MESSAGE
|
||||
#else
|
||||
#define LCD_INIT_TEXT "Linux-" UTS_RELEASE "\n"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CHARLCD_BL_ON
|
||||
#define LCD_INIT_BL "\x1b[L+"
|
||||
#elif defined(CONFIG_CHARLCD_BL_FLASH)
|
||||
#define LCD_INIT_BL "\x1b[L*"
|
||||
#else
|
||||
#define LCD_INIT_BL "\x1b[L-"
|
||||
#endif
|
||||
|
||||
/* initialize the LCD driver */
|
||||
static int charlcd_init(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
int ret;
|
||||
|
||||
if (lcd->ops->backlight) {
|
||||
|
@ -784,13 +798,8 @@ static int charlcd_init(struct charlcd *lcd)
|
|||
return ret;
|
||||
|
||||
/* display a short message */
|
||||
#ifdef CONFIG_PANEL_CHANGE_MESSAGE
|
||||
#ifdef CONFIG_PANEL_BOOT_MESSAGE
|
||||
charlcd_puts(lcd, "\x1b[Lc\x1b[Lb\x1b[L*" CONFIG_PANEL_BOOT_MESSAGE);
|
||||
#endif
|
||||
#else
|
||||
charlcd_puts(lcd, "\x1b[Lc\x1b[Lb\x1b[L*Linux-" UTS_RELEASE "\n");
|
||||
#endif
|
||||
charlcd_puts(lcd, "\x1b[Lc\x1b[Lb" LCD_INIT_BL LCD_INIT_TEXT);
|
||||
|
||||
/* clear the display on the next device opening */
|
||||
priv->must_clear = true;
|
||||
charlcd_home(lcd);
|
||||
|
@ -818,6 +827,12 @@ struct charlcd *charlcd_alloc(unsigned int drvdata_size)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(charlcd_alloc);
|
||||
|
||||
void charlcd_free(struct charlcd *lcd)
|
||||
{
|
||||
kfree(charlcd_to_priv(lcd));
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(charlcd_free);
|
||||
|
||||
static int panel_notify_sys(struct notifier_block *this, unsigned long code,
|
||||
void *unused)
|
||||
{
|
||||
|
@ -866,7 +881,7 @@ EXPORT_SYMBOL_GPL(charlcd_register);
|
|||
|
||||
int charlcd_unregister(struct charlcd *lcd)
|
||||
{
|
||||
struct charlcd_priv *priv = to_priv(lcd);
|
||||
struct charlcd_priv *priv = charlcd_to_priv(lcd);
|
||||
|
||||
unregister_reboot_notifier(&panel_notifier);
|
||||
charlcd_puts(lcd, "\x0cLCD driver unloaded.\x1b[Lc\x1b[Lb\x1b[L-");
|
||||
|
|
|
@ -271,7 +271,7 @@ static int hd44780_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
|
||||
fail:
|
||||
kfree(lcd);
|
||||
charlcd_free(lcd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -280,6 +280,8 @@ static int hd44780_remove(struct platform_device *pdev)
|
|||
struct charlcd *lcd = platform_get_drvdata(pdev);
|
||||
|
||||
charlcd_unregister(lcd);
|
||||
|
||||
charlcd_free(lcd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -1620,7 +1620,7 @@ err_lcd_unreg:
|
|||
if (lcd.enabled)
|
||||
charlcd_unregister(lcd.charlcd);
|
||||
err_unreg_device:
|
||||
kfree(lcd.charlcd);
|
||||
charlcd_free(lcd.charlcd);
|
||||
lcd.charlcd = NULL;
|
||||
parport_unregister_device(pprt);
|
||||
pprt = NULL;
|
||||
|
@ -1647,7 +1647,7 @@ static void panel_detach(struct parport *port)
|
|||
if (lcd.enabled) {
|
||||
charlcd_unregister(lcd.charlcd);
|
||||
lcd.initialized = false;
|
||||
kfree(lcd.charlcd);
|
||||
charlcd_free(lcd.charlcd);
|
||||
lcd.charlcd = NULL;
|
||||
}
|
||||
|
||||
|
|
|
@ -1469,12 +1469,12 @@ static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,
|
|||
if (IS_ERR(gpd_data))
|
||||
return PTR_ERR(gpd_data);
|
||||
|
||||
genpd_lock(genpd);
|
||||
|
||||
ret = genpd->attach_dev ? genpd->attach_dev(genpd, dev) : 0;
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
genpd_lock(genpd);
|
||||
|
||||
dev_pm_domain_set(dev, &genpd->domain);
|
||||
|
||||
genpd->device_count++;
|
||||
|
@ -1482,9 +1482,8 @@ static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,
|
|||
|
||||
list_add_tail(&gpd_data->base.list_node, &genpd->dev_list);
|
||||
|
||||
out:
|
||||
genpd_unlock(genpd);
|
||||
|
||||
out:
|
||||
if (ret)
|
||||
genpd_free_dev_data(dev, gpd_data);
|
||||
else
|
||||
|
@ -1533,15 +1532,15 @@ static int genpd_remove_device(struct generic_pm_domain *genpd,
|
|||
genpd->device_count--;
|
||||
genpd->max_off_time_changed = true;
|
||||
|
||||
if (genpd->detach_dev)
|
||||
genpd->detach_dev(genpd, dev);
|
||||
|
||||
dev_pm_domain_set(dev, NULL);
|
||||
|
||||
list_del_init(&pdd->list_node);
|
||||
|
||||
genpd_unlock(genpd);
|
||||
|
||||
if (genpd->detach_dev)
|
||||
genpd->detach_dev(genpd, dev);
|
||||
|
||||
genpd_free_dev_data(dev, gpd_data);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -472,7 +472,7 @@ static int software_node_read_string_array(const struct fwnode_handle *fwnode,
|
|||
val, nval);
|
||||
}
|
||||
|
||||
struct fwnode_handle *
|
||||
static struct fwnode_handle *
|
||||
software_node_get_parent(const struct fwnode_handle *fwnode)
|
||||
{
|
||||
struct software_node *swnode = to_software_node(fwnode);
|
||||
|
@ -481,7 +481,7 @@ software_node_get_parent(const struct fwnode_handle *fwnode)
|
|||
NULL;
|
||||
}
|
||||
|
||||
struct fwnode_handle *
|
||||
static struct fwnode_handle *
|
||||
software_node_get_next_child(const struct fwnode_handle *fwnode,
|
||||
struct fwnode_handle *child)
|
||||
{
|
||||
|
|
|
@ -656,7 +656,7 @@ static int loop_validate_file(struct file *file, struct block_device *bdev)
|
|||
return -EBADF;
|
||||
|
||||
l = f->f_mapping->host->i_bdev->bd_disk->private_data;
|
||||
if (l->lo_state == Lo_unbound) {
|
||||
if (l->lo_state != Lo_bound) {
|
||||
return -EINVAL;
|
||||
}
|
||||
f = l->lo_backing_file;
|
||||
|
|
|
@ -749,8 +749,12 @@ static int pcd_detect(void)
|
|||
return 0;
|
||||
|
||||
printk("%s: No CD-ROM drive found\n", name);
|
||||
for (unit = 0, cd = pcd; unit < PCD_UNITS; unit++, cd++)
|
||||
for (unit = 0, cd = pcd; unit < PCD_UNITS; unit++, cd++) {
|
||||
blk_cleanup_queue(cd->disk->queue);
|
||||
cd->disk->queue = NULL;
|
||||
blk_mq_free_tag_set(&cd->tag_set);
|
||||
put_disk(cd->disk);
|
||||
}
|
||||
pi_unregister_driver(par_drv);
|
||||
return -1;
|
||||
}
|
||||
|
|
|
@ -761,8 +761,12 @@ static int pf_detect(void)
|
|||
return 0;
|
||||
|
||||
printk("%s: No ATAPI disk detected\n", name);
|
||||
for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++)
|
||||
for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++) {
|
||||
blk_cleanup_queue(pf->disk->queue);
|
||||
pf->disk->queue = NULL;
|
||||
blk_mq_free_tag_set(&pf->tag_set);
|
||||
put_disk(pf->disk);
|
||||
}
|
||||
pi_unregister_driver(par_drv);
|
||||
return -1;
|
||||
}
|
||||
|
@ -1047,13 +1051,15 @@ static void __exit pf_exit(void)
|
|||
int unit;
|
||||
unregister_blkdev(major, name);
|
||||
for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++) {
|
||||
if (!pf->present)
|
||||
continue;
|
||||
del_gendisk(pf->disk);
|
||||
if (pf->present)
|
||||
del_gendisk(pf->disk);
|
||||
|
||||
blk_cleanup_queue(pf->disk->queue);
|
||||
blk_mq_free_tag_set(&pf->tag_set);
|
||||
put_disk(pf->disk);
|
||||
pi_release(pf->pi);
|
||||
|
||||
if (pf->present)
|
||||
pi_release(pf->pi);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -833,7 +833,7 @@ static int parse_rbd_opts_token(char *c, void *private)
|
|||
pctx->opts->queue_depth = intval;
|
||||
break;
|
||||
case Opt_alloc_size:
|
||||
if (intval < 1) {
|
||||
if (intval < SECTOR_SIZE) {
|
||||
pr_err("alloc_size out of range\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -924,23 +924,6 @@ static void rbd_put_client(struct rbd_client *rbdc)
|
|||
kref_put(&rbdc->kref, rbd_client_release);
|
||||
}
|
||||
|
||||
static int wait_for_latest_osdmap(struct ceph_client *client)
|
||||
{
|
||||
u64 newest_epoch;
|
||||
int ret;
|
||||
|
||||
ret = ceph_monc_get_version(&client->monc, "osdmap", &newest_epoch);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (client->osdc.osdmap->epoch >= newest_epoch)
|
||||
return 0;
|
||||
|
||||
ceph_osdc_maybe_request_map(&client->osdc);
|
||||
return ceph_monc_wait_osdmap(&client->monc, newest_epoch,
|
||||
client->options->mount_timeout);
|
||||
}
|
||||
|
||||
/*
|
||||
* Get a ceph client with specific addr and configuration, if one does
|
||||
* not exist create it. Either way, ceph_opts is consumed by this
|
||||
|
@ -960,7 +943,8 @@ static struct rbd_client *rbd_get_client(struct ceph_options *ceph_opts)
|
|||
* Using an existing client. Make sure ->pg_pools is up to
|
||||
* date before we look up the pool id in do_rbd_add().
|
||||
*/
|
||||
ret = wait_for_latest_osdmap(rbdc->client);
|
||||
ret = ceph_wait_for_latest_osdmap(rbdc->client,
|
||||
rbdc->client->options->mount_timeout);
|
||||
if (ret) {
|
||||
rbd_warn(NULL, "failed to get latest osdmap: %d", ret);
|
||||
rbd_put_client(rbdc);
|
||||
|
@ -4203,12 +4187,12 @@ static int rbd_init_disk(struct rbd_device *rbd_dev)
|
|||
q->limits.max_sectors = queue_max_hw_sectors(q);
|
||||
blk_queue_max_segments(q, USHRT_MAX);
|
||||
blk_queue_max_segment_size(q, UINT_MAX);
|
||||
blk_queue_io_min(q, objset_bytes);
|
||||
blk_queue_io_opt(q, objset_bytes);
|
||||
blk_queue_io_min(q, rbd_dev->opts->alloc_size);
|
||||
blk_queue_io_opt(q, rbd_dev->opts->alloc_size);
|
||||
|
||||
if (rbd_dev->opts->trim) {
|
||||
blk_queue_flag_set(QUEUE_FLAG_DISCARD, q);
|
||||
q->limits.discard_granularity = objset_bytes;
|
||||
q->limits.discard_granularity = rbd_dev->opts->alloc_size;
|
||||
blk_queue_max_discard_sectors(q, objset_bytes >> SECTOR_SHIFT);
|
||||
blk_queue_max_write_zeroes_sectors(q, objset_bytes >> SECTOR_SHIFT);
|
||||
}
|
||||
|
|
|
@ -31,16 +31,9 @@ static u64 notrace clps711x_sched_clock_read(void)
|
|||
return ~readw(tcd);
|
||||
}
|
||||
|
||||
static int __init _clps711x_clksrc_init(struct clk *clock, void __iomem *base)
|
||||
static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base)
|
||||
{
|
||||
unsigned long rate;
|
||||
|
||||
if (!base)
|
||||
return -ENOMEM;
|
||||
if (IS_ERR(clock))
|
||||
return PTR_ERR(clock);
|
||||
|
||||
rate = clk_get_rate(clock);
|
||||
unsigned long rate = clk_get_rate(clock);
|
||||
|
||||
tcd = base;
|
||||
|
||||
|
@ -48,8 +41,6 @@ static int __init _clps711x_clksrc_init(struct clk *clock, void __iomem *base)
|
|||
clocksource_mmio_readw_down);
|
||||
|
||||
sched_clock_register(clps711x_sched_clock_read, 16, rate);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id)
|
||||
|
@ -67,13 +58,6 @@ static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base,
|
|||
struct clock_event_device *clkevt;
|
||||
unsigned long rate;
|
||||
|
||||
if (!irq)
|
||||
return -EINVAL;
|
||||
if (!base)
|
||||
return -ENOMEM;
|
||||
if (IS_ERR(clock))
|
||||
return PTR_ERR(clock);
|
||||
|
||||
clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL);
|
||||
if (!clkevt)
|
||||
return -ENOMEM;
|
||||
|
@ -93,31 +77,29 @@ static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base,
|
|||
"clps711x-timer", clkevt);
|
||||
}
|
||||
|
||||
void __init clps711x_clksrc_init(void __iomem *tc1_base, void __iomem *tc2_base,
|
||||
unsigned int irq)
|
||||
{
|
||||
struct clk *tc1 = clk_get_sys("clps711x-timer.0", NULL);
|
||||
struct clk *tc2 = clk_get_sys("clps711x-timer.1", NULL);
|
||||
|
||||
BUG_ON(_clps711x_clksrc_init(tc1, tc1_base));
|
||||
BUG_ON(_clps711x_clkevt_init(tc2, tc2_base, irq));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_TIMER_OF
|
||||
static int __init clps711x_timer_init(struct device_node *np)
|
||||
{
|
||||
unsigned int irq = irq_of_parse_and_map(np, 0);
|
||||
struct clk *clock = of_clk_get(np, 0);
|
||||
void __iomem *base = of_iomap(np, 0);
|
||||
|
||||
if (!base)
|
||||
return -ENOMEM;
|
||||
if (!irq)
|
||||
return -EINVAL;
|
||||
if (IS_ERR(clock))
|
||||
return PTR_ERR(clock);
|
||||
|
||||
switch (of_alias_get_id(np, "timer")) {
|
||||
case CLPS711X_CLKSRC_CLOCKSOURCE:
|
||||
return _clps711x_clksrc_init(clock, base);
|
||||
clps711x_clksrc_init(clock, base);
|
||||
break;
|
||||
case CLPS711X_CLKSRC_CLOCKEVENT:
|
||||
return _clps711x_clkevt_init(clock, base, irq);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);
|
||||
#endif
|
||||
|
|
|
@ -67,7 +67,7 @@ static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
struct irqaction gic_compare_irqaction = {
|
||||
static struct irqaction gic_compare_irqaction = {
|
||||
.handler = gic_compare_interrupt,
|
||||
.percpu_dev_id = &gic_clockevent_device,
|
||||
.flags = IRQF_PERCPU | IRQF_TIMER,
|
||||
|
|
|
@ -71,7 +71,7 @@ static u64 tc_get_cycles32(struct clocksource *cs)
|
|||
return readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV));
|
||||
}
|
||||
|
||||
void tc_clksrc_suspend(struct clocksource *cs)
|
||||
static void tc_clksrc_suspend(struct clocksource *cs)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
@ -86,7 +86,7 @@ void tc_clksrc_suspend(struct clocksource *cs)
|
|||
bmr_cache = readl(tcaddr + ATMEL_TC_BMR);
|
||||
}
|
||||
|
||||
void tc_clksrc_resume(struct clocksource *cs)
|
||||
static void tc_clksrc_resume(struct clocksource *cs)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
|
@ -58,7 +58,7 @@ static u64 riscv_sched_clock(void)
|
|||
static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
|
||||
.name = "riscv_clocksource",
|
||||
.rating = 300,
|
||||
.mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
.read = riscv_clocksource_rdtime,
|
||||
};
|
||||
|
@ -120,8 +120,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
|
|||
return error;
|
||||
}
|
||||
|
||||
sched_clock_register(riscv_sched_clock,
|
||||
BITS_PER_LONG, riscv_timebase);
|
||||
sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
|
||||
|
||||
error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
|
||||
"clockevents/riscv/timer:starting",
|
||||
|
|
|
@ -586,8 +586,8 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
|
|||
}
|
||||
|
||||
/* Optimized set_load which removes costly spin wait in timer_start */
|
||||
int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
|
||||
unsigned int load)
|
||||
static int omap_dm_timer_set_load_start(struct omap_dm_timer *timer,
|
||||
int autoreload, unsigned int load)
|
||||
{
|
||||
u32 l;
|
||||
|
||||
|
|
|
@ -700,6 +700,8 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
|
|||
struct amdgpu_vm_bo_base *bo_base, *tmp;
|
||||
int r = 0;
|
||||
|
||||
vm->bulk_moveable &= list_empty(&vm->evicted);
|
||||
|
||||
list_for_each_entry_safe(bo_base, tmp, &vm->evicted, vm_status) {
|
||||
struct amdgpu_bo *bo = bo_base->bo;
|
||||
|
||||
|
|
|
@ -742,7 +742,7 @@ static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev)
|
|||
}
|
||||
|
||||
ring->vm_inv_eng = inv_eng - 1;
|
||||
change_bit(inv_eng - 1, (unsigned long *)(&vm_inv_engs[vmhub]));
|
||||
vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
|
||||
|
||||
dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
|
||||
ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include "regs-vp.h"
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/ktime.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/i2c.h>
|
||||
|
@ -352,15 +353,62 @@ static void mixer_cfg_vp_blend(struct mixer_context *ctx, unsigned int alpha)
|
|||
mixer_reg_write(ctx, MXR_VIDEO_CFG, val);
|
||||
}
|
||||
|
||||
static void mixer_vsync_set_update(struct mixer_context *ctx, bool enable)
|
||||
static bool mixer_is_synced(struct mixer_context *ctx)
|
||||
{
|
||||
/* block update on vsync */
|
||||
mixer_reg_writemask(ctx, MXR_STATUS, enable ?
|
||||
MXR_STATUS_SYNC_ENABLE : 0, MXR_STATUS_SYNC_ENABLE);
|
||||
u32 base, shadow;
|
||||
|
||||
if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
|
||||
ctx->mxr_ver == MXR_VER_128_0_0_184)
|
||||
return !(mixer_reg_read(ctx, MXR_CFG) &
|
||||
MXR_CFG_LAYER_UPDATE_COUNT_MASK);
|
||||
|
||||
if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags) &&
|
||||
vp_reg_read(ctx, VP_SHADOW_UPDATE))
|
||||
return false;
|
||||
|
||||
base = mixer_reg_read(ctx, MXR_CFG);
|
||||
shadow = mixer_reg_read(ctx, MXR_CFG_S);
|
||||
if (base != shadow)
|
||||
return false;
|
||||
|
||||
base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(0));
|
||||
shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(0));
|
||||
if (base != shadow)
|
||||
return false;
|
||||
|
||||
base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(1));
|
||||
shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(1));
|
||||
if (base != shadow)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static int mixer_wait_for_sync(struct mixer_context *ctx)
|
||||
{
|
||||
ktime_t timeout = ktime_add_us(ktime_get(), 100000);
|
||||
|
||||
while (!mixer_is_synced(ctx)) {
|
||||
usleep_range(1000, 2000);
|
||||
if (ktime_compare(ktime_get(), timeout) > 0)
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void mixer_disable_sync(struct mixer_context *ctx)
|
||||
{
|
||||
mixer_reg_writemask(ctx, MXR_STATUS, 0, MXR_STATUS_SYNC_ENABLE);
|
||||
}
|
||||
|
||||
static void mixer_enable_sync(struct mixer_context *ctx)
|
||||
{
|
||||
if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
|
||||
ctx->mxr_ver == MXR_VER_128_0_0_184)
|
||||
mixer_reg_writemask(ctx, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE);
|
||||
mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SYNC_ENABLE);
|
||||
if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags))
|
||||
vp_reg_write(ctx, VP_SHADOW_UPDATE, enable ?
|
||||
VP_SHADOW_UPDATE_ENABLE : 0);
|
||||
vp_reg_write(ctx, VP_SHADOW_UPDATE, VP_SHADOW_UPDATE_ENABLE);
|
||||
}
|
||||
|
||||
static void mixer_cfg_scan(struct mixer_context *ctx, int width, int height)
|
||||
|
@ -498,7 +546,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
|
|||
|
||||
spin_lock_irqsave(&ctx->reg_slock, flags);
|
||||
|
||||
vp_reg_write(ctx, VP_SHADOW_UPDATE, 1);
|
||||
/* interlace or progressive scan mode */
|
||||
val = (test_bit(MXR_BIT_INTERLACE, &ctx->flags) ? ~0 : 0);
|
||||
vp_reg_writemask(ctx, VP_MODE, val, VP_MODE_LINE_SKIP);
|
||||
|
@ -553,11 +600,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
|
|||
vp_regs_dump(ctx);
|
||||
}
|
||||
|
||||
static void mixer_layer_update(struct mixer_context *ctx)
|
||||
{
|
||||
mixer_reg_writemask(ctx, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE);
|
||||
}
|
||||
|
||||
static void mixer_graph_buffer(struct mixer_context *ctx,
|
||||
struct exynos_drm_plane *plane)
|
||||
{
|
||||
|
@ -640,11 +682,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
|
|||
mixer_cfg_layer(ctx, win, priority, true);
|
||||
mixer_cfg_gfx_blend(ctx, win, pixel_alpha, state->base.alpha);
|
||||
|
||||
/* layer update mandatory for mixer 16.0.33.0 */
|
||||
if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
|
||||
ctx->mxr_ver == MXR_VER_128_0_0_184)
|
||||
mixer_layer_update(ctx);
|
||||
|
||||
spin_unlock_irqrestore(&ctx->reg_slock, flags);
|
||||
|
||||
mixer_regs_dump(ctx);
|
||||
|
@ -709,7 +746,7 @@ static void mixer_win_reset(struct mixer_context *ctx)
|
|||
static irqreturn_t mixer_irq_handler(int irq, void *arg)
|
||||
{
|
||||
struct mixer_context *ctx = arg;
|
||||
u32 val, base, shadow;
|
||||
u32 val;
|
||||
|
||||
spin_lock(&ctx->reg_slock);
|
||||
|
||||
|
@ -723,26 +760,9 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
|
|||
val &= ~MXR_INT_STATUS_VSYNC;
|
||||
|
||||
/* interlace scan need to check shadow register */
|
||||
if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) {
|
||||
if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags) &&
|
||||
vp_reg_read(ctx, VP_SHADOW_UPDATE))
|
||||
goto out;
|
||||
|
||||
base = mixer_reg_read(ctx, MXR_CFG);
|
||||
shadow = mixer_reg_read(ctx, MXR_CFG_S);
|
||||
if (base != shadow)
|
||||
goto out;
|
||||
|
||||
base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(0));
|
||||
shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(0));
|
||||
if (base != shadow)
|
||||
goto out;
|
||||
|
||||
base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(1));
|
||||
shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(1));
|
||||
if (base != shadow)
|
||||
goto out;
|
||||
}
|
||||
if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)
|
||||
&& !mixer_is_synced(ctx))
|
||||
goto out;
|
||||
|
||||
drm_crtc_handle_vblank(&ctx->crtc->base);
|
||||
}
|
||||
|
@ -917,12 +937,14 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc)
|
|||
|
||||
static void mixer_atomic_begin(struct exynos_drm_crtc *crtc)
|
||||
{
|
||||
struct mixer_context *mixer_ctx = crtc->ctx;
|
||||
struct mixer_context *ctx = crtc->ctx;
|
||||
|
||||
if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags))
|
||||
if (!test_bit(MXR_BIT_POWERED, &ctx->flags))
|
||||
return;
|
||||
|
||||
mixer_vsync_set_update(mixer_ctx, false);
|
||||
if (mixer_wait_for_sync(ctx))
|
||||
dev_err(ctx->dev, "timeout waiting for VSYNC\n");
|
||||
mixer_disable_sync(ctx);
|
||||
}
|
||||
|
||||
static void mixer_update_plane(struct exynos_drm_crtc *crtc,
|
||||
|
@ -964,7 +986,7 @@ static void mixer_atomic_flush(struct exynos_drm_crtc *crtc)
|
|||
if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags))
|
||||
return;
|
||||
|
||||
mixer_vsync_set_update(mixer_ctx, true);
|
||||
mixer_enable_sync(mixer_ctx);
|
||||
exynos_crtc_handle_event(crtc);
|
||||
}
|
||||
|
||||
|
@ -979,7 +1001,7 @@ static void mixer_enable(struct exynos_drm_crtc *crtc)
|
|||
|
||||
exynos_drm_pipe_clk_enable(crtc, true);
|
||||
|
||||
mixer_vsync_set_update(ctx, false);
|
||||
mixer_disable_sync(ctx);
|
||||
|
||||
mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);
|
||||
|
||||
|
@ -992,7 +1014,7 @@ static void mixer_enable(struct exynos_drm_crtc *crtc)
|
|||
|
||||
mixer_commit(ctx);
|
||||
|
||||
mixer_vsync_set_update(ctx, true);
|
||||
mixer_enable_sync(ctx);
|
||||
|
||||
set_bit(MXR_BIT_POWERED, &ctx->flags);
|
||||
}
|
||||
|
|
|
@ -1734,8 +1734,13 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
|
|||
* pages from.
|
||||
*/
|
||||
if (!obj->base.filp) {
|
||||
i915_gem_object_put(obj);
|
||||
return -ENXIO;
|
||||
addr = -ENXIO;
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (range_overflows(args->offset, args->size, (u64)obj->base.size)) {
|
||||
addr = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
addr = vm_mmap(obj->base.filp, 0, args->size,
|
||||
|
@ -1749,8 +1754,8 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
|
|||
struct vm_area_struct *vma;
|
||||
|
||||
if (down_write_killable(&mm->mmap_sem)) {
|
||||
i915_gem_object_put(obj);
|
||||
return -EINTR;
|
||||
addr = -EINTR;
|
||||
goto err;
|
||||
}
|
||||
vma = find_vma(mm, addr);
|
||||
if (vma && __vma_matches(vma, obj->base.filp, addr, args->size))
|
||||
|
@ -1768,12 +1773,10 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
|
|||
i915_gem_object_put(obj);
|
||||
|
||||
args->addr_ptr = (u64)addr;
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
i915_gem_object_put(obj);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
|
|
|
@ -1721,7 +1721,7 @@ error_msg(struct i915_gpu_state *error, unsigned long engines, const char *msg)
|
|||
i915_error_generate_code(error, engines));
|
||||
if (engines) {
|
||||
/* Just show the first executing process, more is confusing */
|
||||
i = ffs(engines);
|
||||
i = __ffs(engines);
|
||||
len += scnprintf(error->error_msg + len,
|
||||
sizeof(error->error_msg) - len,
|
||||
", in %s [%d]",
|
||||
|
|
|
@ -1673,6 +1673,7 @@ init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
|
|||
info->supports_dvi = (port != PORT_A && port != PORT_E);
|
||||
info->supports_hdmi = info->supports_dvi;
|
||||
info->supports_dp = (port != PORT_E);
|
||||
info->supports_edp = (port == PORT_A);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -181,7 +181,7 @@ nouveau_debugfs_pstate_set(struct file *file, const char __user *ubuf,
|
|||
}
|
||||
|
||||
ret = pm_runtime_get_sync(drm->dev);
|
||||
if (IS_ERR_VALUE(ret) && ret != -EACCES)
|
||||
if (ret < 0 && ret != -EACCES)
|
||||
return ret;
|
||||
ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_USER, &args, sizeof(args));
|
||||
pm_runtime_put_autosuspend(drm->dev);
|
||||
|
|
|
@ -100,12 +100,10 @@ static void
|
|||
nouveau_dmem_free(struct hmm_devmem *devmem, struct page *page)
|
||||
{
|
||||
struct nouveau_dmem_chunk *chunk;
|
||||
struct nouveau_drm *drm;
|
||||
unsigned long idx;
|
||||
|
||||
chunk = (void *)hmm_devmem_page_get_drvdata(page);
|
||||
idx = page_to_pfn(page) - chunk->pfn_first;
|
||||
drm = chunk->drm;
|
||||
|
||||
/*
|
||||
* FIXME:
|
||||
|
@ -456,11 +454,6 @@ nouveau_dmem_resume(struct nouveau_drm *drm)
|
|||
/* FIXME handle pin failure */
|
||||
WARN_ON(ret);
|
||||
}
|
||||
list_for_each_entry (chunk, &drm->dmem->chunk_empty, list) {
|
||||
ret = nouveau_bo_pin(chunk->bo, TTM_PL_FLAG_VRAM, false);
|
||||
/* FIXME handle pin failure */
|
||||
WARN_ON(ret);
|
||||
}
|
||||
mutex_unlock(&drm->dmem->mutex);
|
||||
}
|
||||
|
||||
|
@ -479,9 +472,6 @@ nouveau_dmem_suspend(struct nouveau_drm *drm)
|
|||
list_for_each_entry (chunk, &drm->dmem->chunk_full, list) {
|
||||
nouveau_bo_unpin(chunk->bo);
|
||||
}
|
||||
list_for_each_entry (chunk, &drm->dmem->chunk_empty, list) {
|
||||
nouveau_bo_unpin(chunk->bo);
|
||||
}
|
||||
mutex_unlock(&drm->dmem->mutex);
|
||||
}
|
||||
|
||||
|
@ -623,7 +613,7 @@ nouveau_dmem_init(struct nouveau_drm *drm)
|
|||
*/
|
||||
drm->dmem->devmem = hmm_devmem_add(&nouveau_dmem_devmem_ops,
|
||||
device, size);
|
||||
if (drm->dmem->devmem == NULL) {
|
||||
if (IS_ERR(drm->dmem->devmem)) {
|
||||
kfree(drm->dmem);
|
||||
drm->dmem = NULL;
|
||||
return;
|
||||
|
|
|
@ -224,7 +224,7 @@ int udl_gem_mmap(struct drm_file *file, struct drm_device *dev,
|
|||
*offset = drm_vma_node_offset_addr(&gobj->base.vma_node);
|
||||
|
||||
out:
|
||||
drm_gem_object_put(&gobj->base);
|
||||
drm_gem_object_put_unlocked(&gobj->base);
|
||||
unlock:
|
||||
mutex_unlock(&udl->gem_lock);
|
||||
return ret;
|
||||
|
|
|
@ -564,11 +564,9 @@ static int vmw_fb_set_par(struct fb_info *info)
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
|
||||
};
|
||||
struct drm_display_mode *old_mode;
|
||||
struct drm_display_mode *mode;
|
||||
int ret;
|
||||
|
||||
old_mode = par->set_mode;
|
||||
mode = drm_mode_duplicate(vmw_priv->dev, &new_mode);
|
||||
if (!mode) {
|
||||
DRM_ERROR("Could not create new fb mode.\n");
|
||||
|
@ -579,11 +577,7 @@ static int vmw_fb_set_par(struct fb_info *info)
|
|||
mode->vdisplay = var->yres;
|
||||
vmw_guess_mode_timing(mode);
|
||||
|
||||
if (old_mode && drm_mode_equal(old_mode, mode)) {
|
||||
drm_mode_destroy(vmw_priv->dev, mode);
|
||||
mode = old_mode;
|
||||
old_mode = NULL;
|
||||
} else if (!vmw_kms_validate_mode_vram(vmw_priv,
|
||||
if (!vmw_kms_validate_mode_vram(vmw_priv,
|
||||
mode->hdisplay *
|
||||
DIV_ROUND_UP(var->bits_per_pixel, 8),
|
||||
mode->vdisplay)) {
|
||||
|
@ -620,8 +614,8 @@ static int vmw_fb_set_par(struct fb_info *info)
|
|||
schedule_delayed_work(&par->local_work, 0);
|
||||
|
||||
out_unlock:
|
||||
if (old_mode)
|
||||
drm_mode_destroy(vmw_priv->dev, old_mode);
|
||||
if (par->set_mode)
|
||||
drm_mode_destroy(vmw_priv->dev, par->set_mode);
|
||||
par->set_mode = mode;
|
||||
|
||||
mutex_unlock(&par->bo_mutex);
|
||||
|
|
|
@ -57,7 +57,7 @@ static int vmw_gmrid_man_get_node(struct ttm_mem_type_manager *man,
|
|||
|
||||
id = ida_alloc_max(&gman->gmr_ida, gman->max_gmr_ids - 1, GFP_KERNEL);
|
||||
if (id < 0)
|
||||
return id;
|
||||
return (id != -ENOMEM ? 0 : id);
|
||||
|
||||
spin_lock(&gman->lock);
|
||||
|
||||
|
|
|
@ -173,7 +173,12 @@ int i40iw_inetaddr_event(struct notifier_block *notifier,
|
|||
|
||||
rcu_read_lock();
|
||||
in = __in_dev_get_rcu(upper_dev);
|
||||
local_ipaddr = ntohl(in->ifa_list->ifa_address);
|
||||
|
||||
if (!in->ifa_list)
|
||||
local_ipaddr = 0;
|
||||
else
|
||||
local_ipaddr = ntohl(in->ifa_list->ifa_address);
|
||||
|
||||
rcu_read_unlock();
|
||||
} else {
|
||||
local_ipaddr = ntohl(ifa->ifa_address);
|
||||
|
@ -185,6 +190,11 @@ int i40iw_inetaddr_event(struct notifier_block *notifier,
|
|||
case NETDEV_UP:
|
||||
/* Fall through */
|
||||
case NETDEV_CHANGEADDR:
|
||||
|
||||
/* Just skip if no need to handle ARP cache */
|
||||
if (!local_ipaddr)
|
||||
break;
|
||||
|
||||
i40iw_manage_arp_cache(iwdev,
|
||||
netdev->dev_addr,
|
||||
&local_ipaddr,
|
||||
|
|
|
@ -804,8 +804,8 @@ void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev)
|
|||
unsigned long flags;
|
||||
|
||||
for (i = 0 ; i < dev->num_ports; i++) {
|
||||
cancel_delayed_work(&dev->sriov.alias_guid.ports_guid[i].alias_guid_work);
|
||||
det = &sriov->alias_guid.ports_guid[i];
|
||||
cancel_delayed_work_sync(&det->alias_guid_work);
|
||||
spin_lock_irqsave(&sriov->alias_guid.ag_work_lock, flags);
|
||||
while (!list_empty(&det->cb_list)) {
|
||||
cb_ctx = list_entry(det->cb_list.next,
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
|
||||
enum devx_obj_flags {
|
||||
DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
|
||||
DEVX_OBJ_FLAGS_DCT = 1 << 1,
|
||||
};
|
||||
|
||||
struct devx_async_data {
|
||||
|
@ -39,7 +40,10 @@ struct devx_obj {
|
|||
u32 dinlen; /* destroy inbox length */
|
||||
u32 dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW];
|
||||
u32 flags;
|
||||
struct mlx5_ib_devx_mr devx_mr;
|
||||
union {
|
||||
struct mlx5_ib_devx_mr devx_mr;
|
||||
struct mlx5_core_dct core_dct;
|
||||
};
|
||||
};
|
||||
|
||||
struct devx_umem {
|
||||
|
@ -347,7 +351,6 @@ static u64 devx_get_obj_id(const void *in)
|
|||
obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
|
||||
MLX5_GET(arm_rq_in, in, srq_number));
|
||||
break;
|
||||
case MLX5_CMD_OP_DRAIN_DCT:
|
||||
case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
|
||||
obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
|
||||
MLX5_GET(drain_dct_in, in, dctn));
|
||||
|
@ -618,7 +621,6 @@ static bool devx_is_obj_modify_cmd(const void *in)
|
|||
case MLX5_CMD_OP_2RST_QP:
|
||||
case MLX5_CMD_OP_ARM_XRC_SRQ:
|
||||
case MLX5_CMD_OP_ARM_RQ:
|
||||
case MLX5_CMD_OP_DRAIN_DCT:
|
||||
case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
|
||||
case MLX5_CMD_OP_ARM_XRQ:
|
||||
case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
|
||||
|
@ -1124,7 +1126,11 @@ static int devx_obj_cleanup(struct ib_uobject *uobject,
|
|||
if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY)
|
||||
devx_cleanup_mkey(obj);
|
||||
|
||||
ret = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
|
||||
if (obj->flags & DEVX_OBJ_FLAGS_DCT)
|
||||
ret = mlx5_core_destroy_dct(obj->mdev, &obj->core_dct);
|
||||
else
|
||||
ret = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out,
|
||||
sizeof(out));
|
||||
if (ib_is_destroy_retryable(ret, why, uobject))
|
||||
return ret;
|
||||
|
||||
|
@ -1185,9 +1191,17 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
|
|||
devx_set_umem_valid(cmd_in);
|
||||
}
|
||||
|
||||
err = mlx5_cmd_exec(dev->mdev, cmd_in,
|
||||
cmd_in_len,
|
||||
cmd_out, cmd_out_len);
|
||||
if (opcode == MLX5_CMD_OP_CREATE_DCT) {
|
||||
obj->flags |= DEVX_OBJ_FLAGS_DCT;
|
||||
err = mlx5_core_create_dct(dev->mdev, &obj->core_dct,
|
||||
cmd_in, cmd_in_len,
|
||||
cmd_out, cmd_out_len);
|
||||
} else {
|
||||
err = mlx5_cmd_exec(dev->mdev, cmd_in,
|
||||
cmd_in_len,
|
||||
cmd_out, cmd_out_len);
|
||||
}
|
||||
|
||||
if (err)
|
||||
goto obj_free;
|
||||
|
||||
|
@ -1214,7 +1228,11 @@ err_copy:
|
|||
if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY)
|
||||
devx_cleanup_mkey(obj);
|
||||
obj_destroy:
|
||||
mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
|
||||
if (obj->flags & DEVX_OBJ_FLAGS_DCT)
|
||||
mlx5_core_destroy_dct(obj->mdev, &obj->core_dct);
|
||||
else
|
||||
mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out,
|
||||
sizeof(out));
|
||||
obj_free:
|
||||
kfree(obj);
|
||||
return err;
|
||||
|
|
|
@ -415,10 +415,17 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u8 *active_speed,
|
|||
*active_speed = IB_SPEED_EDR;
|
||||
break;
|
||||
case MLX5E_PROT_MASK(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2):
|
||||
*active_width = IB_WIDTH_2X;
|
||||
*active_speed = IB_SPEED_EDR;
|
||||
break;
|
||||
case MLX5E_PROT_MASK(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR):
|
||||
*active_width = IB_WIDTH_1X;
|
||||
*active_speed = IB_SPEED_HDR;
|
||||
break;
|
||||
case MLX5E_PROT_MASK(MLX5E_CAUI_4_100GBASE_CR4_KR4):
|
||||
*active_width = IB_WIDTH_4X;
|
||||
*active_speed = IB_SPEED_EDR;
|
||||
break;
|
||||
case MLX5E_PROT_MASK(MLX5E_100GAUI_2_100GBASE_CR2_KR2):
|
||||
*active_width = IB_WIDTH_2X;
|
||||
*active_speed = IB_SPEED_HDR;
|
||||
|
|
|
@ -3729,6 +3729,7 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
|||
|
||||
} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
|
||||
struct mlx5_ib_modify_qp_resp resp = {};
|
||||
u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0};
|
||||
u32 min_resp_len = offsetof(typeof(resp), dctn) +
|
||||
sizeof(resp.dctn);
|
||||
|
||||
|
@ -3747,7 +3748,8 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
|||
MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
|
||||
|
||||
err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in,
|
||||
MLX5_ST_SZ_BYTES(create_dct_in));
|
||||
MLX5_ST_SZ_BYTES(create_dct_in), out,
|
||||
sizeof(out));
|
||||
if (err)
|
||||
return err;
|
||||
resp.dctn = qp->dct.mdct.mqp.qpn;
|
||||
|
|
|
@ -2608,7 +2608,12 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
|
|||
|
||||
/* Everything is mapped - write the right values into s->dma_address */
|
||||
for_each_sg(sglist, s, nelems, i) {
|
||||
s->dma_address += address + s->offset;
|
||||
/*
|
||||
* Add in the remaining piece of the scatter-gather offset that
|
||||
* was masked out when we were determining the physical address
|
||||
* via (sg_phys(s) & PAGE_MASK) earlier.
|
||||
*/
|
||||
s->dma_address += address + (s->offset & ~PAGE_MASK);
|
||||
s->dma_length = s->length;
|
||||
}
|
||||
|
||||
|
|
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