Merge branch 'for-2.6.24' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.24
This commit is contained in:
Коммит
8087ebd5a1
|
@ -599,7 +599,8 @@ config TASK_SIZE_BOOL
|
|||
|
||||
config TASK_SIZE
|
||||
hex "Size of user task space" if TASK_SIZE_BOOL
|
||||
default "0x80000000"
|
||||
default "0x80000000" if PPC_PREP || PPC_8xx
|
||||
default "0xc0000000"
|
||||
|
||||
config CONSISTENT_START_BOOL
|
||||
bool "Set custom consistent memory pool address"
|
||||
|
|
|
@ -121,7 +121,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
|
||||
reg = <119c0 30 0 2000>;
|
||||
reg = <119c0 30>;
|
||||
ranges;
|
||||
|
||||
muram@0 {
|
||||
|
|
|
@ -145,6 +145,42 @@
|
|||
device_type = "open-pic";
|
||||
big-endian;
|
||||
};
|
||||
|
||||
cpm@919c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8541-cpm", "fsl,cpm2";
|
||||
reg = <919c0 30>;
|
||||
ranges;
|
||||
|
||||
muram@80000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 80000 10000>;
|
||||
|
||||
data@0 {
|
||||
compatible = "fsl,cpm-muram-data";
|
||||
reg = <0 2000 9000 1000>;
|
||||
};
|
||||
};
|
||||
|
||||
brg@919f0 {
|
||||
compatible = "fsl,mpc8541-brg",
|
||||
"fsl,cpm2-brg",
|
||||
"fsl,cpm-brg";
|
||||
reg = <919f0 10 915f0 10>;
|
||||
};
|
||||
|
||||
cpmpic: pic@90c00 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <2e 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <90c00 80>;
|
||||
compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pci@e0008000 {
|
||||
|
|
|
@ -145,6 +145,42 @@
|
|||
device_type = "open-pic";
|
||||
big-endian;
|
||||
};
|
||||
|
||||
cpm@919c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
|
||||
reg = <919c0 30>;
|
||||
ranges;
|
||||
|
||||
muram@80000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 80000 10000>;
|
||||
|
||||
data@0 {
|
||||
compatible = "fsl,cpm-muram-data";
|
||||
reg = <0 2000 9000 1000>;
|
||||
};
|
||||
};
|
||||
|
||||
brg@919f0 {
|
||||
compatible = "fsl,mpc8555-brg",
|
||||
"fsl,cpm2-brg",
|
||||
"fsl,cpm-brg";
|
||||
reg = <919f0 10 915f0 10>;
|
||||
};
|
||||
|
||||
cpmpic: pic@90c00 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <2e 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <90c00 80>;
|
||||
compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pci@e0008000 {
|
||||
|
|
|
@ -138,15 +138,31 @@
|
|||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
cpm@e0000000 {
|
||||
cpm@919c0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "cpm";
|
||||
model = "CPM2";
|
||||
ranges = <0 0 c0000>;
|
||||
reg = <80000 40000>;
|
||||
command-proc = <919c0>;
|
||||
brg-frequency = <9d5b340>;
|
||||
compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
|
||||
reg = <919c0 30>;
|
||||
ranges;
|
||||
|
||||
muram@80000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 80000 10000>;
|
||||
|
||||
data@0 {
|
||||
compatible = "fsl,cpm-muram-data";
|
||||
reg = <0 4000 9000 2000>;
|
||||
};
|
||||
};
|
||||
|
||||
brg@919f0 {
|
||||
compatible = "fsl,mpc8560-brg",
|
||||
"fsl,cpm2-brg",
|
||||
"fsl,cpm-brg";
|
||||
reg = <919f0 10 915f0 10>;
|
||||
clock-frequency = <d#165000000>;
|
||||
};
|
||||
|
||||
cpmpic: pic@90c00 {
|
||||
interrupt-controller;
|
||||
|
@ -155,43 +171,38 @@
|
|||
interrupts = <2e 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <90c00 80>;
|
||||
device_type = "cpm-pic";
|
||||
compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
|
||||
};
|
||||
|
||||
scc@91a00 {
|
||||
serial@91a00 {
|
||||
device_type = "serial";
|
||||
compatible = "cpm_uart";
|
||||
model = "SCC";
|
||||
device-id = <1>;
|
||||
compatible = "fsl,mpc8560-scc-uart",
|
||||
"fsl,cpm2-scc-uart";
|
||||
reg = <91a00 20 88000 100>;
|
||||
clock-setup = <00ffffff 0>;
|
||||
rx-clock = <1>;
|
||||
tx-clock = <1>;
|
||||
fsl,cpm-brg = <1>;
|
||||
fsl,cpm-command = <00800000>;
|
||||
current-speed = <1c200>;
|
||||
interrupts = <28 8>;
|
||||
interrupt-parent = <&cpmpic>;
|
||||
};
|
||||
|
||||
scc@91a20 {
|
||||
serial@91a20 {
|
||||
device_type = "serial";
|
||||
compatible = "cpm_uart";
|
||||
model = "SCC";
|
||||
device-id = <2>;
|
||||
compatible = "fsl,mpc8560-scc-uart",
|
||||
"fsl,cpm2-scc-uart";
|
||||
reg = <91a20 20 88100 100>;
|
||||
clock-setup = <ff00ffff 90000>;
|
||||
rx-clock = <2>;
|
||||
tx-clock = <2>;
|
||||
fsl,cpm-brg = <2>;
|
||||
fsl,cpm-command = <04a00000>;
|
||||
current-speed = <1c200>;
|
||||
interrupts = <29 8>;
|
||||
interrupt-parent = <&cpmpic>;
|
||||
};
|
||||
|
||||
fcc@91320 {
|
||||
ethernet@91320 {
|
||||
device_type = "network";
|
||||
compatible = "fs_enet";
|
||||
model = "FCC";
|
||||
device-id = <2>;
|
||||
reg = <91320 20 88500 100 913a0 30>;
|
||||
compatible = "fsl,mpc8560-fcc-enet",
|
||||
"fsl,cpm2-fcc-enet";
|
||||
reg = <91320 20 88500 100 913b0 1>;
|
||||
/*
|
||||
* mac-address is deprecated and will be removed
|
||||
* in 2.6.25. Only recent versions of
|
||||
|
@ -199,20 +210,17 @@
|
|||
*/
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
clock-setup = <ff00ffff 250000>;
|
||||
rx-clock = <15>;
|
||||
tx-clock = <16>;
|
||||
fsl,cpm-command = <16200300>;
|
||||
interrupts = <21 8>;
|
||||
interrupt-parent = <&cpmpic>;
|
||||
phy-handle = <&phy2>;
|
||||
};
|
||||
|
||||
fcc@91340 {
|
||||
ethernet@91340 {
|
||||
device_type = "network";
|
||||
compatible = "fs_enet";
|
||||
model = "FCC";
|
||||
device-id = <3>;
|
||||
reg = <91340 20 88600 100 913d0 30>;
|
||||
compatible = "fsl,mpc8560-fcc-enet",
|
||||
"fsl,cpm2-fcc-enet";
|
||||
reg = <91340 20 88600 100 913d0 1>;
|
||||
/*
|
||||
* mac-address is deprecated and will be removed
|
||||
* in 2.6.25. Only recent versions of
|
||||
|
@ -220,9 +228,7 @@
|
|||
*/
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
clock-setup = <ffff00ff 3700>;
|
||||
rx-clock = <17>;
|
||||
tx-clock = <18>;
|
||||
fsl,cpm-command = <1a400300>;
|
||||
interrupts = <22 8>;
|
||||
interrupt-parent = <&cpmpic>;
|
||||
phy-handle = <&phy3>;
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.23-rc4
|
||||
# Tue Aug 28 21:24:43 2007
|
||||
# Linux kernel version: 2.6.23-rc9
|
||||
# Thu Oct 11 09:16:32 2007
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
|
||||
|
@ -22,8 +22,13 @@ CONFIG_FSL_BOOKE=y
|
|||
CONFIG_SPE=y
|
||||
# CONFIG_PPC_MM_SLICES is not set
|
||||
CONFIG_PPC32=y
|
||||
CONFIG_WORD_SIZE=32
|
||||
CONFIG_PPC_MERGE=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
|
@ -86,7 +91,6 @@ CONFIG_FUTEX=y
|
|||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
|
@ -128,7 +132,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
|
|||
CONFIG_MPC8560_ADS=y
|
||||
# CONFIG_MPC85xx_CDS is not set
|
||||
# CONFIG_MPC85xx_MDS is not set
|
||||
# CONFIG_MPC8544_DS is not set
|
||||
# CONFIG_MPC85xx_DS is not set
|
||||
CONFIG_MPC8560=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_MPIC=y
|
||||
|
@ -142,12 +146,17 @@ CONFIG_MPIC=y
|
|||
# CONFIG_GENERIC_IOMAP is not set
|
||||
# CONFIG_CPU_FREQ is not set
|
||||
CONFIG_CPM2=y
|
||||
CONFIG_PPC_CPM_NEW_BINDING=y
|
||||
# CONFIG_FSL_ULI1575 is not set
|
||||
CONFIG_CPM=y
|
||||
|
||||
#
|
||||
# Kernel options
|
||||
#
|
||||
# CONFIG_HIGHMEM is not set
|
||||
# CONFIG_TICK_ONESHOT is not set
|
||||
# CONFIG_NO_HZ is not set
|
||||
# CONFIG_HIGH_RES_TIMERS is not set
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_300 is not set
|
||||
|
@ -158,7 +167,7 @@ CONFIG_PREEMPT_NONE=y
|
|||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_BINFMT_ELF=y
|
||||
CONFIG_BINFMT_MISC=y
|
||||
# CONFIG_MATH_EMULATION is not set
|
||||
CONFIG_MATH_EMULATION=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_FLATMEM_ENABLE=y
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
|
@ -177,6 +186,8 @@ CONFIG_VIRT_TO_BUS=y
|
|||
# CONFIG_PROC_DEVICETREE is not set
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_SUSPEND_UP_POSSIBLE=y
|
||||
CONFIG_HIBERNATION_UP_POSSIBLE=y
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_WANT_DEVICE_TREE=y
|
||||
CONFIG_DEVICE_TREE=""
|
||||
|
@ -415,6 +426,7 @@ CONFIG_E1000_NAPI=y
|
|||
# CONFIG_SIS190 is not set
|
||||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_VIA_VELOCITY is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
|
@ -807,3 +819,4 @@ CONFIG_FORCED_INLINING=y
|
|||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_CRYPTO is not set
|
||||
# CONFIG_PPC_CLOCK is not set
|
||||
|
|
|
@ -469,12 +469,12 @@ InstructionTLBMiss:
|
|||
mfctr r0
|
||||
/* Get PTE (linux-style) and check access */
|
||||
mfspr r3,SPRN_IMISS
|
||||
lis r1,KERNELBASE@h /* check if kernel address */
|
||||
cmplw 0,r3,r1
|
||||
lis r1,PAGE_OFFSET@h /* check if kernel address */
|
||||
cmplw 0,r1,r3
|
||||
mfspr r2,SPRN_SPRG3
|
||||
li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
|
||||
lwz r2,PGDIR(r2)
|
||||
blt+ 112f
|
||||
bge- 112f
|
||||
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
|
||||
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
|
||||
lis r2,swapper_pg_dir@ha /* if kernel address, use */
|
||||
|
@ -543,12 +543,12 @@ DataLoadTLBMiss:
|
|||
mfctr r0
|
||||
/* Get PTE (linux-style) and check access */
|
||||
mfspr r3,SPRN_DMISS
|
||||
lis r1,KERNELBASE@h /* check if kernel address */
|
||||
cmplw 0,r3,r1
|
||||
lis r1,PAGE_OFFSET@h /* check if kernel address */
|
||||
cmplw 0,r1,r3
|
||||
mfspr r2,SPRN_SPRG3
|
||||
li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
|
||||
lwz r2,PGDIR(r2)
|
||||
blt+ 112f
|
||||
bge- 112f
|
||||
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
|
||||
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
|
||||
lis r2,swapper_pg_dir@ha /* if kernel address, use */
|
||||
|
@ -615,12 +615,12 @@ DataStoreTLBMiss:
|
|||
mfctr r0
|
||||
/* Get PTE (linux-style) and check access */
|
||||
mfspr r3,SPRN_DMISS
|
||||
lis r1,KERNELBASE@h /* check if kernel address */
|
||||
cmplw 0,r3,r1
|
||||
lis r1,PAGE_OFFSET@h /* check if kernel address */
|
||||
cmplw 0,r1,r3
|
||||
mfspr r2,SPRN_SPRG3
|
||||
li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
|
||||
lwz r2,PGDIR(r2)
|
||||
blt+ 112f
|
||||
bge- 112f
|
||||
mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
|
||||
rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
|
||||
lis r2,swapper_pg_dir@ha /* if kernel address, use */
|
||||
|
|
|
@ -289,7 +289,7 @@ label:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
@ -481,7 +481,7 @@ label:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
@ -581,7 +581,7 @@ label:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
|
|
@ -319,7 +319,7 @@ interrupt_base:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
@ -458,7 +458,7 @@ interrupt_base:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
@ -528,7 +528,7 @@ interrupt_base:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw r10, r11
|
||||
blt+ 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
|
|
@ -461,8 +461,7 @@ interrupt_base:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
ori r11, r11, TASK_SIZE@l
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw 0, r10, r11
|
||||
bge 2f
|
||||
|
||||
|
@ -584,8 +583,7 @@ interrupt_base:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
ori r11, r11, TASK_SIZE@l
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw 5, r10, r11
|
||||
blt 5, 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
@ -645,8 +643,7 @@ interrupt_base:
|
|||
/* If we are faulting a kernel address, we have to use the
|
||||
* kernel page tables.
|
||||
*/
|
||||
lis r11, TASK_SIZE@h
|
||||
ori r11, r11, TASK_SIZE@l
|
||||
lis r11, PAGE_OFFSET@h
|
||||
cmplw 5, r10, r11
|
||||
blt 5, 3f
|
||||
lis r11, swapper_pg_dir@h
|
||||
|
@ -744,7 +741,7 @@ data_access:
|
|||
* r10 - EA of fault
|
||||
* r11 - TLB (info from Linux PTE)
|
||||
* r12, r13 - available to use
|
||||
* CR5 - results of addr < TASK_SIZE
|
||||
* CR5 - results of addr >= PAGE_OFFSET
|
||||
* MAS0, MAS1 - loaded with proper value when we get here
|
||||
* MAS2, MAS3 - will need additional info from Linux PTE
|
||||
* Upon exit, we reload everything and RFI.
|
||||
|
|
|
@ -12,6 +12,7 @@ config MPC8540_ADS
|
|||
config MPC8560_ADS
|
||||
bool "Freescale MPC8560 ADS"
|
||||
select DEFAULT_UIMAGE
|
||||
select PPC_CPM_NEW_BINDING
|
||||
help
|
||||
This option enables support for the MPC 8560 ADS board
|
||||
|
||||
|
|
|
@ -1,35 +0,0 @@
|
|||
/*
|
||||
* arch/powerpc/platforms/85xx/mpc8540_ads.h
|
||||
*
|
||||
* MPC8540ADS board definitions
|
||||
*
|
||||
* Maintainer: Kumar Gala <kumar.gala@freescale.com>
|
||||
*
|
||||
* Copyright 2004 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MPC8540ADS_H__
|
||||
#define __MACH_MPC8540ADS_H__
|
||||
|
||||
#include <linux/initrd.h>
|
||||
|
||||
#define BOARD_CCSRBAR ((uint)0xe0000000)
|
||||
#define BCSR_ADDR ((uint)0xf8000000)
|
||||
#define BCSR_SIZE ((uint)(32 * 1024))
|
||||
|
||||
/* PCI interrupt controller */
|
||||
#define PIRQA MPC85xx_IRQ_EXT1
|
||||
#define PIRQB MPC85xx_IRQ_EXT2
|
||||
#define PIRQC MPC85xx_IRQ_EXT3
|
||||
#define PIRQD MPC85xx_IRQ_EXT4
|
||||
|
||||
/* Offset of CPM register space */
|
||||
#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
|
||||
|
||||
#endif /* __MACH_MPC8540ADS_H__ */
|
|
@ -17,13 +17,12 @@
|
|||
#include <linux/kdev_t.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/mpc85xx.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/mpic.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/udbg.h>
|
||||
|
@ -32,10 +31,8 @@
|
|||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
#ifdef CONFIG_CPM2
|
||||
#include <linux/fs_enet_pd.h>
|
||||
#include <asm/cpm2.h>
|
||||
#include <sysdev/cpm2_pic.h>
|
||||
#include <asm/fs_pd.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
@ -95,9 +92,9 @@ static void __init mpc85xx_ads_pic_init(void)
|
|||
|
||||
#ifdef CONFIG_CPM2
|
||||
/* Setup CPM2 PIC */
|
||||
np = of_find_node_by_type(NULL, "cpm-pic");
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
|
||||
if (np == NULL) {
|
||||
printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
|
||||
printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
|
||||
return;
|
||||
}
|
||||
irq = irq_of_parse_and_map(np, 0);
|
||||
|
@ -111,81 +108,75 @@ static void __init mpc85xx_ads_pic_init(void)
|
|||
* Setup the architecture
|
||||
*/
|
||||
#ifdef CONFIG_CPM2
|
||||
void init_fcc_ioports(struct fs_platform_info *fpi)
|
||||
struct cpm_pin {
|
||||
int port, pin, flags;
|
||||
};
|
||||
|
||||
static struct cpm_pin mpc8560_ads_pins[] = {
|
||||
/* SCC1 */
|
||||
{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
||||
{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
|
||||
/* SCC2 */
|
||||
{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
|
||||
/* FCC2 */
|
||||
{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
||||
{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
|
||||
{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
|
||||
|
||||
/* FCC3 */
|
||||
{1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
|
||||
{2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
|
||||
};
|
||||
|
||||
static void __init init_ioports(void)
|
||||
{
|
||||
struct io_port *io = cpm2_map(im_ioport);
|
||||
int fcc_no = fs_get_fcc_index(fpi->fs_no);
|
||||
int target;
|
||||
u32 tempval;
|
||||
int i;
|
||||
|
||||
switch(fcc_no) {
|
||||
case 1:
|
||||
tempval = in_be32(&io->iop_pdirb);
|
||||
tempval &= ~PB2_DIRB0;
|
||||
tempval |= PB2_DIRB1;
|
||||
out_be32(&io->iop_pdirb, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_psorb);
|
||||
tempval &= ~PB2_PSORB0;
|
||||
tempval |= PB2_PSORB1;
|
||||
out_be32(&io->iop_psorb, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_pparb);
|
||||
tempval |= (PB2_DIRB0 | PB2_DIRB1);
|
||||
out_be32(&io->iop_pparb, tempval);
|
||||
|
||||
target = CPM_CLK_FCC2;
|
||||
break;
|
||||
case 2:
|
||||
tempval = in_be32(&io->iop_pdirb);
|
||||
tempval &= ~PB3_DIRB0;
|
||||
tempval |= PB3_DIRB1;
|
||||
out_be32(&io->iop_pdirb, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_psorb);
|
||||
tempval &= ~PB3_PSORB0;
|
||||
tempval |= PB3_PSORB1;
|
||||
out_be32(&io->iop_psorb, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_pparb);
|
||||
tempval |= (PB3_DIRB0 | PB3_DIRB1);
|
||||
out_be32(&io->iop_pparb, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_pdirc);
|
||||
tempval |= PC3_DIRC1;
|
||||
out_be32(&io->iop_pdirc, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_pparc);
|
||||
tempval |= PC3_DIRC1;
|
||||
out_be32(&io->iop_pparc, tempval);
|
||||
|
||||
target = CPM_CLK_FCC3;
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
|
||||
return;
|
||||
for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
|
||||
struct cpm_pin *pin = &mpc8560_ads_pins[i];
|
||||
cpm2_set_pin(pin->port, pin->pin, pin->flags);
|
||||
}
|
||||
|
||||
/* Port C has clocks...... */
|
||||
tempval = in_be32(&io->iop_psorc);
|
||||
tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
|
||||
out_be32(&io->iop_psorc, tempval);
|
||||
|
||||
tempval = in_be32(&io->iop_pdirc);
|
||||
tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
|
||||
out_be32(&io->iop_pdirc, tempval);
|
||||
tempval = in_be32(&io->iop_pparc);
|
||||
tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
|
||||
out_be32(&io->iop_pparc, tempval);
|
||||
|
||||
cpm2_unmap(io);
|
||||
|
||||
/* Configure Serial Interface clock routing.
|
||||
* First, clear FCC bits to zero,
|
||||
* then set the ones we want.
|
||||
*/
|
||||
cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
|
||||
cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -200,6 +191,7 @@ static void __init mpc85xx_ads_setup_arch(void)
|
|||
|
||||
#ifdef CONFIG_CPM2
|
||||
cpm2_reset();
|
||||
init_ioports();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
@ -231,6 +223,24 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
|
|||
seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
|
||||
}
|
||||
|
||||
static struct of_device_id __initdata of_bus_ids[] = {
|
||||
{ .name = "soc", },
|
||||
{ .type = "soc", },
|
||||
{ .name = "cpm", },
|
||||
{ .name = "localbus", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init declare_of_platform_devices(void)
|
||||
{
|
||||
if (!machine_is(mpc85xx_ads))
|
||||
return 0;
|
||||
|
||||
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
||||
return 0;
|
||||
}
|
||||
device_initcall(declare_of_platform_devices);
|
||||
|
||||
/*
|
||||
* Called very early, device-tree isn't unflattened
|
||||
*/
|
||||
|
|
|
@ -1,60 +0,0 @@
|
|||
/*
|
||||
* MPC85xx ADS board definitions
|
||||
*
|
||||
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
|
||||
*
|
||||
* Copyright 2004 Freescale Semiconductor Inc.
|
||||
*
|
||||
* 2006 (c) MontaVista Software, Inc.
|
||||
* Vitaly Bordug <vbordug@ru.mvista.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MPC85XXADS_H
|
||||
#define __MACH_MPC85XXADS_H
|
||||
|
||||
#include <linux/initrd.h>
|
||||
#include <sysdev/fsl_soc.h>
|
||||
|
||||
#define BCSR_ADDR ((uint)0xf8000000)
|
||||
#define BCSR_SIZE ((uint)(32 * 1024))
|
||||
|
||||
#ifdef CONFIG_CPM2
|
||||
|
||||
#define MPC85xx_CPM_OFFSET (0x80000)
|
||||
|
||||
#define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET)
|
||||
#define CPM_IRQ_OFFSET 60
|
||||
|
||||
#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
|
||||
#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
|
||||
|
||||
/* FCC1 Clock Source Configuration. These can be
|
||||
* redefined in the board specific file.
|
||||
* Can only choose from CLK9-12 */
|
||||
#define F1_RXCLK 12
|
||||
#define F1_TXCLK 11
|
||||
|
||||
/* FCC2 Clock Source Configuration. These can be
|
||||
* redefined in the board specific file.
|
||||
* Can only choose from CLK13-16 */
|
||||
#define F2_RXCLK 13
|
||||
#define F2_TXCLK 14
|
||||
|
||||
/* FCC3 Clock Source Configuration. These can be
|
||||
* redefined in the board specific file.
|
||||
* Can only choose from CLK13-16 */
|
||||
#define F3_RXCLK 15
|
||||
#define F3_TXCLK 16
|
||||
|
||||
#endif /* CONFIG_CPM2 */
|
||||
#endif /* __MACH_MPC85XXADS_H */
|
|
@ -36,7 +36,6 @@
|
|||
#include <asm/machdep.h>
|
||||
#include <asm/ipic.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/mpc85xx.h>
|
||||
#include <asm/irq.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
|
@ -47,6 +46,15 @@
|
|||
#include <sysdev/fsl_soc.h>
|
||||
#include <sysdev/fsl_pci.h>
|
||||
|
||||
/* CADMUS info */
|
||||
/* xxx - galak, move into device tree */
|
||||
#define CADMUS_BASE (0xf8004000)
|
||||
#define CADMUS_SIZE (256)
|
||||
#define CM_VER (0)
|
||||
#define CM_CSR (1)
|
||||
#define CM_RST (2)
|
||||
|
||||
|
||||
static int cds_pci_slot = 2;
|
||||
static volatile u8 *cadmus;
|
||||
|
||||
|
|
|
@ -1,43 +0,0 @@
|
|||
/*
|
||||
* arch/powerpc/platforms/85xx/mpc85xx_cds.h
|
||||
*
|
||||
* MPC85xx CDS board definitions
|
||||
*
|
||||
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
|
||||
*
|
||||
* Copyright 2004 Freescale Semiconductor, Inc
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MPC85XX_CDS_H__
|
||||
#define __MACH_MPC85XX_CDS_H__
|
||||
|
||||
/* CADMUS info */
|
||||
#define CADMUS_BASE (0xf8004000)
|
||||
#define CADMUS_SIZE (256)
|
||||
#define CM_VER (0)
|
||||
#define CM_CSR (1)
|
||||
#define CM_RST (2)
|
||||
|
||||
/* CDS NVRAM/RTC */
|
||||
#define CDS_RTC_ADDR (0xf8000000)
|
||||
#define CDS_RTC_SIZE (8 * 1024)
|
||||
|
||||
/* PCI interrupt controller */
|
||||
#define PIRQ0A MPC85xx_IRQ_EXT0
|
||||
#define PIRQ0B MPC85xx_IRQ_EXT1
|
||||
#define PIRQ0C MPC85xx_IRQ_EXT2
|
||||
#define PIRQ0D MPC85xx_IRQ_EXT3
|
||||
#define PIRQ1A MPC85xx_IRQ_EXT11
|
||||
|
||||
#define NR_8259_INTS 16
|
||||
#define CPM_IRQ_OFFSET NR_8259_INTS
|
||||
|
||||
#define MPC85xx_OPENPIC_IRQ_OFFSET 80
|
||||
|
||||
#endif /* __MACH_MPC85XX_CDS_H__ */
|
|
@ -24,7 +24,6 @@
|
|||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/mpc85xx.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/udbg.h>
|
||||
|
|
|
@ -39,7 +39,6 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/mpc85xx.h>
|
||||
#include <asm/irq.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
|
|
|
@ -13,6 +13,10 @@
|
|||
#include <asm/immap_cpm2.h>
|
||||
#include <asm/cpm.h>
|
||||
|
||||
#ifdef CONFIG_PPC_85xx
|
||||
#define CPM_MAP_ADDR (get_immrbase() + 0x80000)
|
||||
#endif
|
||||
|
||||
/* CPM Command register.
|
||||
*/
|
||||
#define CPM_CR_RST ((uint)0x80000000)
|
||||
|
|
|
@ -19,8 +19,6 @@
|
|||
|
||||
#if defined(CONFIG_8260)
|
||||
#include <asm/mpc8260.h>
|
||||
#elif defined(CONFIG_85xx)
|
||||
#include <asm/mpc85xx.h>
|
||||
#endif
|
||||
|
||||
#define cpm2_map(member) (&cpm2_immr->member)
|
||||
|
|
|
@ -1,45 +0,0 @@
|
|||
/*
|
||||
* include/asm-powerpc/mpc85xx.h
|
||||
*
|
||||
* MPC85xx definitions
|
||||
*
|
||||
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
|
||||
*
|
||||
* Copyright 2004 Freescale Semiconductor, Inc
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASM_MPC85xx_H__
|
||||
#define __ASM_MPC85xx_H__
|
||||
|
||||
#include <asm/mmu.h>
|
||||
|
||||
#ifdef CONFIG_85xx
|
||||
|
||||
#if defined(CONFIG_MPC8540_ADS) || defined(CONFIG_MPC8560_ADS)
|
||||
#include <platforms/85xx/mpc85xx_ads.h>
|
||||
#endif
|
||||
#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
|
||||
#include <platforms/85xx/mpc8555_cds.h>
|
||||
#endif
|
||||
#ifdef CONFIG_MPC85xx_CDS
|
||||
#include <platforms/85xx/mpc85xx_cds.h>
|
||||
#endif
|
||||
|
||||
/* Let modules/drivers get at CCSRBAR */
|
||||
extern phys_addr_t get_ccsrbar(void);
|
||||
|
||||
#ifdef MODULE
|
||||
#define CCSRBAR get_ccsrbar()
|
||||
#else
|
||||
#define CCSRBAR BOARD_CCSRBAR
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_85xx */
|
||||
#endif /* __ASM_MPC85xx_H__ */
|
||||
#endif /* __KERNEL__ */
|
Загрузка…
Ссылка в новой задаче