fpga zynq: Remove priv->dev
socfpga uses mgr->dev for debug prints, there should be consistency here, so standardize on that. The only other use was for dma which can be replaced with mgr->dev.parent. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Alan Tull <atull@opensource.altera.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
This commit is contained in:
Родитель
1930c28651
Коммит
80baf649c2
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@ -118,7 +118,6 @@
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#define FPGA_RST_NONE_MASK 0x0
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#define FPGA_RST_NONE_MASK 0x0
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struct zynq_fpga_priv {
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struct zynq_fpga_priv {
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struct device *dev;
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int irq;
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int irq;
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struct clk *clk;
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struct clk *clk;
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@ -218,7 +217,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
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INIT_POLL_DELAY,
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INIT_POLL_DELAY,
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INIT_POLL_TIMEOUT);
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INIT_POLL_TIMEOUT);
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if (err) {
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if (err) {
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dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n");
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dev_err(&mgr->dev, "Timeout waiting for PCFG_INIT\n");
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goto out_err;
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goto out_err;
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}
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}
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@ -232,7 +231,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
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INIT_POLL_DELAY,
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INIT_POLL_DELAY,
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INIT_POLL_TIMEOUT);
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INIT_POLL_TIMEOUT);
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if (err) {
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if (err) {
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dev_err(priv->dev, "Timeout waiting for !PCFG_INIT\n");
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dev_err(&mgr->dev, "Timeout waiting for !PCFG_INIT\n");
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goto out_err;
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goto out_err;
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}
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}
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@ -246,7 +245,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
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INIT_POLL_DELAY,
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INIT_POLL_DELAY,
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INIT_POLL_TIMEOUT);
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INIT_POLL_TIMEOUT);
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if (err) {
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if (err) {
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dev_err(priv->dev, "Timeout waiting for PCFG_INIT\n");
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dev_err(&mgr->dev, "Timeout waiting for PCFG_INIT\n");
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goto out_err;
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goto out_err;
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}
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}
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}
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}
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@ -263,7 +262,7 @@ static int zynq_fpga_ops_write_init(struct fpga_manager *mgr,
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/* check that we have room in the command queue */
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/* check that we have room in the command queue */
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status = zynq_fpga_read(priv, STATUS_OFFSET);
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status = zynq_fpga_read(priv, STATUS_OFFSET);
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if (status & STATUS_DMA_Q_F) {
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if (status & STATUS_DMA_Q_F) {
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dev_err(priv->dev, "DMA command queue full\n");
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dev_err(&mgr->dev, "DMA command queue full\n");
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err = -EBUSY;
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err = -EBUSY;
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goto out_err;
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goto out_err;
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}
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}
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@ -296,7 +295,8 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr,
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in_count = count;
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in_count = count;
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priv = mgr->priv;
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priv = mgr->priv;
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kbuf = dma_alloc_coherent(priv->dev, count, &dma_addr, GFP_KERNEL);
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kbuf =
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dma_alloc_coherent(mgr->dev.parent, count, &dma_addr, GFP_KERNEL);
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if (!kbuf)
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if (!kbuf)
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return -ENOMEM;
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return -ENOMEM;
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@ -332,15 +332,14 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr,
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zynq_fpga_write(priv, INT_STS_OFFSET, intr_status);
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zynq_fpga_write(priv, INT_STS_OFFSET, intr_status);
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if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
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if (!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
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dev_err(priv->dev, "Error configuring FPGA\n");
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dev_err(&mgr->dev, "Error configuring FPGA\n");
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err = -EFAULT;
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err = -EFAULT;
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}
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}
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clk_disable(priv->clk);
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clk_disable(priv->clk);
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out_free:
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out_free:
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dma_free_coherent(priv->dev, in_count, kbuf, dma_addr);
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dma_free_coherent(mgr->dev.parent, count, kbuf, dma_addr);
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return err;
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return err;
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}
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}
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@ -418,8 +417,6 @@ static int zynq_fpga_probe(struct platform_device *pdev)
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if (!priv)
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if (!priv)
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return -ENOMEM;
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return -ENOMEM;
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priv->dev = dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->io_base = devm_ioremap_resource(dev, res);
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priv->io_base = devm_ioremap_resource(dev, res);
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if (IS_ERR(priv->io_base))
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if (IS_ERR(priv->io_base))
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