PCI ASPM: cleanup aspm state field in struct pcie_link_state
The "support_state", "enabled_state" and "bios_aspm_state" fields in the struct pcie_link_state take 2-bit value. So those fields don't need to be defined as unsigned int. This patch makes those fields 2-bit, and cleans up some related code. Acked-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Kenji Kaneshige
Jesse Barnes
Родитель
dc64cd1131
Коммит
80bfdbe370
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@ -41,9 +41,10 @@ struct pcie_link_state {
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struct list_head link;
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/* ASPM state */
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unsigned int support_state;
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unsigned int enabled_state;
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unsigned int bios_aspm_state;
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u32 aspm_support:2; /* Supported ASPM state */
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u32 aspm_enabled:2; /* Enabled ASPM state */
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u32 aspm_default:2; /* Default ASPM state by BIOS */
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/* upstream component */
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unsigned int l0s_upper_latency;
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unsigned int l1_upper_latency;
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@ -88,9 +89,9 @@ static int policy_to_aspm_state(struct pci_dev *pdev)
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return 0;
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case POLICY_POWERSAVE:
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/* Enable ASPM L0s/L1 */
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return PCIE_LINK_STATE_L0S|PCIE_LINK_STATE_L1;
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return PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1;
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case POLICY_DEFAULT:
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return link_state->bios_aspm_state;
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return link_state->aspm_default;
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}
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return 0;
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}
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@ -311,6 +312,7 @@ static void pcie_aspm_get_cap_device(struct pci_dev *pdev, u32 *state,
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u32 reg32;
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unsigned int latency;
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*l0s = *l1 = *enabled = 0;
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pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
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pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, ®32);
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*state = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
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@ -333,26 +335,29 @@ static void pcie_aspm_get_cap_device(struct pci_dev *pdev, u32 *state,
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static void pcie_aspm_cap_init(struct pci_dev *pdev)
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{
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struct pci_dev *child_dev;
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u32 state, tmp;
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u32 support, l0s, l1, enabled;
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struct pcie_link_state *link_state = pdev->link_state;
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/* upstream component states */
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pcie_aspm_get_cap_device(pdev, &link_state->support_state,
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&link_state->l0s_upper_latency,
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&link_state->l1_upper_latency,
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&link_state->enabled_state);
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pcie_aspm_get_cap_device(pdev, &support, &l0s, &l1, &enabled);
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link_state->aspm_support = support;
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link_state->l0s_upper_latency = l0s;
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link_state->l1_upper_latency = l1;
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link_state->aspm_enabled = enabled;
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/* downstream component states, all functions have the same setting */
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child_dev = list_entry(pdev->subordinate->devices.next, struct pci_dev,
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bus_list);
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pcie_aspm_get_cap_device(child_dev, &state,
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&link_state->l0s_down_latency,
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&link_state->l1_down_latency,
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&tmp);
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link_state->support_state &= state;
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if (!link_state->support_state)
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pcie_aspm_get_cap_device(child_dev, &support, &l0s, &l1, &enabled);
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link_state->aspm_support &= support;
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link_state->l0s_down_latency = l0s;
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link_state->l1_down_latency = l1;
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if (!link_state->aspm_support)
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return;
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link_state->enabled_state &= link_state->support_state;
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link_state->bios_aspm_state = link_state->enabled_state;
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link_state->aspm_enabled &= link_state->aspm_support;
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link_state->aspm_default = link_state->aspm_enabled;
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/* ENDPOINT states*/
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list_for_each_entry(child_dev, &pdev->subordinate->devices, bus_list) {
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@ -371,7 +376,7 @@ static void pcie_aspm_cap_init(struct pci_dev *pdev)
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latency = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
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latency = calc_L0S_latency(latency, 1);
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ep_state->l0s_acceptable_latency = latency;
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if (link_state->support_state & PCIE_LINK_STATE_L1) {
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if (link_state->aspm_support & PCIE_LINK_STATE_L1) {
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latency = (reg32 & PCI_EXP_DEVCAP_L1) >> 9;
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latency = calc_L1_latency(latency, 1);
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ep_state->l1_acceptable_latency = latency;
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@ -389,7 +394,7 @@ static unsigned int __pcie_aspm_check_state_one(struct pci_dev *pdev,
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parent_dev = pdev->bus->self;
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link_state = parent_dev->link_state;
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state &= link_state->support_state;
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state &= link_state->aspm_support;
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if (state == 0)
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return 0;
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ep_state = &link_state->endpoints[PCI_FUNC(pdev->devfn)];
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@ -519,7 +524,7 @@ static void __pcie_aspm_config_link(struct pci_dev *pdev, unsigned int state)
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if (!(state & PCIE_LINK_STATE_L1))
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__pcie_aspm_config_one_dev(pdev, state);
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link_state->enabled_state = state;
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link_state->aspm_enabled = state;
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}
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static struct pcie_link_state *get_root_port_link(struct pcie_link_state *link)
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@ -550,7 +555,7 @@ static void __pcie_aspm_configure_link_state(struct pci_dev *pdev,
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/* check root port link too in case it hasn't children */
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state = pcie_aspm_check_state(root_port_link->pdev, state);
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if (link_state->enabled_state == state)
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if (link_state->aspm_enabled == state)
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return;
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/*
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@ -675,10 +680,11 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
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pcie_aspm_configure_common_clock(pdev);
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pcie_aspm_cap_init(pdev);
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} else {
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link_state->enabled_state = PCIE_LINK_STATE_L0S|PCIE_LINK_STATE_L1;
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link_state->bios_aspm_state = 0;
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link_state->aspm_enabled =
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(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
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link_state->aspm_default = 0;
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/* Set support state to 0, so we will disable ASPM later */
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link_state->support_state = 0;
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link_state->aspm_support = 0;
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}
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link_state->pdev = pdev;
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@ -690,7 +696,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
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* initialization will config the whole hierarchy. but we must
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* make sure BIOS doesn't set unsupported link state
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**/
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state = pcie_aspm_check_state(pdev, link_state->bios_aspm_state);
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state = pcie_aspm_check_state(pdev, link_state->aspm_default);
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__pcie_aspm_config_link(pdev, state);
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} else
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__pcie_aspm_configure_link_state(pdev,
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@ -753,7 +759,7 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
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* devices changed PM state, we should recheck if latency meets all
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* functions' requirement
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*/
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pcie_aspm_configure_link_state(pdev, link_state->enabled_state);
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pcie_aspm_configure_link_state(pdev, link_state->aspm_enabled);
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}
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/*
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@ -776,12 +782,11 @@ void pci_disable_link_state(struct pci_dev *pdev, int state)
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down_read(&pci_bus_sem);
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mutex_lock(&aspm_lock);
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link_state = parent->link_state;
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link_state->support_state &=
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~(state & (PCIE_LINK_STATE_L0S|PCIE_LINK_STATE_L1));
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link_state->aspm_support &= ~state;
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if (state & PCIE_LINK_STATE_CLKPM)
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link_state->clk_pm_capable = 0;
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__pcie_aspm_configure_link_state(parent, link_state->enabled_state);
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__pcie_aspm_configure_link_state(parent, link_state->aspm_enabled);
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if (!link_state->clk_pm_capable && link_state->clk_pm_enabled)
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pcie_set_clock_pm(parent, 0);
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mutex_unlock(&aspm_lock);
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@ -842,7 +847,7 @@ static ssize_t link_state_show(struct device *dev,
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struct pci_dev *pci_device = to_pci_dev(dev);
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struct pcie_link_state *link_state = pci_device->link_state;
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return sprintf(buf, "%d\n", link_state->enabled_state);
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return sprintf(buf, "%d\n", link_state->aspm_enabled);
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}
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static ssize_t link_state_store(struct device *dev,
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@ -908,7 +913,7 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
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pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
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return;
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if (link_state->support_state)
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if (link_state->aspm_support)
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sysfs_add_file_to_group(&pdev->dev.kobj,
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&dev_attr_link_state.attr, power_group);
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if (link_state->clk_pm_capable)
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@ -924,7 +929,7 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
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pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
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return;
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if (link_state->support_state)
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if (link_state->aspm_support)
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sysfs_remove_file_from_group(&pdev->dev.kobj,
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&dev_attr_link_state.attr, power_group);
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if (link_state->clk_pm_capable)
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