spi: jcore: switch to use modern name
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20230807124105.3429709-20-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -33,7 +33,7 @@
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#define JCORE_SPI_WAIT_RDY_MAX_LOOP 2000000
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struct jcore_spi {
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struct spi_master *master;
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struct spi_controller *host;
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void __iomem *base;
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unsigned int cs_reg;
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unsigned int speed_reg;
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@ -59,7 +59,7 @@ static void jcore_spi_program(struct jcore_spi *hw)
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void __iomem *ctrl_reg = hw->base + CTRL_REG;
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if (jcore_spi_wait(ctrl_reg))
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dev_err(hw->master->dev.parent,
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dev_err(hw->host->dev.parent,
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"timeout waiting to program ctrl reg.\n");
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writel(hw->cs_reg | hw->speed_reg, ctrl_reg);
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@ -67,10 +67,10 @@ static void jcore_spi_program(struct jcore_spi *hw)
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static void jcore_spi_chipsel(struct spi_device *spi, bool value)
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{
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struct jcore_spi *hw = spi_master_get_devdata(spi->master);
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struct jcore_spi *hw = spi_controller_get_devdata(spi->controller);
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u32 csbit = 1U << (2 * spi_get_chipselect(spi, 0));
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dev_dbg(hw->master->dev.parent, "chipselect %d\n", spi_get_chipselect(spi, 0));
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dev_dbg(hw->host->dev.parent, "chipselect %d\n", spi_get_chipselect(spi, 0));
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if (value)
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hw->cs_reg |= csbit;
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@ -90,14 +90,14 @@ static void jcore_spi_baudrate(struct jcore_spi *hw, int speed)
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else
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hw->speed_reg = ((hw->clock_freq / 2 / speed) - 1) << 27;
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jcore_spi_program(hw);
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dev_dbg(hw->master->dev.parent, "speed=%d reg=0x%x\n",
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dev_dbg(hw->host->dev.parent, "speed=%d reg=0x%x\n",
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speed, hw->speed_reg);
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}
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static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi,
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static int jcore_spi_txrx(struct spi_controller *host, struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct jcore_spi *hw = spi_master_get_devdata(master);
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struct jcore_spi *hw = spi_controller_get_devdata(host);
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void __iomem *ctrl_reg = hw->base + CTRL_REG;
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void __iomem *data_reg = hw->base + DATA_REG;
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@ -130,7 +130,7 @@ static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi,
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*rx++ = readl(data_reg);
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}
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spi_finalize_current_transfer(master);
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spi_finalize_current_transfer(host);
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if (count < len)
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return -EREMOTEIO;
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@ -142,26 +142,26 @@ static int jcore_spi_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct jcore_spi *hw;
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struct spi_master *master;
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struct spi_controller *host;
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struct resource *res;
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u32 clock_freq;
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struct clk *clk;
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int err = -ENODEV;
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master = spi_alloc_master(&pdev->dev, sizeof(struct jcore_spi));
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if (!master)
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host = spi_alloc_host(&pdev->dev, sizeof(struct jcore_spi));
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if (!host)
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return err;
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/* Setup the master state. */
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master->num_chipselect = 3;
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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master->transfer_one = jcore_spi_txrx;
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master->set_cs = jcore_spi_chipsel;
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master->dev.of_node = node;
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master->bus_num = pdev->id;
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/* Setup the host state. */
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host->num_chipselect = 3;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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host->transfer_one = jcore_spi_txrx;
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host->set_cs = jcore_spi_chipsel;
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host->dev.of_node = node;
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host->bus_num = pdev->id;
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hw = spi_master_get_devdata(master);
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hw->master = master;
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hw = spi_controller_get_devdata(host);
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hw->host = host;
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platform_set_drvdata(pdev, hw);
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/* Find and map our resources */
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@ -200,7 +200,7 @@ static int jcore_spi_probe(struct platform_device *pdev)
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jcore_spi_baudrate(hw, 400000);
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/* Register our spi controller */
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err = devm_spi_register_master(&pdev->dev, master);
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err = devm_spi_register_controller(&pdev->dev, host);
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if (err)
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goto exit;
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@ -209,7 +209,7 @@ static int jcore_spi_probe(struct platform_device *pdev)
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exit_busy:
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err = -EBUSY;
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exit:
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spi_master_put(master);
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spi_controller_put(host);
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return err;
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}
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