ASoC: rsnd: clear SSI_SYS_STATUSx every time
Renesas sound SSIU has SSI_SYS_STATUS register whick will be changed if over/under run was occurred. Current rsnd driver is handling over/under run error on SSI/SRC, but doesn't on SSIU. HW guys can't guarantee correct behavior if it already had error bit on status register when it start. Thus, it should be cleared every start timing. This patch do it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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42b197e794
Коммит
814efe3ed7
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@ -211,6 +211,14 @@ static int rsnd_gen2_probe(struct rsnd_priv *priv)
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RSND_GEN_S_REG(SSI_MODE1, 0x804),
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RSND_GEN_S_REG(SSI_MODE2, 0x808),
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RSND_GEN_S_REG(SSI_CONTROL, 0x810),
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RSND_GEN_S_REG(SSI_SYS_STATUS0, 0x840),
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RSND_GEN_S_REG(SSI_SYS_STATUS1, 0x844),
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RSND_GEN_S_REG(SSI_SYS_STATUS2, 0x848),
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RSND_GEN_S_REG(SSI_SYS_STATUS3, 0x84c),
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RSND_GEN_S_REG(SSI_SYS_STATUS4, 0x880),
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RSND_GEN_S_REG(SSI_SYS_STATUS5, 0x884),
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RSND_GEN_S_REG(SSI_SYS_STATUS6, 0x888),
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RSND_GEN_S_REG(SSI_SYS_STATUS7, 0x88c),
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/* FIXME: it needs SSI_MODE2/3 in the future */
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RSND_GEN_M_REG(SSI_BUSIF_MODE, 0x0, 0x80),
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@ -161,6 +161,14 @@ enum rsnd_reg {
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RSND_REG_SSI_BUSIF_ADINR,
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RSND_REG_SSI_BUSIF_DALIGN,
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RSND_REG_SSI_INT_ENABLE,
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RSND_REG_SSI_SYS_STATUS0,
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RSND_REG_SSI_SYS_STATUS1,
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RSND_REG_SSI_SYS_STATUS2,
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RSND_REG_SSI_SYS_STATUS3,
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RSND_REG_SSI_SYS_STATUS4,
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RSND_REG_SSI_SYS_STATUS5,
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RSND_REG_SSI_SYS_STATUS6,
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RSND_REG_SSI_SYS_STATUS7,
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/* SSI */
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RSND_REG_SSICR,
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@ -33,6 +33,26 @@ static int rsnd_ssiu_init(struct rsnd_mod *mod,
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u32 mask1, val1;
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u32 mask2, val2;
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/* clear status */
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switch (id) {
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case 0:
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case 1:
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case 2:
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case 3:
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case 4:
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rsnd_mod_write(mod, SSI_SYS_STATUS0, 0xf << (id * 4));
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rsnd_mod_write(mod, SSI_SYS_STATUS2, 0xf << (id * 4));
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rsnd_mod_write(mod, SSI_SYS_STATUS4, 0xf << (id * 4));
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rsnd_mod_write(mod, SSI_SYS_STATUS6, 0xf << (id * 4));
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break;
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case 9:
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rsnd_mod_write(mod, SSI_SYS_STATUS1, 0xf << 4);
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rsnd_mod_write(mod, SSI_SYS_STATUS3, 0xf << 4);
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rsnd_mod_write(mod, SSI_SYS_STATUS5, 0xf << 4);
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rsnd_mod_write(mod, SSI_SYS_STATUS7, 0xf << 4);
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break;
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}
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/*
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* SSI_MODE0
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*/
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