drm/amdgpu: return tcc_disabled_mask to userspace
UMDs need this for correct programming of harvested chips. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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49379032aa
Коммит
815fb4c9d7
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@ -81,9 +81,10 @@
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* - 3.32.0 - Add syncobj timeline support to AMDGPU_CS.
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* - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS.
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* - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
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* - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
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*/
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#define KMS_DRIVER_MAJOR 3
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#define KMS_DRIVER_MINOR 34
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#define KMS_DRIVER_MINOR 35
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#define KMS_DRIVER_PATCHLEVEL 0
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#define AMDGPU_MAX_TIMEOUT_PARAM_LENTH 256
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@ -165,6 +165,7 @@ struct amdgpu_gfx_config {
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uint32_t num_sc_per_sh;
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uint32_t num_packer_per_sc;
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uint32_t pa_sc_tile_steering_override;
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uint64_t tcc_disabled_mask;
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};
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struct amdgpu_cu_info {
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@ -787,6 +787,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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dev_info.pa_sc_tile_steering_override =
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adev->gfx.config.pa_sc_tile_steering_override;
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dev_info.tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask;
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return copy_to_user(out, &dev_info,
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min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;
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}
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@ -1691,6 +1691,17 @@ static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev)
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}
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}
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static void gfx_v10_0_get_tcc_info(struct amdgpu_device *adev)
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{
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/* TCCs are global (not instanced). */
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uint32_t tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE) |
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RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE);
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adev->gfx.config.tcc_disabled_mask =
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REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, TCC_DISABLE) |
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(REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, HI_TCC_DISABLE) << 16);
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}
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static void gfx_v10_0_constants_init(struct amdgpu_device *adev)
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{
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u32 tmp;
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@ -1702,6 +1713,7 @@ static void gfx_v10_0_constants_init(struct amdgpu_device *adev)
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gfx_v10_0_setup_rb(adev);
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gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info);
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gfx_v10_0_get_tcc_info(adev);
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adev->gfx.config.pa_sc_tile_steering_override =
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gfx_v10_0_init_pa_sc_tile_steering_override(adev);
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@ -1003,6 +1003,8 @@ struct drm_amdgpu_info_device {
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__u64 high_va_max;
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/* gfx10 pa_sc_tile_steering_override */
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__u32 pa_sc_tile_steering_override;
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/* disabled TCCs */
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__u64 tcc_disabled_mask;
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};
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struct drm_amdgpu_info_hw_ip {
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