KVM: Order segment register constants in the same way as cpu operand encoding
This can be used to simplify the x86 instruction decoder. Signed-off-by: Avi Kivity <avi@qumranet.com>
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81609e3e26
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@ -109,12 +109,12 @@ enum {
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};
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enum {
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VCPU_SREG_CS,
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VCPU_SREG_DS,
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VCPU_SREG_ES,
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VCPU_SREG_CS,
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VCPU_SREG_SS,
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VCPU_SREG_DS,
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VCPU_SREG_FS,
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VCPU_SREG_GS,
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VCPU_SREG_SS,
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VCPU_SREG_TR,
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VCPU_SREG_LDTR,
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};
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