x86-64, fpu: Simplify constraints for fxsave/fxtstor
Use the "R" constraint (legacy register) instead of listing all the possible registers. Clean up the comments as well. Signed-off-by: Brian Gerst <brgerst@gmail.com> Acked-by: Pekka Enberg <penberg@kernel.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <1283563039-3466-8-git-send-email-brgerst@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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10c11f3049
Коммит
820241356d
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@ -81,6 +81,7 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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{
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int err;
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/* See comment in fxsave() below. */
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asm volatile("1: rex64/fxrstor (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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@ -89,11 +90,7 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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#if 0 /* See comment in fxsave() below. */
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: [fx] "r" (fx), "m" (*fx), "0" (0));
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#else
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: [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
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#endif
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: [fx] "R" (fx), "m" (*fx), "0" (0));
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return err;
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}
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@ -140,6 +137,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
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if (unlikely(err))
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return -EFAULT;
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/* See comment in fxsave() below. */
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asm volatile("1: rex64/fxsave (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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@ -148,11 +146,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err), "=m" (*fx)
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#if 0 /* See comment in fxsave() below. */
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: [fx] "r" (fx), "0" (0));
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#else
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: [fx] "cdaSDb" (fx), "0" (0));
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#endif
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: [fx] "R" (fx), "0" (0));
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if (unlikely(err) &&
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__clear_user(fx, sizeof(struct i387_fxsave_struct)))
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err = -EFAULT;
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@ -165,26 +159,22 @@ static inline void fpu_fxsave(struct fpu *fpu)
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/* Using "rex64; fxsave %0" is broken because, if the memory operand
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uses any extended registers for addressing, a second REX prefix
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will be generated (to the assembler, rex64 followed by semicolon
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is a separate instruction), and hence the 64-bitness is lost. */
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#if 0
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/* Using "fxsaveq %0" would be the ideal choice, but is only supported
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starting with gas 2.16. */
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__asm__ __volatile__("fxsaveq %0"
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is a separate instruction), and hence the 64-bitness is lost.
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Using "fxsaveq %0" would be the ideal choice, but is only supported
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starting with gas 2.16.
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asm volatile("fxsaveq %0"
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: "=m" (fpu->state->fxsave));
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#elif 0
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/* Using, as a workaround, the properly prefixed form below isn't
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Using, as a workaround, the properly prefixed form below isn't
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accepted by any binutils version so far released, complaining that
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the same type of prefix is used twice if an extended register is
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needed for addressing (fix submitted to mainline 2005-11-21). */
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__asm__ __volatile__("rex64/fxsave %0"
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needed for addressing (fix submitted to mainline 2005-11-21).
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asm volatile("rex64/fxsave %0"
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: "=m" (fpu->state->fxsave));
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#else
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/* This, however, we can work around by forcing the compiler to select
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This, however, we can work around by forcing the compiler to select
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an addressing mode that doesn't require extended registers. */
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__asm__ __volatile__("rex64/fxsave (%1)"
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asm volatile("rex64/fxsave (%[fx])"
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: "=m" (fpu->state->fxsave)
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: "cdaSDb" (&fpu->state->fxsave));
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#endif
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: [fx] "R" (&fpu->state->fxsave));
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}
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static inline void fpu_save_init(struct fpu *fpu)
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