spi: Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS
Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS and convert the users to SPI_CONTROLLER_GPIO_SS to follow the new naming shema. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230710154932.68377-14-andriy.shevchenko@linux.intel.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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90366cd601
Коммит
82238d2cbd
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@ -185,7 +185,7 @@ static int ath79_spi_probe(struct platform_device *pdev)
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host->use_gpio_descriptors = true;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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host->flags = SPI_MASTER_GPIO_SS;
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host->flags = SPI_CONTROLLER_GPIO_SS;
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host->num_chipselect = 3;
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host->mem_ops = &ath79_mem_ops;
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@ -1476,7 +1476,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
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host->num_chipselect = 4;
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host->setup = atmel_spi_setup;
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host->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX |
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SPI_MASTER_GPIO_SS);
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SPI_CONTROLLER_GPIO_SS);
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host->transfer_one = atmel_spi_one_transfer;
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host->set_cs = atmel_spi_set_cs;
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host->cleanup = atmel_spi_cleanup;
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@ -349,11 +349,11 @@ int spi_bitbang_init(struct spi_bitbang *bitbang)
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/*
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* We only need the chipselect callback if we are actually using it.
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* If we just use GPIO descriptors, it is surplus. If the
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* SPI_MASTER_GPIO_SS flag is set, we always need to call the
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* SPI_CONTROLLER_GPIO_SS flag is set, we always need to call the
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* driver-specific chipselect routine.
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*/
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custom_cs = (!master->use_gpio_descriptors ||
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(master->flags & SPI_MASTER_GPIO_SS));
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(master->flags & SPI_CONTROLLER_GPIO_SS));
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if (custom_cs && !bitbang->chipselect)
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return -EINVAL;
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@ -371,7 +371,7 @@ int spi_bitbang_init(struct spi_bitbang *bitbang)
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master->transfer_one = spi_bitbang_transfer_one;
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/*
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* When using GPIO descriptors, the ->set_cs() callback doesn't even
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* get called unless SPI_MASTER_GPIO_SS is set.
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* get called unless SPI_CONTROLLER_GPIO_SS is set.
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*/
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if (custom_cs)
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master->set_cs = spi_bitbang_set_cs;
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@ -939,7 +939,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
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master->bus_num = pdev->id;
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master->num_chipselect = pdata->num_chipselect;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
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master->flags = SPI_CONTROLLER_MUST_RX | SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_GPIO_SS;
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master->setup = davinci_spi_setup;
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master->cleanup = davinci_spi_cleanup;
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master->can_dma = davinci_spi_can_dma;
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@ -932,7 +932,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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if (dws->mem_ops.exec_op)
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master->mem_ops = &dws->mem_ops;
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master->max_speed_hz = dws->max_freq;
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master->flags = SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_GPIO_SS;
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master->auto_runtime_pm = true;
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/* Get default rx sample delay */
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@ -434,7 +434,7 @@ static int spi_gpio_probe(struct platform_device *pdev)
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* line, that we need to do on selection. This makes the local
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* callback for chipselect always get called.
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*/
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master->flags |= SPI_MASTER_GPIO_SS;
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master->flags |= SPI_CONTROLLER_GPIO_SS;
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bb->chipselect = spi_gpio_chipselect;
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bb->set_line_direction = spi_gpio_set_direction;
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@ -1779,7 +1779,7 @@ static int spi_imx_probe(struct platform_device *pdev)
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if (is_imx51_ecspi(spi_imx) || is_imx53_ecspi(spi_imx)) {
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controller->max_native_cs = 4;
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controller->flags |= SPI_MASTER_GPIO_SS;
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controller->flags |= SPI_CONTROLLER_GPIO_SS;
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}
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spi_imx->spi_drctl = spi_drctl;
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@ -677,7 +677,7 @@ static int orion_spi_probe(struct platform_device *pdev)
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master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
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master->auto_runtime_pm = true;
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master->use_gpio_descriptors = true;
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master->flags = SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_GPIO_SS;
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platform_set_drvdata(pdev, master);
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@ -858,7 +858,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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ctlr->mode_bits |= SPI_NO_CS;
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ctlr->slave_abort = rockchip_spi_slave_abort;
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} else {
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ctlr->flags = SPI_MASTER_GPIO_SS;
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ctlr->flags = SPI_CONTROLLER_GPIO_SS;
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ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM;
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/*
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* rk spi0 has two native cs, spi1..5 one cs only
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@ -379,7 +379,7 @@ static int sifive_spi_probe(struct platform_device *pdev)
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* we need to "left-align" the bits (unless SPI_LSB_FIRST)
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*/
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->flags = SPI_CONTROLLER_MUST_TX | SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_GPIO_SS;
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master->prepare_message = sifive_spi_prepare_message;
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master->set_cs = sifive_spi_set_cs;
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master->transfer_one = sifive_spi_transfer_one;
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@ -1006,7 +1006,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
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gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate);
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}
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/* Some SPI masters need both GPIO CS & slave_select */
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if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
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if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
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spi->controller->set_cs)
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spi->controller->set_cs(spi, !enable);
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} else if (spi->controller->set_cs) {
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@ -3052,7 +3052,7 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr)
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ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
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if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
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if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios &&
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ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
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dev_err(dev, "No unused native chip select available\n");
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return -EINVAL;
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@ -562,8 +562,7 @@ struct spi_controller {
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#define SPI_CONTROLLER_NO_TX BIT(2) /* Can't do buffer write */
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#define SPI_CONTROLLER_MUST_RX BIT(3) /* Requires rx */
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#define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */
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#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
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#define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */
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/* Flag indicating if the allocation of this struct is devres-managed */
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bool devm_allocated;
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