ASoC: tas2764: Add the driver for the TAS2764
Introduce the Texas Instruments TAS2764 amplifier driver with I/V sense for loud speaker applications. Signed-off-by: Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20201007155341.10139-2-dmurphy@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Dan Murphy
Mark Brown
Родитель
696bef7043
Коммит
827ed8a0fa
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@ -195,6 +195,7 @@ config SND_SOC_ALL_CODECS
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imply SND_SOC_STI_SAS
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imply SND_SOC_TAS2552
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imply SND_SOC_TAS2562
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imply SND_SOC_TAS2764
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imply SND_SOC_TAS2770
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imply SND_SOC_TAS5086
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imply SND_SOC_TAS571X
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@ -1303,6 +1304,10 @@ config SND_SOC_TAS2562
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tristate "Texas Instruments TAS2562 Mono Audio amplifier"
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depends on I2C
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config SND_SOC_TAS2764
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tristate "Texas Instruments TAS2764 Mono Audio amplifier"
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depends on I2C
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config SND_SOC_TAS2770
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tristate "Texas Instruments TAS2770 speaker amplifier"
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depends on I2C
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@ -304,6 +304,7 @@ snd-soc-simple-amplifier-objs := simple-amplifier.o
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snd-soc-tpa6130a2-objs := tpa6130a2.o
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snd-soc-tas2552-objs := tas2552.o
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snd-soc-tas2562-objs := tas2562.o
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snd-soc-tas2764-objs := tas2764.o
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obj-$(CONFIG_SND_SOC_88PM860X) += snd-soc-88pm860x.o
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obj-$(CONFIG_SND_SOC_AB8500_CODEC) += snd-soc-ab8500-codec.o
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@ -517,6 +518,7 @@ obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
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obj-$(CONFIG_SND_SOC_STI_SAS) += snd-soc-sti-sas.o
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obj-$(CONFIG_SND_SOC_TAS2552) += snd-soc-tas2552.o
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obj-$(CONFIG_SND_SOC_TAS2562) += snd-soc-tas2562.o
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obj-$(CONFIG_SND_SOC_TAS2764) += snd-soc-tas2764.o
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obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
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obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
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obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc-tas5720.o
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@ -0,0 +1,688 @@
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// SPDX-License-Identifier: GPL-2.0
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//
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// Driver for the Texas Instruments TAS2764 CODEC
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// Copyright (C) 2020 Texas Instruments Inc.
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "tas2764.h"
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struct tas2764_priv {
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struct snd_soc_component *component;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *sdz_gpio;
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struct regmap *regmap;
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struct device *dev;
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int v_sense_slot;
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int i_sense_slot;
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};
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static void tas2764_reset(struct tas2764_priv *tas2764)
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{
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if (tas2764->reset_gpio) {
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gpiod_set_value_cansleep(tas2764->reset_gpio, 0);
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msleep(20);
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gpiod_set_value_cansleep(tas2764->reset_gpio, 1);
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}
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snd_soc_component_write(tas2764->component, TAS2764_SW_RST,
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TAS2764_RST);
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}
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static int tas2764_set_bias_level(struct snd_soc_component *component,
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enum snd_soc_bias_level level)
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{
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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switch (level) {
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case SND_SOC_BIAS_ON:
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snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_ACTIVE);
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break;
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case SND_SOC_BIAS_STANDBY:
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case SND_SOC_BIAS_PREPARE:
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snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_MUTE);
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break;
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case SND_SOC_BIAS_OFF:
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snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_SHUTDOWN);
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break;
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default:
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dev_err(tas2764->dev,
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"wrong power level setting %d\n", level);
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return -EINVAL;
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}
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return 0;
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}
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#ifdef CONFIG_PM
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static int tas2764_codec_suspend(struct snd_soc_component *component)
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{
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_SHUTDOWN);
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if (ret < 0)
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return ret;
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if (tas2764->sdz_gpio)
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gpiod_set_value_cansleep(tas2764->sdz_gpio, 0);
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regcache_cache_only(tas2764->regmap, true);
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regcache_mark_dirty(tas2764->regmap);
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return 0;
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}
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static int tas2764_codec_resume(struct snd_soc_component *component)
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{
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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if (tas2764->sdz_gpio)
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gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_ACTIVE);
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if (ret < 0)
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return ret;
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regcache_cache_only(tas2764->regmap, false);
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return regcache_sync(tas2764->regmap);
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}
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#else
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#define tas2764_codec_suspend NULL
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#define tas2764_codec_resume NULL
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#endif
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static const char * const tas2764_ASI1_src[] = {
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"I2C offset", "Left", "Right", "LeftRightDiv2",
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};
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static SOC_ENUM_SINGLE_DECL(
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tas2764_ASI1_src_enum, TAS2764_TDM_CFG2, 4, tas2764_ASI1_src);
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static const struct snd_kcontrol_new tas2764_asi1_mux =
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SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum);
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static int tas2764_dac_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_MUTE);
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break;
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case SND_SOC_DAPM_PRE_PMD:
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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TAS2764_PWR_CTRL_SHUTDOWN);
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break;
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default:
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dev_err(tas2764->dev, "Unsupported event\n");
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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return 0;
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}
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static const struct snd_kcontrol_new isense_switch =
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SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN, 1, 1);
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static const struct snd_kcontrol_new vsense_switch =
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SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN, 1, 1);
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static const struct snd_soc_dapm_widget tas2764_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2764_asi1_mux),
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SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN,
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1, &isense_switch),
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SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN,
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1, &vsense_switch),
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SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2764_dac_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_OUTPUT("OUT"),
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SND_SOC_DAPM_SIGGEN("VMON"),
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SND_SOC_DAPM_SIGGEN("IMON")
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};
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static const struct snd_soc_dapm_route tas2764_audio_map[] = {
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{"ASI1 Sel", "I2C offset", "ASI1"},
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{"ASI1 Sel", "Left", "ASI1"},
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{"ASI1 Sel", "Right", "ASI1"},
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{"ASI1 Sel", "LeftRightDiv2", "ASI1"},
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{"DAC", NULL, "ASI1 Sel"},
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{"OUT", NULL, "DAC"},
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{"ISENSE", "Switch", "IMON"},
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{"VSENSE", "Switch", "VMON"},
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};
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static int tas2764_mute(struct snd_soc_dai *dai, int mute, int direction)
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{
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struct snd_soc_component *component = dai->component;
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int ret;
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ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
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TAS2764_PWR_CTRL_MASK,
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mute ? TAS2764_PWR_CTRL_MUTE : 0);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tas2764_set_bitwidth(struct tas2764_priv *tas2764, int bitwidth)
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{
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struct snd_soc_component *component = tas2764->component;
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int sense_en;
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int val;
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int ret;
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switch (bitwidth) {
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case SNDRV_PCM_FORMAT_S16_LE:
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ret = snd_soc_component_update_bits(component,
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TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_RXW_MASK,
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TAS2764_TDM_CFG2_RXW_16BITS);
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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ret = snd_soc_component_update_bits(component,
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TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_RXW_MASK,
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TAS2764_TDM_CFG2_RXW_24BITS);
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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ret = snd_soc_component_update_bits(component,
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TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_RXW_MASK,
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TAS2764_TDM_CFG2_RXW_32BITS);
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break;
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default:
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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val = snd_soc_component_read(tas2764->component, TAS2764_PWR_CTRL);
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if (val < 0)
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return val;
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if (val & (1 << TAS2764_VSENSE_POWER_EN))
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sense_en = 0;
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else
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sense_en = TAS2764_TDM_CFG5_VSNS_ENABLE;
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ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
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TAS2764_TDM_CFG5_VSNS_ENABLE,
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sense_en);
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if (ret < 0)
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return ret;
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if (val & (1 << TAS2764_ISENSE_POWER_EN))
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sense_en = 0;
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else
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sense_en = TAS2764_TDM_CFG6_ISNS_ENABLE;
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ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
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TAS2764_TDM_CFG6_ISNS_ENABLE,
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sense_en);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tas2764_set_samplerate(struct tas2764_priv *tas2764, int samplerate)
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{
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struct snd_soc_component *component = tas2764->component;
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int ramp_rate_val;
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int ret;
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switch (samplerate) {
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case 48000:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
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TAS2764_TDM_CFG0_44_1_48KHZ;
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break;
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case 44100:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
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TAS2764_TDM_CFG0_44_1_48KHZ;
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break;
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case 96000:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
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TAS2764_TDM_CFG0_88_2_96KHZ;
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break;
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case 88200:
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ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
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TAS2764_TDM_CFG0_88_2_96KHZ;
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break;
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default:
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return -EINVAL;
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}
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
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TAS2764_TDM_CFG0_SMP_MASK |
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TAS2764_TDM_CFG0_MASK,
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ramp_rate_val);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tas2764_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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int ret;
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ret = tas2764_set_bitwidth(tas2764, params_format(params));
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if (ret < 0)
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return ret;
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return tas2764_set_samplerate(tas2764, params_rate(params));
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}
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static int tas2764_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_component *component = dai->component;
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struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
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u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0;
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int iface;
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int ret;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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asi_cfg_1 = TAS2764_TDM_CFG1_RX_RISING;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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asi_cfg_1 = TAS2764_TDM_CFG1_RX_FALLING;
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break;
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default:
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dev_err(tas2764->dev, "ASI format Inverse is not found\n");
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return -EINVAL;
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}
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
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TAS2764_TDM_CFG1_RX_MASK,
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asi_cfg_1);
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if (ret < 0)
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return ret;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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case SND_SOC_DAIFMT_DSP_A:
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iface = TAS2764_TDM_CFG2_SCFG_I2S;
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tdm_rx_start_slot = 1;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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case SND_SOC_DAIFMT_LEFT_J:
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iface = TAS2764_TDM_CFG2_SCFG_LEFT_J;
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tdm_rx_start_slot = 0;
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break;
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default:
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dev_err(tas2764->dev,
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"DAI Format is not found, fmt=0x%x\n", fmt);
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return -EINVAL;
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}
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
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TAS2764_TDM_CFG1_MASK,
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(tdm_rx_start_slot << TAS2764_TDM_CFG1_51_SHIFT));
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if (ret < 0)
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return ret;
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ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
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TAS2764_TDM_CFG2_SCFG_MASK, iface);
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if (ret < 0)
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||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas2764_set_dai_tdm_slot(struct snd_soc_dai *dai,
|
||||
unsigned int tx_mask,
|
||||
unsigned int rx_mask,
|
||||
int slots, int slot_width)
|
||||
{
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
|
||||
int left_slot, right_slot;
|
||||
int slots_cfg;
|
||||
int slot_size;
|
||||
int ret;
|
||||
|
||||
if (tx_mask == 0 || rx_mask != 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (slots == 1) {
|
||||
if (tx_mask != 1)
|
||||
return -EINVAL;
|
||||
left_slot = 0;
|
||||
right_slot = 0;
|
||||
} else {
|
||||
left_slot = __ffs(tx_mask);
|
||||
tx_mask &= ~(1 << left_slot);
|
||||
if (tx_mask == 0) {
|
||||
right_slot = left_slot;
|
||||
} else {
|
||||
right_slot = __ffs(tx_mask);
|
||||
tx_mask &= ~(1 << right_slot);
|
||||
}
|
||||
}
|
||||
|
||||
if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
|
||||
return -EINVAL;
|
||||
|
||||
slots_cfg = (right_slot << TAS2764_TDM_CFG3_RXS_SHIFT) | left_slot;
|
||||
|
||||
ret = snd_soc_component_write(component, TAS2764_TDM_CFG3, slots_cfg);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
switch (slot_width) {
|
||||
case 16:
|
||||
slot_size = TAS2764_TDM_CFG2_RXS_16BITS;
|
||||
break;
|
||||
case 24:
|
||||
slot_size = TAS2764_TDM_CFG2_RXS_24BITS;
|
||||
break;
|
||||
case 32:
|
||||
slot_size = TAS2764_TDM_CFG2_RXS_32BITS;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
|
||||
TAS2764_TDM_CFG2_RXS_MASK,
|
||||
slot_size);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG5,
|
||||
TAS2764_TDM_CFG5_50_MASK,
|
||||
tas2764->v_sense_slot);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG6,
|
||||
TAS2764_TDM_CFG6_50_MASK,
|
||||
tas2764->i_sense_slot);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct snd_soc_dai_ops tas2764_dai_ops = {
|
||||
.mute_stream = tas2764_mute,
|
||||
.hw_params = tas2764_hw_params,
|
||||
.set_fmt = tas2764_set_fmt,
|
||||
.set_tdm_slot = tas2764_set_dai_tdm_slot,
|
||||
.no_capture_mute = 1,
|
||||
};
|
||||
|
||||
#define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
|
||||
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
||||
|
||||
#define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
|
||||
SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
|
||||
|
||||
static struct snd_soc_dai_driver tas2764_dai_driver[] = {
|
||||
{
|
||||
.name = "tas2764 ASI1",
|
||||
.id = 0,
|
||||
.playback = {
|
||||
.stream_name = "ASI1 Playback",
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.rates = TAS2764_RATES,
|
||||
.formats = TAS2764_FORMATS,
|
||||
},
|
||||
.capture = {
|
||||
.stream_name = "ASI1 Capture",
|
||||
.channels_min = 0,
|
||||
.channels_max = 2,
|
||||
.rates = TAS2764_RATES,
|
||||
.formats = TAS2764_FORMATS,
|
||||
},
|
||||
.ops = &tas2764_dai_ops,
|
||||
.symmetric_rates = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static int tas2764_codec_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
|
||||
tas2764->component = component;
|
||||
|
||||
if (tas2764->sdz_gpio)
|
||||
gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
|
||||
|
||||
tas2764_reset(tas2764);
|
||||
|
||||
ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
|
||||
TAS2764_TDM_CFG5_VSNS_ENABLE, 0);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
|
||||
TAS2764_TDM_CFG6_ISNS_ENABLE, 0);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
|
||||
TAS2764_PWR_CTRL_MASK,
|
||||
TAS2764_PWR_CTRL_MUTE);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv, 1100, 50, 0);
|
||||
static DECLARE_TLV_DB_SCALE(tas2764_playback_volume, -10000, 50, 0);
|
||||
|
||||
static const struct snd_kcontrol_new tas2764_snd_controls[] = {
|
||||
SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC, 0,
|
||||
TAS2764_DVC_MAX, 1, tas2764_playback_volume),
|
||||
SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0, 0, 0x14, 0,
|
||||
tas2764_digital_tlv),
|
||||
};
|
||||
|
||||
static const struct snd_soc_component_driver soc_component_driver_tas2764 = {
|
||||
.probe = tas2764_codec_probe,
|
||||
.suspend = tas2764_codec_suspend,
|
||||
.resume = tas2764_codec_resume,
|
||||
.set_bias_level = tas2764_set_bias_level,
|
||||
.controls = tas2764_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(tas2764_snd_controls),
|
||||
.dapm_widgets = tas2764_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(tas2764_dapm_widgets),
|
||||
.dapm_routes = tas2764_audio_map,
|
||||
.num_dapm_routes = ARRAY_SIZE(tas2764_audio_map),
|
||||
.idle_bias_on = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct reg_default tas2764_reg_defaults[] = {
|
||||
{ TAS2764_PAGE, 0x00 },
|
||||
{ TAS2764_SW_RST, 0x00 },
|
||||
{ TAS2764_PWR_CTRL, 0x1a },
|
||||
{ TAS2764_DVC, 0x00 },
|
||||
{ TAS2764_CHNL_0, 0x00 },
|
||||
{ TAS2764_TDM_CFG0, 0x09 },
|
||||
{ TAS2764_TDM_CFG1, 0x02 },
|
||||
{ TAS2764_TDM_CFG2, 0x0a },
|
||||
{ TAS2764_TDM_CFG3, 0x10 },
|
||||
{ TAS2764_TDM_CFG5, 0x42 },
|
||||
};
|
||||
|
||||
static const struct regmap_range_cfg tas2764_regmap_ranges[] = {
|
||||
{
|
||||
.range_min = 0,
|
||||
.range_max = 1 * 128,
|
||||
.selector_reg = TAS2764_PAGE,
|
||||
.selector_mask = 0xff,
|
||||
.selector_shift = 0,
|
||||
.window_start = 0,
|
||||
.window_len = 128,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct regmap_config tas2764_i2c_regmap = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.reg_defaults = tas2764_reg_defaults,
|
||||
.num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
.ranges = tas2764_regmap_ranges,
|
||||
.num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
|
||||
.max_register = 1 * 128,
|
||||
};
|
||||
|
||||
static int tas2764_parse_dt(struct device *dev, struct tas2764_priv *tas2764)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
tas2764->reset_gpio = devm_gpiod_get_optional(tas2764->dev, "reset",
|
||||
GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(tas2764->reset_gpio)) {
|
||||
if (PTR_ERR(tas2764->reset_gpio) == -EPROBE_DEFER) {
|
||||
tas2764->reset_gpio = NULL;
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
}
|
||||
|
||||
tas2764->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(tas2764->sdz_gpio)) {
|
||||
if (PTR_ERR(tas2764->sdz_gpio) == -EPROBE_DEFER)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
tas2764->sdz_gpio = NULL;
|
||||
}
|
||||
|
||||
ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
|
||||
&tas2764->i_sense_slot);
|
||||
if (ret)
|
||||
tas2764->i_sense_slot = 0;
|
||||
|
||||
ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
|
||||
&tas2764->v_sense_slot);
|
||||
if (ret)
|
||||
tas2764->v_sense_slot = 2;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas2764_i2c_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct tas2764_priv *tas2764;
|
||||
int result;
|
||||
|
||||
tas2764 = devm_kzalloc(&client->dev, sizeof(struct tas2764_priv),
|
||||
GFP_KERNEL);
|
||||
if (!tas2764)
|
||||
return -ENOMEM;
|
||||
|
||||
tas2764->dev = &client->dev;
|
||||
i2c_set_clientdata(client, tas2764);
|
||||
dev_set_drvdata(&client->dev, tas2764);
|
||||
|
||||
tas2764->regmap = devm_regmap_init_i2c(client, &tas2764_i2c_regmap);
|
||||
if (IS_ERR(tas2764->regmap)) {
|
||||
result = PTR_ERR(tas2764->regmap);
|
||||
dev_err(&client->dev, "Failed to allocate register map: %d\n",
|
||||
result);
|
||||
return result;
|
||||
}
|
||||
|
||||
if (client->dev.of_node) {
|
||||
result = tas2764_parse_dt(&client->dev, tas2764);
|
||||
if (result) {
|
||||
dev_err(tas2764->dev, "%s: Failed to parse devicetree\n",
|
||||
__func__);
|
||||
return result;
|
||||
}
|
||||
}
|
||||
|
||||
return devm_snd_soc_register_component(tas2764->dev,
|
||||
&soc_component_driver_tas2764,
|
||||
tas2764_dai_driver,
|
||||
ARRAY_SIZE(tas2764_dai_driver));
|
||||
}
|
||||
|
||||
static const struct i2c_device_id tas2764_i2c_id[] = {
|
||||
{ "tas2764", 0},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, tas2764_i2c_id);
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static const struct of_device_id tas2764_of_match[] = {
|
||||
{ .compatible = "ti,tas2764" },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tas2764_of_match);
|
||||
#endif
|
||||
|
||||
static struct i2c_driver tas2764_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "tas2764",
|
||||
.of_match_table = of_match_ptr(tas2764_of_match),
|
||||
},
|
||||
.probe = tas2764_i2c_probe,
|
||||
.id_table = tas2764_i2c_id,
|
||||
};
|
||||
module_i2c_driver(tas2764_i2c_driver);
|
||||
|
||||
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
|
||||
MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,92 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* tas2764.h - ALSA SoC Texas Instruments TAS2764 Mono Audio Amplifier
|
||||
*
|
||||
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com
|
||||
*
|
||||
* Author: Dan Murphy <dmurphy@ti.com>
|
||||
*/
|
||||
|
||||
#ifndef __TAS2764__
|
||||
#define __TAS2764__
|
||||
|
||||
/* Book Control Register */
|
||||
#define TAS2764_BOOKCTL_PAGE 0
|
||||
#define TAS2764_BOOKCTL_REG 127
|
||||
#define TAS2764_REG(page, reg) ((page * 128) + reg)
|
||||
|
||||
/* Page */
|
||||
#define TAS2764_PAGE TAS2764_REG(0X0, 0x00)
|
||||
#define TAS2764_PAGE_PAGE_MASK 255
|
||||
|
||||
/* Software Reset */
|
||||
#define TAS2764_SW_RST TAS2764_REG(0X0, 0x01)
|
||||
#define TAS2764_RST BIT(0)
|
||||
|
||||
/* Power Control */
|
||||
#define TAS2764_PWR_CTRL TAS2764_REG(0X0, 0x02)
|
||||
#define TAS2764_PWR_CTRL_MASK GENMASK(1, 0)
|
||||
#define TAS2764_PWR_CTRL_ACTIVE 0x0
|
||||
#define TAS2764_PWR_CTRL_MUTE BIT(0)
|
||||
#define TAS2764_PWR_CTRL_SHUTDOWN BIT(1)
|
||||
|
||||
#define TAS2764_VSENSE_POWER_EN 3
|
||||
#define TAS2764_ISENSE_POWER_EN 4
|
||||
|
||||
/* Digital Volume Control */
|
||||
#define TAS2764_DVC TAS2764_REG(0X0, 0x1a)
|
||||
#define TAS2764_DVC_MAX 0xc9
|
||||
|
||||
#define TAS2764_CHNL_0 TAS2764_REG(0X0, 0x03)
|
||||
|
||||
/* TDM Configuration Reg0 */
|
||||
#define TAS2764_TDM_CFG0 TAS2764_REG(0X0, 0x08)
|
||||
#define TAS2764_TDM_CFG0_SMP_MASK BIT(5)
|
||||
#define TAS2764_TDM_CFG0_SMP_48KHZ 0x0
|
||||
#define TAS2764_TDM_CFG0_SMP_44_1KHZ BIT(5)
|
||||
#define TAS2764_TDM_CFG0_MASK GENMASK(3, 1)
|
||||
#define TAS2764_TDM_CFG0_44_1_48KHZ BIT(3)
|
||||
#define TAS2764_TDM_CFG0_88_2_96KHZ (BIT(3) | BIT(1))
|
||||
|
||||
/* TDM Configuration Reg1 */
|
||||
#define TAS2764_TDM_CFG1 TAS2764_REG(0X0, 0x09)
|
||||
#define TAS2764_TDM_CFG1_MASK GENMASK(5, 1)
|
||||
#define TAS2764_TDM_CFG1_51_SHIFT 1
|
||||
#define TAS2764_TDM_CFG1_RX_MASK BIT(0)
|
||||
#define TAS2764_TDM_CFG1_RX_RISING 0x0
|
||||
#define TAS2764_TDM_CFG1_RX_FALLING BIT(0)
|
||||
|
||||
/* TDM Configuration Reg2 */
|
||||
#define TAS2764_TDM_CFG2 TAS2764_REG(0X0, 0x0a)
|
||||
#define TAS2764_TDM_CFG2_RXW_MASK GENMASK(3, 2)
|
||||
#define TAS2764_TDM_CFG2_RXW_16BITS 0x0
|
||||
#define TAS2764_TDM_CFG2_RXW_24BITS BIT(3)
|
||||
#define TAS2764_TDM_CFG2_RXW_32BITS (BIT(3) | BIT(2))
|
||||
#define TAS2764_TDM_CFG2_RXS_MASK GENMASK(1, 0)
|
||||
#define TAS2764_TDM_CFG2_RXS_16BITS 0x0
|
||||
#define TAS2764_TDM_CFG2_RXS_24BITS BIT(0)
|
||||
#define TAS2764_TDM_CFG2_RXS_32BITS BIT(1)
|
||||
#define TAS2764_TDM_CFG2_SCFG_MASK GENMASK(5, 4)
|
||||
#define TAS2764_TDM_CFG2_SCFG_I2S 0x0
|
||||
#define TAS2764_TDM_CFG2_SCFG_LEFT_J BIT(4)
|
||||
#define TAS2764_TDM_CFG2_SCFG_RIGHT_J BIT(5)
|
||||
|
||||
/* TDM Configuration Reg3 */
|
||||
#define TAS2764_TDM_CFG3 TAS2764_REG(0X0, 0x0c)
|
||||
#define TAS2764_TDM_CFG3_RXS_MASK GENMASK(7, 4)
|
||||
#define TAS2764_TDM_CFG3_RXS_SHIFT 0x4
|
||||
#define TAS2764_TDM_CFG3_MASK GENMASK(3, 0)
|
||||
|
||||
/* TDM Configuration Reg5 */
|
||||
#define TAS2764_TDM_CFG5 TAS2764_REG(0X0, 0x0e)
|
||||
#define TAS2764_TDM_CFG5_VSNS_MASK BIT(6)
|
||||
#define TAS2764_TDM_CFG5_VSNS_ENABLE BIT(6)
|
||||
#define TAS2764_TDM_CFG5_50_MASK GENMASK(5, 0)
|
||||
|
||||
/* TDM Configuration Reg6 */
|
||||
#define TAS2764_TDM_CFG6 TAS2764_REG(0X0, 0x0f)
|
||||
#define TAS2764_TDM_CFG6_ISNS_MASK BIT(6)
|
||||
#define TAS2764_TDM_CFG6_ISNS_ENABLE BIT(6)
|
||||
#define TAS2764_TDM_CFG6_50_MASK GENMASK(5, 0)
|
||||
|
||||
#endif /* __TAS2764__ */
|
||||
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