amd-xgbe: Add ACPI support
Add support for ACPI to the amd-xgbe and amd-xgbe-phy drivers. This support converts many of the device tree APIs to the new device_property APIs. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Lendacky, Thomas
David S. Miller
Родитель
0d40b6101f
Коммит
82a19035d0
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@ -179,7 +179,7 @@ config SUNLANCE
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config AMD_XGBE
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tristate "AMD 10GbE Ethernet driver"
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depends on OF_NET && HAS_IOMEM
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depends on (OF_NET || ACPI) && HAS_IOMEM
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select PHYLIB
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select AMD_XGBE_PHY
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select BITREVERSE
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@ -131,7 +131,7 @@ static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,
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DBGPR("-->xgbe_usec_to_riwt\n");
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rate = clk_get_rate(pdata->sysclk);
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rate = pdata->sysclk_rate;
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/*
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* Convert the input usec value to the watchdog timer value. Each
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@ -154,7 +154,7 @@ static unsigned int xgbe_riwt_to_usec(struct xgbe_prv_data *pdata,
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DBGPR("-->xgbe_riwt_to_usec\n");
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rate = clk_get_rate(pdata->sysclk);
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rate = pdata->sysclk_rate;
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/*
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* Convert the input watchdog timer value to the usec value. Each
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@ -123,7 +123,10 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_net.h>
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#include <linux/of_address.h>
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#include <linux/clk.h>
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#include <linux/property.h>
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#include <linux/acpi.h>
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#include "xgbe.h"
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#include "xgbe-common.h"
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@ -162,6 +165,96 @@ static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
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xgbe_init_function_ptrs_desc(&pdata->desc_if);
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}
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#ifdef CONFIG_ACPI
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static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
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{
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struct acpi_device *adev = pdata->adev;
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struct device *dev = pdata->dev;
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u32 property;
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acpi_handle handle;
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acpi_status status;
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unsigned long long data;
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int cca;
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int ret;
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/* Obtain the system clock setting */
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ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property);
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if (ret) {
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dev_err(dev, "unable to obtain %s property\n",
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XGBE_ACPI_DMA_FREQ);
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return ret;
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}
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pdata->sysclk_rate = property;
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/* Obtain the PTP clock setting */
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ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property);
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if (ret) {
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dev_err(dev, "unable to obtain %s property\n",
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XGBE_ACPI_PTP_FREQ);
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return ret;
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}
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pdata->ptpclk_rate = property;
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/* Retrieve the device cache coherency value */
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handle = adev->handle;
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do {
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status = acpi_evaluate_integer(handle, "_CCA", NULL, &data);
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if (!ACPI_FAILURE(status)) {
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cca = data;
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break;
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}
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status = acpi_get_parent(handle, &handle);
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} while (!ACPI_FAILURE(status));
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if (ACPI_FAILURE(status)) {
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dev_err(dev, "error obtaining acpi coherency value\n");
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return -EINVAL;
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}
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pdata->coherent = !!cca;
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return 0;
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}
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#else /* CONFIG_ACPI */
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static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_ACPI */
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#ifdef CONFIG_OF
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static int xgbe_of_support(struct xgbe_prv_data *pdata)
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{
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struct device *dev = pdata->dev;
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/* Obtain the system clock setting */
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pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
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if (IS_ERR(pdata->sysclk)) {
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dev_err(dev, "dma devm_clk_get failed\n");
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return PTR_ERR(pdata->sysclk);
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}
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pdata->sysclk_rate = clk_get_rate(pdata->sysclk);
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/* Obtain the PTP clock setting */
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pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
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if (IS_ERR(pdata->ptpclk)) {
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dev_err(dev, "ptp devm_clk_get failed\n");
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return PTR_ERR(pdata->ptpclk);
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}
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pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk);
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/* Retrieve the device cache coherency value */
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pdata->coherent = of_dma_is_coherent(dev->of_node);
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return 0;
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}
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#else /* CONFIG_OF */
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static int xgbe_of_support(struct xgbe_prv_data *pdata)
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{
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return -EINVAL;
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}
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#endif /*CONFIG_OF */
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static int xgbe_probe(struct platform_device *pdev)
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{
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struct xgbe_prv_data *pdata;
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@ -170,7 +263,7 @@ static int xgbe_probe(struct platform_device *pdev)
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struct net_device *netdev;
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struct device *dev = &pdev->dev;
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struct resource *res;
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const u8 *mac_addr;
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const char *phy_mode;
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unsigned int i;
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int ret;
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@ -187,6 +280,7 @@ static int xgbe_probe(struct platform_device *pdev)
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pdata = netdev_priv(netdev);
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pdata->netdev = netdev;
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pdata->pdev = pdev;
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pdata->adev = ACPI_COMPANION(dev);
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pdata->dev = dev;
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platform_set_drvdata(pdev, netdev);
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@ -195,6 +289,9 @@ static int xgbe_probe(struct platform_device *pdev)
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mutex_init(&pdata->rss_mutex);
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spin_lock_init(&pdata->tstamp_lock);
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/* Check if we should use ACPI or DT */
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pdata->use_acpi = (!pdata->adev || acpi_disabled) ? 0 : 1;
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/* Set and validate the number of descriptors for a ring */
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BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);
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pdata->tx_desc_count = XGBE_TX_DESC_CNT;
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@ -213,22 +310,6 @@ static int xgbe_probe(struct platform_device *pdev)
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goto err_io;
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}
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/* Obtain the system clock setting */
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pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
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if (IS_ERR(pdata->sysclk)) {
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dev_err(dev, "dma devm_clk_get failed\n");
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ret = PTR_ERR(pdata->sysclk);
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goto err_io;
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}
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/* Obtain the PTP clock setting */
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pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
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if (IS_ERR(pdata->ptpclk)) {
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dev_err(dev, "ptp devm_clk_get failed\n");
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ret = PTR_ERR(pdata->ptpclk);
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goto err_io;
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}
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/* Obtain the mmio areas for the device */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pdata->xgmac_regs = devm_ioremap_resource(dev, res);
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@ -248,16 +329,42 @@ static int xgbe_probe(struct platform_device *pdev)
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}
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DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs);
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/* Set the DMA mask */
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if (!dev->dma_mask)
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dev->dma_mask = &dev->coherent_dma_mask;
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
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if (ret) {
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dev_err(dev, "dma_set_mask_and_coherent failed\n");
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/* Retrieve the MAC address */
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ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,
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pdata->mac_addr,
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sizeof(pdata->mac_addr));
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if (ret || !is_valid_ether_addr(pdata->mac_addr)) {
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dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);
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if (!ret)
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ret = -EINVAL;
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goto err_io;
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}
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if (of_property_read_bool(dev->of_node, "dma-coherent")) {
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/* Retrieve the PHY mode - it must be "xgmii" */
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ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,
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&phy_mode);
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if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {
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dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);
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if (!ret)
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ret = -EINVAL;
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goto err_io;
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}
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pdata->phy_mode = PHY_INTERFACE_MODE_XGMII;
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/* Check for per channel interrupt support */
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if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY))
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pdata->per_channel_irq = 1;
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/* Obtain device settings unique to ACPI/OF */
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if (pdata->use_acpi)
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ret = xgbe_acpi_support(pdata);
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else
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ret = xgbe_of_support(pdata);
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if (ret)
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goto err_io;
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/* Set the DMA coherency values */
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if (pdata->coherent) {
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pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
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pdata->arcache = XGBE_DMA_OS_ARCACHE;
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pdata->awcache = XGBE_DMA_OS_AWCACHE;
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@ -267,10 +374,16 @@ static int xgbe_probe(struct platform_device *pdev)
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pdata->awcache = XGBE_DMA_SYS_AWCACHE;
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}
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/* Check for per channel interrupt support */
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if (of_property_read_bool(dev->of_node, XGBE_DMA_IRQS))
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pdata->per_channel_irq = 1;
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/* Set the DMA mask */
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if (!dev->dma_mask)
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dev->dma_mask = &dev->coherent_dma_mask;
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
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if (ret) {
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dev_err(dev, "dma_set_mask_and_coherent failed\n");
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goto err_io;
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}
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/* Get the device interrupt */
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ret = platform_get_irq(pdev, 0);
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if (ret < 0) {
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dev_err(dev, "platform_get_irq 0 failed\n");
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@ -280,6 +393,7 @@ static int xgbe_probe(struct platform_device *pdev)
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netdev->irq = pdata->dev_irq;
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netdev->base_addr = (unsigned long)pdata->xgmac_regs;
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memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len);
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/* Set all the function pointers */
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xgbe_init_all_fptrs(pdata);
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@ -292,23 +406,6 @@ static int xgbe_probe(struct platform_device *pdev)
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/* Populate the hardware features */
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xgbe_get_all_hw_features(pdata);
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/* Retrieve the MAC address */
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mac_addr = of_get_mac_address(dev->of_node);
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if (!mac_addr) {
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dev_err(dev, "invalid mac address for this device\n");
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ret = -EINVAL;
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goto err_io;
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}
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memcpy(netdev->dev_addr, mac_addr, netdev->addr_len);
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/* Retrieve the PHY mode - it must be "xgmii" */
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pdata->phy_mode = of_get_phy_mode(dev->of_node);
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if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
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dev_err(dev, "invalid phy-mode specified for this device\n");
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ret = -EINVAL;
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goto err_io;
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}
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/* Set default configuration data */
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xgbe_default_config(pdata);
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@ -492,18 +589,35 @@ static int xgbe_resume(struct device *dev)
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}
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#endif /* CONFIG_PM */
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id xgbe_acpi_match[] = {
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{ "AMDI8001", 0 },
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{},
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};
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MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);
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#endif
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#ifdef CONFIG_OF
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static const struct of_device_id xgbe_of_match[] = {
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{ .compatible = "amd,xgbe-seattle-v1a", },
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{},
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};
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MODULE_DEVICE_TABLE(of, xgbe_of_match);
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#endif
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static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
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static struct platform_driver xgbe_driver = {
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.driver = {
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.name = "amd-xgbe",
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#ifdef CONFIG_ACPI
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.acpi_match_table = xgbe_acpi_match,
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#endif
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#ifdef CONFIG_OF
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.of_match_table = xgbe_of_match,
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#endif
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.pm = &xgbe_pm_ops,
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},
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.probe = xgbe_probe,
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@ -205,25 +205,16 @@ void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)
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int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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{
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struct device_node *phy_node;
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struct mii_bus *mii;
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struct phy_device *phydev;
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int ret = 0;
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DBGPR("-->xgbe_mdio_register\n");
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/* Retrieve the phy-handle */
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phy_node = of_parse_phandle(pdata->dev->of_node, "phy-handle", 0);
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if (!phy_node) {
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dev_err(pdata->dev, "unable to parse phy-handle\n");
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return -EINVAL;
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}
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mii = mdiobus_alloc();
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if (!mii) {
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dev_err(pdata->dev, "mdiobus_alloc failed\n");
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ret = -ENOMEM;
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goto err_node_get;
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return -ENOMEM;
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}
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/* Register on the MDIO bus (don't probe any PHYs) */
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@ -252,12 +243,9 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT,
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MDIO_ID_ARGS(phydev->c45_ids.device_ids[MDIO_MMD_PCS]));
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of_node_get(phy_node);
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phydev->dev.of_node = phy_node;
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ret = phy_device_register(phydev);
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if (ret) {
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dev_err(pdata->dev, "phy_device_register failed\n");
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of_node_put(phy_node);
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goto err_phy_device;
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}
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if (!phydev->dev.driver) {
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@ -287,8 +275,6 @@ int xgbe_mdio_register(struct xgbe_prv_data *pdata)
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pdata->phydev = phydev;
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of_node_put(phy_node);
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DBGPHY_REGS(pdata);
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DBGPR("<--xgbe_mdio_register\n");
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@ -304,9 +290,6 @@ err_mdiobus_register:
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err_mdiobus_alloc:
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mdiobus_free(mii);
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err_node_get:
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of_node_put(phy_node);
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return ret;
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}
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@ -233,7 +233,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
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snprintf(info->name, sizeof(info->name), "%s",
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netdev_name(pdata->netdev));
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info->owner = THIS_MODULE;
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info->max_adj = clk_get_rate(pdata->ptpclk);
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info->max_adj = pdata->ptpclk_rate;
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info->adjfreq = xgbe_adjfreq;
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info->adjtime = xgbe_adjtime;
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info->gettime = xgbe_gettime;
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@ -254,7 +254,7 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)
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*/
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dividend = 50000000;
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dividend <<= 32;
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pdata->tstamp_addend = div_u64(dividend, clk_get_rate(pdata->ptpclk));
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pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate);
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/* Setup the timecounter */
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cc->read = xgbe_cc_read;
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@ -182,10 +182,18 @@
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#define XGBE_PHY_NAME "amd_xgbe_phy"
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#define XGBE_PRTAD 0
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/* Common property names */
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#define XGBE_MAC_ADDR_PROPERTY "mac-address"
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#define XGBE_PHY_MODE_PROPERTY "phy-mode"
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#define XGBE_DMA_IRQS_PROPERTY "amd,per-channel-interrupt"
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/* Device-tree clock names */
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#define XGBE_DMA_CLOCK "dma_clk"
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#define XGBE_PTP_CLOCK "ptp_clk"
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#define XGBE_DMA_IRQS "amd,per-channel-interrupt"
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/* ACPI property names */
|
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#define XGBE_ACPI_DMA_FREQ "amd,dma-freq"
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#define XGBE_ACPI_PTP_FREQ "amd,ptp-freq"
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/* Timestamp support - values based on 50MHz PTP clock
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* 50MHz => 20 nsec
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|
|
@ -645,8 +653,12 @@ struct xgbe_hw_features {
|
|||
struct xgbe_prv_data {
|
||||
struct net_device *netdev;
|
||||
struct platform_device *pdev;
|
||||
struct acpi_device *adev;
|
||||
struct device *dev;
|
||||
|
||||
/* ACPI or DT flag */
|
||||
unsigned int use_acpi;
|
||||
|
||||
/* XGMAC/XPCS related mmio registers */
|
||||
void __iomem *xgmac_regs; /* XGMAC CSRs */
|
||||
void __iomem *xpcs_regs; /* XPCS MMD registers */
|
||||
|
|
@ -667,6 +679,7 @@ struct xgbe_prv_data {
|
|||
struct xgbe_desc_if desc_if;
|
||||
|
||||
/* AXI DMA settings */
|
||||
unsigned int coherent;
|
||||
unsigned int axdomain;
|
||||
unsigned int arcache;
|
||||
unsigned int awcache;
|
||||
|
|
@ -734,6 +747,7 @@ struct xgbe_prv_data {
|
|||
unsigned int phy_rx_pause;
|
||||
|
||||
/* Netdev related settings */
|
||||
unsigned char mac_addr[ETH_ALEN];
|
||||
netdev_features_t netdev_features;
|
||||
struct napi_struct napi;
|
||||
struct xgbe_mmc_stats mmc_stats;
|
||||
|
|
@ -743,7 +757,9 @@ struct xgbe_prv_data {
|
|||
|
||||
/* Device clocks */
|
||||
struct clk *sysclk;
|
||||
unsigned long sysclk_rate;
|
||||
struct clk *ptpclk;
|
||||
unsigned long ptpclk_rate;
|
||||
|
||||
/* Timestamp support */
|
||||
spinlock_t tstamp_lock;
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ config AMD_PHY
|
|||
|
||||
config AMD_XGBE_PHY
|
||||
tristate "Driver for the AMD 10GbE (amd-xgbe) PHYs"
|
||||
depends on OF && HAS_IOMEM
|
||||
depends on (OF || ACPI) && HAS_IOMEM
|
||||
---help---
|
||||
Currently supports the AMD 10GbE PHY
|
||||
|
||||
|
|
|
|||
|
|
@ -76,6 +76,8 @@
|
|||
#include <linux/of_device.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/acpi.h>
|
||||
|
||||
MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
|
|
@ -323,12 +325,13 @@ enum amd_xgbe_phy_mode {
|
|||
};
|
||||
|
||||
enum amd_xgbe_phy_speedset {
|
||||
AMD_XGBE_PHY_SPEEDSET_1000_10000,
|
||||
AMD_XGBE_PHY_SPEEDSET_1000_10000 = 0,
|
||||
AMD_XGBE_PHY_SPEEDSET_2500_10000,
|
||||
};
|
||||
|
||||
struct amd_xgbe_phy_priv {
|
||||
struct platform_device *pdev;
|
||||
struct acpi_device *adev;
|
||||
struct device *dev;
|
||||
|
||||
struct phy_device *phydev;
|
||||
|
|
@ -1420,46 +1423,94 @@ static int amd_xgbe_phy_resume(struct phy_device *phydev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int amd_xgbe_phy_resource_count(struct platform_device *pdev,
|
||||
unsigned int type)
|
||||
{
|
||||
unsigned int count;
|
||||
int i;
|
||||
|
||||
for (i = 0, count = 0; i < pdev->num_resources; i++) {
|
||||
struct resource *r = &pdev->resource[i];
|
||||
|
||||
if (type == resource_type(r))
|
||||
count++;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static int amd_xgbe_phy_probe(struct phy_device *phydev)
|
||||
{
|
||||
struct amd_xgbe_phy_priv *priv;
|
||||
struct platform_device *pdev;
|
||||
struct device *dev;
|
||||
const __be32 *property;
|
||||
unsigned int speed_set;
|
||||
struct platform_device *phy_pdev;
|
||||
struct device *dev, *phy_dev;
|
||||
unsigned int phy_resnum, phy_irqnum;
|
||||
int ret;
|
||||
|
||||
if (!phydev->dev.of_node)
|
||||
if (!phydev->bus || !phydev->bus->parent)
|
||||
return -EINVAL;
|
||||
|
||||
pdev = of_find_device_by_node(phydev->dev.of_node);
|
||||
if (!pdev)
|
||||
return -EINVAL;
|
||||
dev = &pdev->dev;
|
||||
dev = phydev->bus->parent;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv) {
|
||||
ret = -ENOMEM;
|
||||
goto err_pdev;
|
||||
}
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->pdev = pdev;
|
||||
priv->pdev = to_platform_device(dev);
|
||||
priv->adev = ACPI_COMPANION(dev);
|
||||
priv->dev = dev;
|
||||
priv->phydev = phydev;
|
||||
mutex_init(&priv->an_mutex);
|
||||
INIT_WORK(&priv->an_irq_work, amd_xgbe_an_irq_work);
|
||||
INIT_WORK(&priv->an_work, amd_xgbe_an_state_machine);
|
||||
|
||||
if (!priv->adev || acpi_disabled) {
|
||||
struct device_node *bus_node;
|
||||
struct device_node *phy_node;
|
||||
|
||||
bus_node = priv->dev->of_node;
|
||||
phy_node = of_parse_phandle(bus_node, "phy-handle", 0);
|
||||
if (!phy_node) {
|
||||
dev_err(dev, "unable to parse phy-handle\n");
|
||||
ret = -EINVAL;
|
||||
goto err_priv;
|
||||
}
|
||||
|
||||
phy_pdev = of_find_device_by_node(phy_node);
|
||||
of_node_put(phy_node);
|
||||
|
||||
if (!phy_pdev) {
|
||||
dev_err(dev, "unable to obtain phy device\n");
|
||||
ret = -EINVAL;
|
||||
goto err_priv;
|
||||
}
|
||||
|
||||
phy_resnum = 0;
|
||||
phy_irqnum = 0;
|
||||
} else {
|
||||
/* In ACPI, the XGBE and PHY resources are the grouped
|
||||
* together with the PHY resources at the end
|
||||
*/
|
||||
phy_pdev = priv->pdev;
|
||||
phy_resnum = amd_xgbe_phy_resource_count(phy_pdev,
|
||||
IORESOURCE_MEM) - 3;
|
||||
phy_irqnum = amd_xgbe_phy_resource_count(phy_pdev,
|
||||
IORESOURCE_IRQ) - 1;
|
||||
}
|
||||
phy_dev = &phy_pdev->dev;
|
||||
|
||||
/* Get the device mmio areas */
|
||||
priv->rxtx_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
priv->rxtx_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
|
||||
phy_resnum++);
|
||||
priv->rxtx_regs = devm_ioremap_resource(dev, priv->rxtx_res);
|
||||
if (IS_ERR(priv->rxtx_regs)) {
|
||||
dev_err(dev, "rxtx ioremap failed\n");
|
||||
ret = PTR_ERR(priv->rxtx_regs);
|
||||
goto err_priv;
|
||||
goto err_put;
|
||||
}
|
||||
|
||||
priv->sir0_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
priv->sir0_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
|
||||
phy_resnum++);
|
||||
priv->sir0_regs = devm_ioremap_resource(dev, priv->sir0_res);
|
||||
if (IS_ERR(priv->sir0_regs)) {
|
||||
dev_err(dev, "sir0 ioremap failed\n");
|
||||
|
|
@ -1467,7 +1518,8 @@ static int amd_xgbe_phy_probe(struct phy_device *phydev)
|
|||
goto err_rxtx;
|
||||
}
|
||||
|
||||
priv->sir1_res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
|
||||
priv->sir1_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
|
||||
phy_resnum++);
|
||||
priv->sir1_regs = devm_ioremap_resource(dev, priv->sir1_res);
|
||||
if (IS_ERR(priv->sir1_regs)) {
|
||||
dev_err(dev, "sir1 ioremap failed\n");
|
||||
|
|
@ -1476,7 +1528,7 @@ static int amd_xgbe_phy_probe(struct phy_device *phydev)
|
|||
}
|
||||
|
||||
/* Get the auto-negotiation interrupt */
|
||||
ret = platform_get_irq(pdev, 0);
|
||||
ret = platform_get_irq(phy_pdev, phy_irqnum);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "platform_get_irq failed\n");
|
||||
goto err_sir1;
|
||||
|
|
@ -1484,28 +1536,29 @@ static int amd_xgbe_phy_probe(struct phy_device *phydev)
|
|||
priv->an_irq = ret;
|
||||
|
||||
/* Get the device speed set property */
|
||||
speed_set = 0;
|
||||
property = of_get_property(dev->of_node, XGBE_PHY_SPEEDSET_PROPERTY,
|
||||
NULL);
|
||||
if (property)
|
||||
speed_set = be32_to_cpu(*property);
|
||||
ret = device_property_read_u32(phy_dev, XGBE_PHY_SPEEDSET_PROPERTY,
|
||||
&priv->speed_set);
|
||||
if (ret) {
|
||||
dev_err(dev, "invalid %s property\n",
|
||||
XGBE_PHY_SPEEDSET_PROPERTY);
|
||||
goto err_sir1;
|
||||
}
|
||||
|
||||
switch (speed_set) {
|
||||
case 0:
|
||||
priv->speed_set = AMD_XGBE_PHY_SPEEDSET_1000_10000;
|
||||
break;
|
||||
case 1:
|
||||
priv->speed_set = AMD_XGBE_PHY_SPEEDSET_2500_10000;
|
||||
switch (priv->speed_set) {
|
||||
case AMD_XGBE_PHY_SPEEDSET_1000_10000:
|
||||
case AMD_XGBE_PHY_SPEEDSET_2500_10000:
|
||||
break;
|
||||
default:
|
||||
dev_err(dev, "invalid amd,speed-set property\n");
|
||||
dev_err(dev, "invalid %s property\n",
|
||||
XGBE_PHY_SPEEDSET_PROPERTY);
|
||||
ret = -EINVAL;
|
||||
goto err_sir1;
|
||||
}
|
||||
|
||||
phydev->priv = priv;
|
||||
|
||||
of_dev_put(pdev);
|
||||
if (!priv->adev || acpi_disabled)
|
||||
platform_device_put(phy_pdev);
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
@ -1524,12 +1577,13 @@ err_rxtx:
|
|||
devm_release_mem_region(dev, priv->rxtx_res->start,
|
||||
resource_size(priv->rxtx_res));
|
||||
|
||||
err_put:
|
||||
if (!priv->adev || acpi_disabled)
|
||||
platform_device_put(phy_pdev);
|
||||
|
||||
err_priv:
|
||||
devm_kfree(dev, priv);
|
||||
|
||||
err_pdev:
|
||||
of_dev_put(pdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
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